Debug statements for testing
[kernel.git] / drivers / mfd / glamo / glamo-display.c
1 /*
2  * SMedia Glamo 336x/337x display
3  *
4  * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
5  *
6  * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc.
7  * Author: Harald Welte <laforge@openmoko.org>
8  * All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  *
25  *
26  * Based on intel_display.c and intel_crt.c from drivers/gpu/drm/i915
27  *  to which the following licence applies:
28  *
29  * Copyright © 2006-2007 Intel Corporation
30  *
31  * Permission is hereby granted, free of charge, to any person obtaining a
32  * copy of this software and associated documentation files (the "Software"),
33  * to deal in the Software without restriction, including without limitation
34  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
35  * and/or sell copies of the Software, and to permit persons to whom the
36  * Software is furnished to do so, subject to the following conditions:
37  *
38  * The above copyright notice and this permission notice (including the next
39  * paragraph) shall be included in all copies or substantial portions of the
40  * Software.
41  *
42  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
43  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
44  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
45  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
46  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
47  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
48  * DEALINGS IN THE SOFTWARE.
49  *
50  * Authors:
51  *      Eric Anholt <eric@anholt.net>
52  *
53  */
54
55 #include <drm/drmP.h>
56 #include <drm/glamo_drm.h>
57 #include <drm/drm_crtc_helper.h>
58 #include <drm/drm_crtc.h>
59 #include <linux/glamofb.h>
60 #include <linux/jbt6k74.h>
61
62 #include "glamo-core.h"
63 #include "glamo-drm-private.h"
64 #include "glamo-regs.h"
65 #include "glamo-kms-fb.h"
66 #include "glamo-display.h"
67
68
69 #define GLAMO_LCD_WIDTH_MASK 0x03FF
70 #define GLAMO_LCD_HEIGHT_MASK 0x03FF
71 #define GLAMO_LCD_PITCH_MASK 0x07FE
72 #define GLAMO_LCD_HV_TOTAL_MASK 0x03FF
73 #define GLAMO_LCD_HV_RETR_START_MASK 0x03FF
74 #define GLAMO_LCD_HV_RETR_END_MASK 0x03FF
75 #define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF
76 #define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF
77
78
79 struct glamofb_par {
80         struct drm_device *dev;
81         struct drm_display_mode *our_mode;
82         struct glamo_framebuffer *glamo_fb;
83         int crtc_count;
84         /* crtc currently bound to this */
85         uint32_t crtc_ids[2];
86 };
87
88
89 static int reg_read_lcd(struct glamodrm_handle *gdrm, u_int16_t reg)
90 {
91         int i = 0;
92
93         for (i = 0; i != 2; i++)
94                 nop();
95
96         return ioread16(gdrm->lcd_base + reg);
97 }
98
99
100 static void reg_write_lcd(struct glamodrm_handle *gdrm,
101                           u_int16_t reg, u_int16_t val)
102 {
103         int i = 0;
104
105         for (i = 0; i != 2; i++)
106                 nop();
107
108         iowrite16(val, gdrm->lcd_base + reg);
109 }
110
111
112 static void reg_set_bit_mask_lcd(struct glamodrm_handle *gdrm,
113                                  u_int16_t reg, u_int16_t mask,
114                                  u_int16_t val)
115 {
116         u_int16_t tmp;
117
118         val &= mask;
119
120         tmp = reg_read_lcd(gdrm, reg);
121         tmp &= ~mask;
122         tmp |= val;
123         reg_write_lcd(gdrm, reg, tmp);
124 }
125
126
127 /* Note that this has nothing at all to do with the engine command queue
128  * in glamo-cmdq.c */
129 static inline int glamo_lcd_cmdq_empty(struct glamodrm_handle *gdrm)
130 {
131         /* DGCMdQempty -- 1 == command queue is empty */
132         return reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS1) & (1 << 15);
133 }
134
135
136 /* call holding gfb->lock_cmd  when locking, until you unlock */
137 int glamo_lcd_cmd_mode(struct glamodrm_handle *gdrm, int on)
138 {
139         int timeout = 2000000;
140
141         dev_dbg(gdrm->dev, "glamofb_cmd_mode(on=%d)\n", on);
142         if (on) {
143
144                 while ((!glamo_lcd_cmdq_empty(gdrm)) && (timeout--))
145                         /* yield() */;
146                 if (timeout < 0) {
147                         printk(KERN_ERR "*************"
148                                         " LCD command queue never got empty "
149                                         "*************\n");
150                         return -EIO;
151                 }
152
153                 /* display the entire frame then switch to command */
154                 reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
155                           GLAMO_LCD_CMD_TYPE_DISP |
156                           GLAMO_LCD_CMD_DATA_FIRE_VSYNC);
157
158                 /* wait until lcd idle */
159                 timeout = 2000000;
160                 while ((!reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS2) & (1 << 12))
161                           && (timeout--))
162                         /* yield() */;
163                 if (timeout < 0) {
164                         printk(KERN_ERR"*************"
165                                        " LCD never idle "
166                                        "*************\n");
167                         return -EIO;
168                 }
169
170                 mdelay(100);
171
172         } else {
173                 /* RGB interface needs vsync/hsync */
174                 int mode;
175                 mode = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3);
176                 if ( mode & GLAMO_LCD_MODE3_RGB)
177                         reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
178                                   GLAMO_LCD_CMD_TYPE_DISP |
179                                   GLAMO_LCD_CMD_DATA_DISP_SYNC);
180
181                 reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
182                           GLAMO_LCD_CMD_TYPE_DISP |
183                           GLAMO_LCD_CMD_DATA_DISP_FIRE);
184         }
185
186         return 0;
187 }
188
189
190 static struct glamo_script lcd_init_script[] = {
191         { GLAMO_REG_LCD_MODE1, 0x0020 },
192         /* no display rotation, no hardware cursor, no dither, no gamma,
193          * no retrace flip, vsync low-active, hsync low active,
194          * no TVCLK, no partial display, hw dest color from fb,
195          * no partial display mode, LCD1, software flip,  */
196         { GLAMO_REG_LCD_MODE2, 0x9020 },
197           /* video flip, no ptr, no ptr, dhclk off,
198            * normal mode,  no cpuif,
199            * res, serial msb first, single fb, no fr ctrl,
200            * cpu if bits all zero, no crc
201            * 0000 0000 0010  0000 */
202         { GLAMO_REG_LCD_MODE3, 0x0b40 },
203           /* src data rgb565, res, 18bit rgb666
204            * 000 01 011 0100 0000 */
205         { GLAMO_REG_LCD_POLARITY, 0x440c },
206           /* DE high active, no cpu/lcd if, cs0 force low, a0 low active,
207            * np cpu if, 9bit serial data, sclk rising edge latch data
208            * 01 00 0 100 0 000 01 0 0 */
209         /* The following values assume 640*480@16bpp */
210         /* FIXME: fb0 has not yet been allocated! */
211         { GLAMO_REG_LCD_A_BASE1, PAGE_SIZE }, /* display A base address 15:0 */
212         { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */
213         { GLAMO_REG_LCD_B_BASE1, 0x6000 }, /* display B base address 15:0 */
214         { GLAMO_REG_LCD_B_BASE2, 0x0009 }, /* display B base address 22:16 */
215         { GLAMO_REG_LCD_CURSOR_BASE1, 0xC000 }, /* cursor base address 15:0 */
216         { GLAMO_REG_LCD_CURSOR_BASE2, 0x0012 }, /* cursor base address 22:16 */
217         { GLAMO_REG_LCD_COMMAND2, 0x0000 }, /* display page A */
218 };
219
220
221 static int glamo_run_lcd_script(struct glamodrm_handle *gdrm,
222                                 struct glamo_script *script, int len)
223 {
224         int i;
225
226         for (i = 0; i < len; i++) {
227                 struct glamo_script *line = &script[i];
228
229                 if (line->reg == 0xffff)
230                         return 0;
231                 else if (line->reg == 0xfffe)
232                         msleep(line->val);
233                 else
234                         reg_write_lcd(gdrm, script[i].reg, script[i].val);
235         }
236
237         return 0;
238 }
239
240
241 static bool glamo_crtc_mode_fixup(struct drm_crtc *crtc,
242                                   struct drm_display_mode *mode,
243                                   struct drm_display_mode *adjusted_mode)
244 {
245         return true;
246 }
247
248
249 static int glamo_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
250                                     struct drm_framebuffer *old_fb)
251 {
252         struct glamodrm_handle *gdrm;
253         struct glamo_crtc *gcrtc;
254         struct glamo_framebuffer *gfb;
255         struct drm_gem_object *obj;
256         struct drm_glamo_gem_object *gobj;
257         u32 addr;
258         u16 addr_low, addr_high;
259
260         printk(KERN_CRIT "Setting base!\n");
261
262         if (!crtc->fb) {
263                 DRM_DEBUG("No FB bound\n");
264                 return -EINVAL;
265         }
266
267         /* Dig out our handle */
268         gcrtc = to_glamo_crtc(crtc);
269         gdrm = gcrtc->gdrm;     /* Here it is! */
270
271         if ( !gcrtc->pixel_clock_on ) {
272                 printk(KERN_WARNING "[glamo-drm] Display is off - "
273                                     "enabling it before setting base.\n");
274                 glamo_lcd_power(gdrm, 1);
275         }
276
277         gfb = to_glamo_framebuffer(crtc->fb);
278         obj = gfb->obj;
279         gobj = obj->driver_private;
280
281         addr = GLAMO_OFFSET_FB + gobj->block->start;
282         addr_low = addr & 0xffff;
283         addr_high = ((addr >> 16) & 0x7f) | 0x4000;
284
285         glamo_lcd_cmd_mode(gdrm, 1);
286         reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE1, addr_low);
287         reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE2, addr_high);
288         glamo_lcd_cmd_mode(gdrm, 0);
289
290         return 0;
291 }
292
293
294 static int glamo_crtc_mode_set(struct drm_crtc *crtc,
295                                struct drm_display_mode *mode,
296                                struct drm_display_mode *adjusted_mode,
297                                int x, int y,
298                                struct drm_framebuffer *old_fb)
299 {
300         struct glamodrm_handle *gdrm;
301         struct glamo_crtc *gcrtc;
302         int retr_start, retr_end, disp_start, disp_end;
303         int rot;
304
305         /* Dig out our handle */
306         gcrtc = to_glamo_crtc(crtc);
307         gdrm = gcrtc->gdrm;     /* Here it is! */
308
309         if ( !gcrtc->pixel_clock_on ) {
310                 printk(KERN_WARNING "[glamo-drm] Display is off - "
311                                     "enabling it before setting mode.\n");
312                 glamo_lcd_power(gdrm, 1);
313                 msleep(500);
314         }
315
316         printk(KERN_CRIT "Setting mode!\n");
317
318         /* Rotate? */
319         if ( (mode->hdisplay == 640) && (mode->vdisplay == 480) ) {
320                 rot = GLAMO_LCD_ROT_MODE_90;
321         } else if ( (mode->hdisplay == 480) && (mode->vdisplay == 640) ) {
322                 rot = GLAMO_LCD_ROT_MODE_0;
323         } else if ( (mode->hdisplay == 320) && (mode->vdisplay == 240) ) {
324                 rot = GLAMO_LCD_ROT_MODE_90;
325         } else if ( (mode->hdisplay == 240) && (mode->vdisplay == 320) ) {
326                 rot = GLAMO_LCD_ROT_MODE_0;
327         } else {
328                 printk(KERN_WARNING "[glamo-drm] Couldn't choose rotation.\n");
329                 rot = GLAMO_LCD_ROT_MODE_0;
330         }
331
332         glamo_lcd_cmd_mode(gdrm, 1);
333
334         /* Set dimensions */
335         if ( rot == GLAMO_LCD_ROT_MODE_0 ) {
336
337                 glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
338                                      mode->clock);
339
340                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
341                                      GLAMO_LCD_WIDTH_MASK, mode->hdisplay);
342                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
343                                      GLAMO_LCD_HEIGHT_MASK, mode->vdisplay);
344                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
345                                      GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
346
347                 /* Set rotation */
348                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
349                                      GLAMO_LCD_ROT_MODE_MASK, rot);
350                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
351                                      GLAMO_LCD_MODE1_ROTATE_EN,
352                                      (rot != GLAMO_LCD_ROT_MODE_0) ?
353                                        GLAMO_LCD_MODE1_ROTATE_EN : 0);
354
355                 /* Convert "X modeline timings" into "Glamo timings" */
356                 retr_start = 0;
357                 retr_end = retr_start + mode->hsync_end - mode->hsync_start;
358                 disp_start = mode->htotal - mode->hsync_start;
359                 disp_end = disp_start + mode->hdisplay;
360
361                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
362                                      GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
363                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
364                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
365                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
366                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
367                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
368                                      GLAMO_LCD_HV_RETR_DISP_START_MASK, disp_start);
369                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
370                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
371
372                 /* The same in the vertical direction */
373                 retr_start = 0;
374                 retr_end = retr_start + mode->vsync_end - mode->vsync_start;
375                 disp_start = mode->vtotal - mode->vsync_start;
376                 disp_end = disp_start + mode->vdisplay;
377                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
378                                      GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
379                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
380                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
381                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
382                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
383                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
384                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
385                                      disp_start);
386                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
387                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
388
389         } else {
390
391                 glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
392                                      mode->clock/2);
393
394                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
395                                      GLAMO_LCD_WIDTH_MASK, mode->vdisplay);
396                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
397                                      GLAMO_LCD_HEIGHT_MASK, mode->hdisplay);
398                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
399                                      GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
400
401                 /* Set rotation */
402                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
403                                      GLAMO_LCD_ROT_MODE_MASK, rot);
404                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
405                                      GLAMO_LCD_MODE1_ROTATE_EN,
406                                      (rot != GLAMO_LCD_ROT_MODE_0) ?
407                                        GLAMO_LCD_MODE1_ROTATE_EN : 0);
408
409                 /* Apply "vertical" numbers to the horizontal registers */
410                 retr_start = 0;
411                 retr_end = retr_start + mode->vsync_end - mode->vsync_start;
412                 disp_start = mode->vtotal - mode->vsync_start;
413                 disp_end = disp_start + mode->vdisplay;
414
415                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
416                                      GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
417                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
418                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
419                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
420                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
421                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
422                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
423                                      disp_start);
424                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
425                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
426
427                 /* Apply "horizontal" numbers to the vertical registers */
428                 retr_start = 0;
429                 retr_end = retr_start + mode->hsync_end - mode->hsync_start;
430                 disp_start = mode->htotal - mode->hsync_start;
431                 disp_end = disp_start + mode->hdisplay;
432                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
433                                      GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
434                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
435                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
436                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
437                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
438                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
439                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
440                                      disp_start);
441                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
442                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
443
444         }
445
446         gdrm->saved_clock = mode->clock;
447
448         glamo_lcd_cmd_mode(gdrm, 0);
449
450         glamo_crtc_mode_set_base(crtc, 0, 0, old_fb);
451
452         if ( mode->hdisplay == 240 ) {
453                 jbt6k74_finish_resolutionchange(JBT_RESOLUTION_QVGA);
454         } else {
455                 jbt6k74_finish_resolutionchange(JBT_RESOLUTION_VGA);
456         }
457
458         gcrtc->current_mode = *mode;
459         gcrtc->current_mode_set = 1;
460         gcrtc->current_fb = old_fb;
461
462         return 0;
463 }
464
465
466 /* This is not the right place to switch power on/off, because the helper
467  * stuff ends up calling this before/after setting the mode.  We can't
468  * set modes with the display off (although backlight off would be OK) */
469 static void glamo_crtc_dpms(struct drm_crtc *crtc, int mode)
470 {
471         /* do nothing */
472 }
473
474
475 static void glamo_crtc_prepare(struct drm_crtc *crtc)
476 {
477 }
478
479
480 static void glamo_crtc_commit(struct drm_crtc *crtc)
481 {
482 }
483
484
485 static int glamo_crtc_cursor_set(struct drm_crtc *crtc,
486                                  struct drm_file *file_priv,
487                                  uint32_t handle,
488                                  uint32_t width, uint32_t height)
489 {
490         return 0;
491 }
492
493
494 static int glamo_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
495 {
496         return 0;
497 }
498
499
500 static void glamo_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
501                                  u16 *blue, uint32_t size)
502 {
503 }
504
505
506 static void glamo_crtc_destroy(struct drm_crtc *crtc)
507 {
508         struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc);
509         drm_crtc_cleanup(crtc);
510         kfree(glamo_crtc);
511 }
512
513
514 static enum drm_connector_status
515 glamo_connector_detect(struct drm_connector *connector)
516 {
517         /* One hopes it hasn't been de-soldered... */
518         return connector_status_connected;
519 }
520
521
522 static void glamo_connector_destroy(struct drm_connector *connector)
523 {
524         drm_sysfs_connector_remove(connector);
525         drm_connector_cleanup(connector);
526         kfree(connector);
527 }
528
529
530 static int glamo_connector_get_modes(struct drm_connector *connector)
531 {
532         struct glamo_fb_platform_data *fb_info;
533         struct glamo_output *goutput = to_glamo_output(connector);
534         struct glamodrm_handle *gdrm = goutput->gdrm;
535         int i;
536
537         /* Dig out the record which will tell us about the hardware */
538         fb_info = gdrm->glamo_core->pdata->fb_data;
539
540         for ( i=0; i<fb_info->num_modes; i++ ) {
541
542                 struct drm_display_mode *mode;
543
544                 mode = drm_mode_create(connector->dev);
545                 if ( !mode ) continue;
546
547                 mode->type = DRM_MODE_TYPE_DEFAULT | DRM_MODE_TYPE_PREFERRED;
548
549                 /* Convert framebuffer timings into KMS timings.
550                  * First:  ps -> kHz */
551                 mode->clock = 1000000000UL / fb_info->modes[i].pixclock;
552                 mode->clock *= 1000; /* then kHz -> Hz */
553                 mode->hdisplay = fb_info->modes[i].xres;
554                 mode->hsync_start = fb_info->modes[i].right_margin
555                                      + mode->hdisplay;
556                 mode->hsync_end = mode->hsync_start
557                                      + fb_info->modes[i].hsync_len;
558                 mode->htotal = mode->hsync_end + fb_info->modes[i].left_margin;
559                 mode->hskew = 0;
560
561                 mode->vdisplay = fb_info->modes[i].yres;
562                 mode->vsync_start = fb_info->modes[i].lower_margin
563                                      + mode->vdisplay;
564                 mode->vsync_end = mode->vsync_start
565                                    + fb_info->modes[i].vsync_len;
566                 mode->vtotal = mode->vsync_end + fb_info->modes[i].upper_margin;
567                 mode->vscan = 0;
568
569                 /* Physical size */
570                 mode->width_mm = fb_info->width;
571                 mode->height_mm = fb_info->height;
572
573                 drm_mode_set_name(mode);
574                 drm_mode_probed_add(connector, mode);
575
576         }
577
578         return fb_info->num_modes;
579 }
580
581
582 static int glamo_connector_set_property(struct drm_connector *connector,
583                                   struct drm_property *property,
584                                   uint64_t value)
585 {
586         return 0;
587 }
588
589
590 static int glamo_connector_mode_valid(struct drm_connector *connector,
591                                       struct drm_display_mode *mode)
592 {
593         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
594                 return MODE_NO_DBLESCAN;
595
596         return MODE_OK;
597 }
598
599
600 struct drm_encoder *
601 glamo_connector_best_encoder(struct drm_connector *connector)
602 {
603         struct glamo_output *glamo_output = to_glamo_output(connector);
604         return &glamo_output->enc;
605 }
606
607
608 static void glamo_encoder_dpms(struct drm_encoder *encoder, int mode)
609 {
610 }
611
612
613 static bool glamo_encoder_mode_fixup(struct drm_encoder *encoder,
614                                  struct drm_display_mode *mode,
615                                  struct drm_display_mode *adjusted_mode)
616 {
617         if ( mode->clock == 0 ) return false;
618         return true;
619 }
620
621
622 void glamo_encoder_prepare(struct drm_encoder *encoder)
623 {
624 }
625
626
627 void glamo_encoder_commit(struct drm_encoder *encoder)
628 {
629 }
630
631
632 static void glamo_encoder_mode_set(struct drm_encoder *encoder,
633                                struct drm_display_mode *mode,
634                                struct drm_display_mode *adjusted_mode)
635 {
636 }
637
638
639 static void glamo_encoder_destroy(struct drm_encoder *encoder)
640 {
641         drm_encoder_cleanup(encoder);
642 }
643
644
645 static void glamo_framebuffer_destroy(struct drm_framebuffer *fb)
646 {
647         struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
648         struct drm_device *dev = fb->dev;
649
650         drm_framebuffer_cleanup(fb);
651         mutex_lock(&dev->struct_mutex);
652         drm_gem_object_unreference(glamo_fb->obj);
653         mutex_unlock(&dev->struct_mutex);
654
655         kfree(glamo_fb);
656 }
657
658 static int glamo_framebuffer_create_handle(struct drm_framebuffer *fb,
659                                                 struct drm_file *file_priv,
660                                                 unsigned int *handle)
661 {
662         struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
663         struct drm_gem_object *object = glamo_fb->obj;
664
665         return drm_gem_handle_create(file_priv, object, handle);
666 }
667
668
669 static const struct drm_framebuffer_funcs glamo_fb_funcs = {
670         .destroy = glamo_framebuffer_destroy,
671         .create_handle = glamo_framebuffer_create_handle,
672 };
673
674
675 int glamo_framebuffer_create(struct drm_device *dev,
676                              struct drm_mode_fb_cmd *mode_cmd,
677                              struct drm_framebuffer **fb,
678                              struct drm_gem_object *obj)
679 {
680         struct glamo_framebuffer *glamo_fb;
681         int ret;
682
683         glamo_fb = kzalloc(sizeof(*glamo_fb), GFP_KERNEL);
684         if (!glamo_fb)
685                 return -ENOMEM;
686
687         ret = drm_framebuffer_init(dev, &glamo_fb->base, &glamo_fb_funcs);
688         if (ret) {
689                 DRM_ERROR("framebuffer init failed %d\n", ret);
690                 return ret;
691         }
692
693         drm_helper_mode_fill_fb_struct(&glamo_fb->base, mode_cmd);
694
695         glamo_fb->obj = obj;
696
697         *fb = &glamo_fb->base;
698
699         return 0;
700 }
701
702
703 static struct drm_framebuffer *
704 glamo_user_framebuffer_create(struct drm_device *dev,
705                               struct drm_file *filp,
706                               struct drm_mode_fb_cmd *mode_cmd)
707 {
708         struct drm_gem_object *obj;
709         struct drm_framebuffer *fb;
710         int ret;
711
712         obj = drm_gem_object_lookup(dev, filp, mode_cmd->handle);
713         if (!obj)
714                 return NULL;
715
716         ret = glamo_framebuffer_create(dev, mode_cmd, &fb, obj);
717         if (ret) {
718                 drm_gem_object_unreference(obj);
719                 return NULL;
720         }
721
722         return fb;
723 }
724
725
726 int glamo_fbchanged(struct drm_device *dev)
727 {
728         return 0;
729 }
730
731
732 /* CRTC functions */
733 static const struct drm_crtc_funcs glamo_crtc_funcs = {
734         .cursor_set = glamo_crtc_cursor_set,
735         .cursor_move = glamo_crtc_cursor_move,
736         .gamma_set = glamo_crtc_gamma_set,
737         .set_config = drm_crtc_helper_set_config,
738         .destroy = glamo_crtc_destroy,
739 };
740
741
742 /* CRTC helper functions */
743 static const struct drm_crtc_helper_funcs glamo_crtc_helper_funcs = {
744         .dpms = glamo_crtc_dpms,
745         .mode_fixup = glamo_crtc_mode_fixup,
746         .mode_set = glamo_crtc_mode_set,
747         .mode_set_base = glamo_crtc_mode_set_base,
748         .prepare = glamo_crtc_prepare,
749         .commit = glamo_crtc_commit,
750 };
751
752
753 /* Connector functions */
754 static const struct drm_connector_funcs glamo_connector_funcs = {
755         .detect = glamo_connector_detect,
756         .fill_modes = drm_helper_probe_single_connector_modes,
757         .destroy = glamo_connector_destroy,
758         .set_property = glamo_connector_set_property,
759 };
760
761
762 /* Connector helper functions */
763 static const struct drm_connector_helper_funcs glamo_connector_helper_funcs = {
764         .mode_valid = glamo_connector_mode_valid,
765         .get_modes = glamo_connector_get_modes,
766         .best_encoder = glamo_connector_best_encoder,
767 };
768
769
770 /* Encoder functions */
771 static const struct drm_encoder_funcs glamo_encoder_funcs = {
772         .destroy = glamo_encoder_destroy,
773 };
774
775
776 /* Encoder helper functions */
777 static const struct drm_encoder_helper_funcs glamo_encoder_helper_funcs = {
778         .dpms = glamo_encoder_dpms,
779         .mode_fixup = glamo_encoder_mode_fixup,
780         .prepare = glamo_encoder_prepare,
781         .commit = glamo_encoder_commit,
782         .mode_set = glamo_encoder_mode_set,
783 };
784
785
786 /* Mode functions */
787 static const struct drm_mode_config_funcs glamo_mode_funcs = {
788         .fb_create = glamo_user_framebuffer_create,
789         .fb_changed = glamo_fbchanged
790 };
791
792
793 static struct drm_mode_set kernelfb_mode;
794
795
796 /* Restore's the kernel's fbcon mode, used for panic path */
797 void glamo_display_restore(void)
798 {
799         drm_crtc_helper_set_config(&kernelfb_mode);
800 }
801
802
803 static int glamo_display_panic(struct notifier_block *n, unsigned long ununsed,
804                                void *panic_str)
805 {
806         DRM_ERROR("panic occurred, switching back to text console\n");
807
808         glamo_display_restore();
809         return 0;
810 }
811
812
813 static struct notifier_block paniced = {
814         .notifier_call = glamo_display_panic,
815 };
816
817
818 int glamo_display_init(struct drm_device *dev)
819 {
820         struct glamodrm_handle *gdrm;
821         struct glamo_crtc *glamo_crtc;
822         struct glamo_output *glamo_output;
823         struct drm_connector *connector;
824         struct glamo_framebuffer *glamo_fb;
825         struct fb_info *info;
826         struct glamofb_par *par;
827         struct drm_mode_set *modeset;
828
829         gdrm = dev->dev_private;
830
831         /* Initial setup of the LCD controller */
832         glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
833         glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
834
835         glamo_run_lcd_script(gdrm, lcd_init_script,
836                                    ARRAY_SIZE(lcd_init_script));
837
838         drm_mode_config_init(dev);
839
840         dev->mode_config.min_width = 240;
841         dev->mode_config.min_height = 240;
842         dev->mode_config.max_width = 640;
843         dev->mode_config.max_height = 640;
844
845         dev->mode_config.funcs = (void *)&glamo_mode_funcs;
846
847         /* Initialise our CRTC object.
848          * Only one connector per CRTC.  We know this: it's kind of soldered. */
849         glamo_crtc = kzalloc(sizeof(struct glamo_crtc)
850                            + sizeof(struct drm_connector *), GFP_KERNEL);
851         if (glamo_crtc == NULL) return 1;
852         glamo_crtc->gdrm = gdrm;
853         gdrm->crtc = (struct drm_crtc *)glamo_crtc;
854         glamo_crtc->pixel_clock_on = 1;
855         glamo_crtc->blank_mode = DRM_MODE_DPMS_OFF;
856         drm_crtc_init(dev, &glamo_crtc->base, &glamo_crtc_funcs);
857         drm_crtc_helper_add(&glamo_crtc->base, &glamo_crtc_helper_funcs);
858
859         glamo_crtc->mode_set.crtc = &glamo_crtc->base;
860         glamo_crtc->mode_set.connectors =
861                                       (struct drm_connector **)(glamo_crtc + 1);
862         glamo_crtc->mode_set.num_connectors = 0;
863
864         /* Create our "output" object: consists of an output and an encoder */
865         glamo_output = kzalloc(sizeof(struct glamo_output), GFP_KERNEL);
866         if (glamo_output == NULL) return 1;
867         connector = &glamo_output->base;
868         glamo_output->gdrm = gdrm;
869
870         /* Initialise the connector */
871         drm_connector_init(dev, connector, &glamo_connector_funcs,
872                            DRM_MODE_CONNECTOR_LVDS);
873         drm_sysfs_connector_add(connector);
874         connector->interlace_allowed = 0;
875         connector->doublescan_allowed = 0;
876
877         /* Initialise the encoder */
878         drm_encoder_init(dev, &glamo_output->enc, &glamo_encoder_funcs,
879                          DRM_MODE_ENCODER_DAC);
880         glamo_output->enc.possible_crtcs = 1 << 0;
881         drm_mode_connector_attach_encoder(&glamo_output->base,
882                                           &glamo_output->enc);
883
884         drm_encoder_helper_add(&glamo_output->enc, &glamo_encoder_helper_funcs);
885         drm_connector_helper_add(connector, &glamo_connector_helper_funcs);
886
887         drm_helper_initial_config(dev);
888
889         if (list_empty(&dev->mode_config.fb_kernel_list)) {
890                 int ret, cols, cols_g;
891                 cols_g = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3) & 0xc000;
892                 switch ( cols_g ) {
893                 case GLAMO_LCD_SRC_RGB565 :
894                         cols = GLAMO_FB_RGB565; break;
895                 case GLAMO_LCD_SRC_ARGB1555 :
896                         cols = GLAMO_FB_ARGB1555; break;
897                 case GLAMO_LCD_SRC_ARGB4444 :
898                         cols = GLAMO_FB_ARGB4444; break;
899                 default :
900                         printk(KERN_WARNING "Unrecognised LCD colour mode\n");
901                         cols = GLAMO_FB_RGB565; break; /* Take a guess */
902                 }
903                 ret = glamofb_create(dev, 480, 640, 480, 640, cols, &glamo_fb);
904                 if (ret) return -EINVAL;
905         }
906
907         info = glamo_fb->base.fbdev;
908         par = info->par;
909
910         modeset = &glamo_crtc->mode_set;
911         modeset->fb = &glamo_fb->base;
912         modeset->connectors[0] = connector;
913
914         par->crtc_ids[0] = glamo_crtc->base.base.id;
915
916         modeset->num_connectors = 1;
917         modeset->mode = modeset->crtc->desired_mode;
918
919         par->crtc_count = 1;
920
921         if (register_framebuffer(info) < 0)
922                 return -EINVAL;
923
924         printk(KERN_INFO "[glamo-drm] fb%d: %s frame buffer device\n",
925                info->node, info->fix.id);
926
927         /* Switch back to kernel console on panic */
928         kernelfb_mode = *modeset;
929         atomic_notifier_chain_register(&panic_notifier_list, &paniced);
930         printk(KERN_INFO "[glamo-drm] Registered panic notifier\n");
931
932         return 0;
933 }
934
935
936 void glamo_lcd_power(struct glamodrm_handle *gdrm, int mode)
937 {
938         struct drm_crtc *crtc = gdrm->crtc;
939         struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
940
941         if ( mode ) {
942                 printk(KERN_CRIT "Power on sequence\n");
943                 glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
944                 gcrtc->pixel_clock_on = 1;
945                 jbt6k74_setpower(JBT_POWER_MODE_NORMAL);
946                 if ( gcrtc->current_mode_set ) {
947                         printk(KERN_CRIT "Setting previous mode\n");
948                         glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
949                                             &gcrtc->current_mode, 0, 0,
950                                             gcrtc->current_fb);
951                 }
952         } else {
953                 printk(KERN_CRIT "Power off sequence\n");
954                 jbt6k74_setpower(JBT_POWER_MODE_OFF);
955                 glamo_engine_suspend(gdrm->glamo_core, GLAMO_ENGINE_LCD);
956                 gcrtc->pixel_clock_on = 0;
957         }
958 }
959
960
961 void glamo_display_suspend(struct glamodrm_handle *gdrm)
962 {
963         /* do nothing */
964 }
965
966
967 void glamo_display_resume(struct glamodrm_handle *gdrm)
968 {
969         struct drm_crtc *crtc = gdrm->crtc;
970         struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
971
972         glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
973         glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
974         glamo_run_lcd_script(gdrm, lcd_init_script,
975                                    ARRAY_SIZE(lcd_init_script));
976
977         if ( gcrtc->current_mode_set ) {
978                 glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
979                                     &gcrtc->current_mode, 0, 0,
980                                     gcrtc->current_fb);
981         }
982 }