75ad73497f4211af56092713db3e1560cf5d0a9c
[kernel.git] / drivers / mfd / glamo / glamo-display.c
1 /*
2  * SMedia Glamo 336x/337x display
3  *
4  * Copyright (C) 2008-2009 Thomas White <taw@bitwiz.org.uk>
5  *
6  * Based on glamo-fb.c (C) 2007-2008 by Openmoko, Inc.
7  * Author: Harald Welte <laforge@openmoko.org>
8  * All rights reserved.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  *
25  *
26  * Based on intel_display.c and intel_crt.c from drivers/gpu/drm/i915
27  *  to which the following licence applies:
28  *
29  * Copyright © 2006-2007 Intel Corporation
30  *
31  * Permission is hereby granted, free of charge, to any person obtaining a
32  * copy of this software and associated documentation files (the "Software"),
33  * to deal in the Software without restriction, including without limitation
34  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
35  * and/or sell copies of the Software, and to permit persons to whom the
36  * Software is furnished to do so, subject to the following conditions:
37  *
38  * The above copyright notice and this permission notice (including the next
39  * paragraph) shall be included in all copies or substantial portions of the
40  * Software.
41  *
42  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
43  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
44  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
45  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
46  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
47  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
48  * DEALINGS IN THE SOFTWARE.
49  *
50  * Authors:
51  *      Eric Anholt <eric@anholt.net>
52  *
53  */
54
55 #include <drm/drmP.h>
56 #include <drm/glamo_drm.h>
57 #include <drm/drm_crtc_helper.h>
58 #include <drm/drm_crtc.h>
59 #include <linux/glamofb.h>
60 #include <linux/jbt6k74.h>
61
62 #include "glamo-core.h"
63 #include "glamo-drm-private.h"
64 #include "glamo-regs.h"
65 #include "glamo-kms-fb.h"
66 #include "glamo-display.h"
67
68
69 #define GLAMO_LCD_WIDTH_MASK 0x03FF
70 #define GLAMO_LCD_HEIGHT_MASK 0x03FF
71 #define GLAMO_LCD_PITCH_MASK 0x07FE
72 #define GLAMO_LCD_HV_TOTAL_MASK 0x03FF
73 #define GLAMO_LCD_HV_RETR_START_MASK 0x03FF
74 #define GLAMO_LCD_HV_RETR_END_MASK 0x03FF
75 #define GLAMO_LCD_HV_RETR_DISP_START_MASK 0x03FF
76 #define GLAMO_LCD_HV_RETR_DISP_END_MASK 0x03FF
77
78
79 struct glamofb_par {
80         struct drm_device *dev;
81         struct drm_display_mode *our_mode;
82         struct glamo_framebuffer *glamo_fb;
83         int crtc_count;
84         /* crtc currently bound to this */
85         uint32_t crtc_ids[2];
86 };
87
88
89 static int reg_read_lcd(struct glamodrm_handle *gdrm, u_int16_t reg)
90 {
91         int i = 0;
92
93         for (i = 0; i != 2; i++)
94                 nop();
95
96         return ioread16(gdrm->lcd_base + reg);
97 }
98
99
100 static void reg_write_lcd(struct glamodrm_handle *gdrm,
101                           u_int16_t reg, u_int16_t val)
102 {
103         int i = 0;
104
105         for (i = 0; i != 2; i++)
106                 nop();
107
108         iowrite16(val, gdrm->lcd_base + reg);
109 }
110
111
112 static void reg_set_bit_mask_lcd(struct glamodrm_handle *gdrm,
113                                  u_int16_t reg, u_int16_t mask,
114                                  u_int16_t val)
115 {
116         u_int16_t tmp;
117
118         val &= mask;
119
120         tmp = reg_read_lcd(gdrm, reg);
121         tmp &= ~mask;
122         tmp |= val;
123         reg_write_lcd(gdrm, reg, tmp);
124 }
125
126
127 /* Note that this has nothing at all to do with the engine command queue
128  * in glamo-cmdq.c */
129 static inline int glamo_lcd_cmdq_empty(struct glamodrm_handle *gdrm)
130 {
131         /* DGCMdQempty -- 1 == command queue is empty */
132         return reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS1) & (1 << 15);
133 }
134
135
136 /* call holding gfb->lock_cmd  when locking, until you unlock */
137 int glamo_lcd_cmd_mode(struct glamodrm_handle *gdrm, int on)
138 {
139         int timeout = 2000000;
140
141         dev_dbg(gdrm->dev, "glamofb_cmd_mode(on=%d)\n", on);
142         if (on) {
143
144                 while ((!glamo_lcd_cmdq_empty(gdrm)) && (timeout--))
145                         /* yield() */;
146                 if (timeout < 0) {
147                         printk(KERN_ERR "*************"
148                                         " LCD command queue never got empty "
149                                         "*************\n");
150                         return -EIO;
151                 }
152
153                 /* display the entire frame then switch to command */
154                 reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
155                           GLAMO_LCD_CMD_TYPE_DISP |
156                           GLAMO_LCD_CMD_DATA_FIRE_VSYNC);
157
158                 /* wait until lcd idle */
159                 timeout = 2000000;
160                 while ((!reg_read_lcd(gdrm, GLAMO_REG_LCD_STATUS2) & (1 << 12))
161                           && (timeout--))
162                         /* yield() */;
163                 if (timeout < 0) {
164                         printk(KERN_ERR"*************"
165                                        " LCD never idle "
166                                        "*************\n");
167                         return -EIO;
168                 }
169
170                 mdelay(100);
171
172         } else {
173                 /* RGB interface needs vsync/hsync */
174                 int mode;
175                 mode = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3);
176                 if ( mode & GLAMO_LCD_MODE3_RGB)
177                         reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
178                                   GLAMO_LCD_CMD_TYPE_DISP |
179                                   GLAMO_LCD_CMD_DATA_DISP_SYNC);
180
181                 reg_write_lcd(gdrm, GLAMO_REG_LCD_COMMAND1,
182                           GLAMO_LCD_CMD_TYPE_DISP |
183                           GLAMO_LCD_CMD_DATA_DISP_FIRE);
184         }
185
186         return 0;
187 }
188
189
190 static struct glamo_script lcd_init_script[] = {
191         { GLAMO_REG_LCD_MODE1, 0x0020 },
192         /* no display rotation, no hardware cursor, no dither, no gamma,
193          * no retrace flip, vsync low-active, hsync low active,
194          * no TVCLK, no partial display, hw dest color from fb,
195          * no partial display mode, LCD1, software flip,  */
196         { GLAMO_REG_LCD_MODE2, 0x9020 },
197           /* video flip, no ptr, no ptr, dhclk off,
198            * normal mode,  no cpuif,
199            * res, serial msb first, single fb, no fr ctrl,
200            * cpu if bits all zero, no crc
201            * 0000 0000 0010  0000 */
202         { GLAMO_REG_LCD_MODE3, 0x0b40 },
203           /* src data rgb565, res, 18bit rgb666
204            * 000 01 011 0100 0000 */
205         { GLAMO_REG_LCD_POLARITY, 0x440c },
206           /* DE high active, no cpu/lcd if, cs0 force low, a0 low active,
207            * np cpu if, 9bit serial data, sclk rising edge latch data
208            * 01 00 0 100 0 000 01 0 0 */
209         /* The following values assume 640*480@16bpp */
210         /* FIXME: fb0 has not yet been allocated! */
211         { GLAMO_REG_LCD_A_BASE1, PAGE_SIZE }, /* display A base address 15:0 */
212         { GLAMO_REG_LCD_A_BASE2, 0x0000 }, /* display A base address 22:16 */
213         { GLAMO_REG_LCD_B_BASE1, 0x6000 }, /* display B base address 15:0 */
214         { GLAMO_REG_LCD_B_BASE2, 0x0009 }, /* display B base address 22:16 */
215         { GLAMO_REG_LCD_CURSOR_BASE1, 0xC000 }, /* cursor base address 15:0 */
216         { GLAMO_REG_LCD_CURSOR_BASE2, 0x0012 }, /* cursor base address 22:16 */
217         { GLAMO_REG_LCD_COMMAND2, 0x0000 }, /* display page A */
218 };
219
220
221 static int glamo_run_lcd_script(struct glamodrm_handle *gdrm,
222                                 struct glamo_script *script, int len)
223 {
224         int i;
225
226         for (i = 0; i < len; i++) {
227                 struct glamo_script *line = &script[i];
228
229                 if (line->reg == 0xffff)
230                         return 0;
231                 else if (line->reg == 0xfffe)
232                         msleep(line->val);
233                 else
234                         reg_write_lcd(gdrm, script[i].reg, script[i].val);
235         }
236
237         return 0;
238 }
239
240
241 static bool glamo_crtc_mode_fixup(struct drm_crtc *crtc,
242                                   struct drm_display_mode *mode,
243                                   struct drm_display_mode *adjusted_mode)
244 {
245         return true;
246 }
247
248
249 static int glamo_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
250                                     struct drm_framebuffer *old_fb)
251 {
252         struct glamodrm_handle *gdrm;
253         struct glamo_crtc *gcrtc;
254         struct glamo_framebuffer *gfb;
255         struct drm_gem_object *obj;
256         struct drm_glamo_gem_object *gobj;
257         u32 addr;
258         u16 addr_low, addr_high;
259
260         if (!crtc->fb) {
261                 DRM_DEBUG("No FB bound\n");
262                 return -EINVAL;
263         }
264
265         /* Dig out our handle */
266         gcrtc = to_glamo_crtc(crtc);
267         gdrm = gcrtc->gdrm;     /* Here it is! */
268
269         if ( !gcrtc->pixel_clock_on ) {
270                 printk(KERN_WARNING "[glamo-drm] Display is off - "
271                                     "enabling it before setting base.\n");
272                 glamo_lcd_power(gdrm, 1);
273         }
274
275         gfb = to_glamo_framebuffer(crtc->fb);
276         obj = gfb->obj;
277         gobj = obj->driver_private;
278
279         addr = GLAMO_OFFSET_FB + gobj->block->start;
280         addr_low = addr & 0xffff;
281         addr_high = ((addr >> 16) & 0x7f) | 0x4000;
282
283         glamo_lcd_cmd_mode(gdrm, 1);
284         reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE1, addr_low);
285         reg_write_lcd(gdrm, GLAMO_REG_LCD_A_BASE2, addr_high);
286         glamo_lcd_cmd_mode(gdrm, 0);
287
288         return 0;
289 }
290
291
292 static int glamo_crtc_mode_set(struct drm_crtc *crtc,
293                                struct drm_display_mode *mode,
294                                struct drm_display_mode *adjusted_mode,
295                                int x, int y,
296                                struct drm_framebuffer *old_fb)
297 {
298         struct glamodrm_handle *gdrm;
299         struct glamo_crtc *gcrtc;
300         int retr_start, retr_end, disp_start, disp_end;
301         int rot;
302
303         /* Dig out our handle */
304         gcrtc = to_glamo_crtc(crtc);
305         gdrm = gcrtc->gdrm;     /* Here it is! */
306
307         if ( !gcrtc->pixel_clock_on ) {
308                 printk(KERN_WARNING "[glamo-drm] Display is off - "
309                                     "enabling it before setting mode.\n");
310                 glamo_lcd_power(gdrm, 1);
311                 msleep(500);
312         }
313
314         /* Rotate? */
315         if ( (mode->hdisplay == 640) && (mode->vdisplay == 480) ) {
316                 rot = GLAMO_LCD_ROT_MODE_90;
317         } else if ( (mode->hdisplay == 480) && (mode->vdisplay == 640) ) {
318                 rot = GLAMO_LCD_ROT_MODE_0;
319         } else if ( (mode->hdisplay == 320) && (mode->vdisplay == 240) ) {
320                 rot = GLAMO_LCD_ROT_MODE_90;
321         } else if ( (mode->hdisplay == 240) && (mode->vdisplay == 320) ) {
322                 rot = GLAMO_LCD_ROT_MODE_0;
323         } else {
324                 printk(KERN_WARNING "[glamo-drm] Couldn't choose rotation.\n");
325                 rot = GLAMO_LCD_ROT_MODE_0;
326         }
327
328         glamo_lcd_cmd_mode(gdrm, 1);
329
330         /* Set dimensions */
331         if ( rot == GLAMO_LCD_ROT_MODE_0 ) {
332
333                 glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
334                                      mode->clock);
335
336                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
337                                      GLAMO_LCD_WIDTH_MASK, mode->hdisplay);
338                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
339                                      GLAMO_LCD_HEIGHT_MASK, mode->vdisplay);
340                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
341                                      GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
342
343                 /* Set rotation */
344                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
345                                      GLAMO_LCD_ROT_MODE_MASK, rot);
346                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
347                                      GLAMO_LCD_MODE1_ROTATE_EN,
348                                      (rot != GLAMO_LCD_ROT_MODE_0) ?
349                                        GLAMO_LCD_MODE1_ROTATE_EN : 0);
350
351                 /* Convert "X modeline timings" into "Glamo timings" */
352                 retr_start = 0;
353                 retr_end = retr_start + mode->hsync_end - mode->hsync_start;
354                 disp_start = mode->htotal - mode->hsync_start;
355                 disp_end = disp_start + mode->hdisplay;
356
357                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
358                                      GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
359                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
360                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
361                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
362                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
363                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
364                                      GLAMO_LCD_HV_RETR_DISP_START_MASK, disp_start);
365                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
366                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
367
368                 /* The same in the vertical direction */
369                 retr_start = 0;
370                 retr_end = retr_start + mode->vsync_end - mode->vsync_start;
371                 disp_start = mode->vtotal - mode->vsync_start;
372                 disp_end = disp_start + mode->vdisplay;
373                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
374                                      GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
375                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
376                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
377                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
378                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
379                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
380                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
381                                      disp_start);
382                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
383                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
384
385         } else {
386
387                 glamo_engine_reclock(gdrm->glamo_core, GLAMO_ENGINE_LCD,
388                                      mode->clock/2);
389
390                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
391                                      GLAMO_LCD_WIDTH_MASK, mode->vdisplay);
392                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HEIGHT,
393                                      GLAMO_LCD_HEIGHT_MASK, mode->hdisplay);
394                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_PITCH,
395                                      GLAMO_LCD_PITCH_MASK, mode->hdisplay*2);
396
397                 /* Set rotation */
398                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_WIDTH,
399                                      GLAMO_LCD_ROT_MODE_MASK, rot);
400                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_MODE1,
401                                      GLAMO_LCD_MODE1_ROTATE_EN,
402                                      (rot != GLAMO_LCD_ROT_MODE_0) ?
403                                        GLAMO_LCD_MODE1_ROTATE_EN : 0);
404
405                 /* Apply "vertical" numbers to the horizontal registers */
406                 retr_start = 0;
407                 retr_end = retr_start + mode->vsync_end - mode->vsync_start;
408                 disp_start = mode->vtotal - mode->vsync_start;
409                 disp_end = disp_start + mode->vdisplay;
410
411                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_TOTAL,
412                                      GLAMO_LCD_HV_TOTAL_MASK, mode->vtotal);
413                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_START,
414                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
415                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_RETR_END,
416                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
417                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_START,
418                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
419                                      disp_start);
420                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_HORIZ_DISP_END,
421                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
422
423                 /* Apply "horizontal" numbers to the vertical registers */
424                 retr_start = 0;
425                 retr_end = retr_start + mode->hsync_end - mode->hsync_start;
426                 disp_start = mode->htotal - mode->hsync_start;
427                 disp_end = disp_start + mode->hdisplay;
428                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_TOTAL,
429                                      GLAMO_LCD_HV_TOTAL_MASK, mode->htotal);
430                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_START,
431                                      GLAMO_LCD_HV_RETR_START_MASK, retr_start);
432                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_RETR_END,
433                                      GLAMO_LCD_HV_RETR_END_MASK, retr_end);
434                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_START,
435                                      GLAMO_LCD_HV_RETR_DISP_START_MASK,
436                                      disp_start);
437                 reg_set_bit_mask_lcd(gdrm, GLAMO_REG_LCD_VERT_DISP_END,
438                                      GLAMO_LCD_HV_RETR_DISP_END_MASK, disp_end);
439
440         }
441
442         gdrm->saved_clock = mode->clock;
443
444         glamo_lcd_cmd_mode(gdrm, 0);
445
446         glamo_crtc_mode_set_base(crtc, 0, 0, old_fb);
447
448         if ( mode->hdisplay == 240 ) {
449                 jbt6k74_finish_resolutionchange(JBT_RESOLUTION_QVGA);
450         } else {
451                 jbt6k74_finish_resolutionchange(JBT_RESOLUTION_VGA);
452         }
453
454         gcrtc->current_mode = *mode;
455         gcrtc->current_mode_set = 1;
456         gcrtc->current_fb = old_fb;
457
458         return 0;
459 }
460
461
462 /* This is not the right place to switch power on/off, because the helper
463  * stuff ends up calling this before/after setting the mode.  We can't
464  * set modes with the display off (although backlight off would be OK) */
465 static void glamo_crtc_dpms(struct drm_crtc *crtc, int mode)
466 {
467         /* do nothing */
468 }
469
470
471 static void glamo_crtc_prepare(struct drm_crtc *crtc)
472 {
473 }
474
475
476 static void glamo_crtc_commit(struct drm_crtc *crtc)
477 {
478 }
479
480
481 static int glamo_crtc_cursor_set(struct drm_crtc *crtc,
482                                  struct drm_file *file_priv,
483                                  uint32_t handle,
484                                  uint32_t width, uint32_t height)
485 {
486         return 0;
487 }
488
489
490 static int glamo_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
491 {
492         return 0;
493 }
494
495
496 static void glamo_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
497                                  u16 *blue, uint32_t size)
498 {
499 }
500
501
502 static void glamo_crtc_destroy(struct drm_crtc *crtc)
503 {
504         struct glamo_crtc *glamo_crtc = to_glamo_crtc(crtc);
505         drm_crtc_cleanup(crtc);
506         kfree(glamo_crtc);
507 }
508
509
510 static enum drm_connector_status
511 glamo_connector_detect(struct drm_connector *connector)
512 {
513         /* One hopes it hasn't been de-soldered... */
514         return connector_status_connected;
515 }
516
517
518 static void glamo_connector_destroy(struct drm_connector *connector)
519 {
520         drm_sysfs_connector_remove(connector);
521         drm_connector_cleanup(connector);
522         kfree(connector);
523 }
524
525
526 static int glamo_connector_get_modes(struct drm_connector *connector)
527 {
528         struct glamo_fb_platform_data *fb_info;
529         struct glamo_output *goutput = to_glamo_output(connector);
530         struct glamodrm_handle *gdrm = goutput->gdrm;
531         int i;
532
533         /* Dig out the record which will tell us about the hardware */
534         fb_info = gdrm->glamo_core->pdata->fb_data;
535
536         for ( i=0; i<fb_info->num_modes; i++ ) {
537
538                 struct drm_display_mode *mode;
539
540                 mode = drm_mode_create(connector->dev);
541                 if ( !mode ) continue;
542
543                 mode->type = DRM_MODE_TYPE_DEFAULT | DRM_MODE_TYPE_PREFERRED;
544
545                 /* Convert framebuffer timings into KMS timings.
546                  * First:  ps -> kHz */
547                 mode->clock = 1000000000UL / fb_info->modes[i].pixclock;
548                 mode->clock *= 1000; /* then kHz -> Hz */
549                 mode->hdisplay = fb_info->modes[i].xres;
550                 mode->hsync_start = fb_info->modes[i].right_margin
551                                      + mode->hdisplay;
552                 mode->hsync_end = mode->hsync_start
553                                      + fb_info->modes[i].hsync_len;
554                 mode->htotal = mode->hsync_end + fb_info->modes[i].left_margin;
555                 mode->hskew = 0;
556
557                 mode->vdisplay = fb_info->modes[i].yres;
558                 mode->vsync_start = fb_info->modes[i].lower_margin
559                                      + mode->vdisplay;
560                 mode->vsync_end = mode->vsync_start
561                                    + fb_info->modes[i].vsync_len;
562                 mode->vtotal = mode->vsync_end + fb_info->modes[i].upper_margin;
563                 mode->vscan = 0;
564
565                 /* Physical size */
566                 mode->width_mm = fb_info->width;
567                 mode->height_mm = fb_info->height;
568
569                 drm_mode_set_name(mode);
570                 drm_mode_probed_add(connector, mode);
571
572         }
573
574         return fb_info->num_modes;
575 }
576
577
578 static int glamo_connector_set_property(struct drm_connector *connector,
579                                   struct drm_property *property,
580                                   uint64_t value)
581 {
582         return 0;
583 }
584
585
586 static int glamo_connector_mode_valid(struct drm_connector *connector,
587                                       struct drm_display_mode *mode)
588 {
589         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
590                 return MODE_NO_DBLESCAN;
591
592         return MODE_OK;
593 }
594
595
596 struct drm_encoder *
597 glamo_connector_best_encoder(struct drm_connector *connector)
598 {
599         struct glamo_output *glamo_output = to_glamo_output(connector);
600         return &glamo_output->enc;
601 }
602
603
604 static void glamo_encoder_dpms(struct drm_encoder *encoder, int mode)
605 {
606 }
607
608
609 static bool glamo_encoder_mode_fixup(struct drm_encoder *encoder,
610                                  struct drm_display_mode *mode,
611                                  struct drm_display_mode *adjusted_mode)
612 {
613         if ( mode->clock == 0 ) return false;
614         return true;
615 }
616
617
618 void glamo_encoder_prepare(struct drm_encoder *encoder)
619 {
620 }
621
622
623 void glamo_encoder_commit(struct drm_encoder *encoder)
624 {
625 }
626
627
628 static void glamo_encoder_mode_set(struct drm_encoder *encoder,
629                                struct drm_display_mode *mode,
630                                struct drm_display_mode *adjusted_mode)
631 {
632 }
633
634
635 static void glamo_encoder_destroy(struct drm_encoder *encoder)
636 {
637         drm_encoder_cleanup(encoder);
638 }
639
640
641 static void glamo_framebuffer_destroy(struct drm_framebuffer *fb)
642 {
643         struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
644         struct drm_device *dev = fb->dev;
645
646         drm_framebuffer_cleanup(fb);
647         mutex_lock(&dev->struct_mutex);
648         drm_gem_object_unreference(glamo_fb->obj);
649         mutex_unlock(&dev->struct_mutex);
650
651         kfree(glamo_fb);
652 }
653
654 static int glamo_framebuffer_create_handle(struct drm_framebuffer *fb,
655                                                 struct drm_file *file_priv,
656                                                 unsigned int *handle)
657 {
658         struct glamo_framebuffer *glamo_fb = to_glamo_framebuffer(fb);
659         struct drm_gem_object *object = glamo_fb->obj;
660
661         return drm_gem_handle_create(file_priv, object, handle);
662 }
663
664
665 static const struct drm_framebuffer_funcs glamo_fb_funcs = {
666         .destroy = glamo_framebuffer_destroy,
667         .create_handle = glamo_framebuffer_create_handle,
668 };
669
670
671 int glamo_framebuffer_create(struct drm_device *dev,
672                              struct drm_mode_fb_cmd *mode_cmd,
673                              struct drm_framebuffer **fb,
674                              struct drm_gem_object *obj)
675 {
676         struct glamo_framebuffer *glamo_fb;
677         int ret;
678
679         glamo_fb = kzalloc(sizeof(*glamo_fb), GFP_KERNEL);
680         if (!glamo_fb)
681                 return -ENOMEM;
682
683         ret = drm_framebuffer_init(dev, &glamo_fb->base, &glamo_fb_funcs);
684         if (ret) {
685                 DRM_ERROR("framebuffer init failed %d\n", ret);
686                 return ret;
687         }
688
689         drm_helper_mode_fill_fb_struct(&glamo_fb->base, mode_cmd);
690
691         glamo_fb->obj = obj;
692
693         *fb = &glamo_fb->base;
694
695         return 0;
696 }
697
698
699 static struct drm_framebuffer *
700 glamo_user_framebuffer_create(struct drm_device *dev,
701                               struct drm_file *filp,
702                               struct drm_mode_fb_cmd *mode_cmd)
703 {
704         struct drm_gem_object *obj;
705         struct drm_framebuffer *fb;
706         int ret;
707
708         obj = drm_gem_object_lookup(dev, filp, mode_cmd->handle);
709         if (!obj)
710                 return NULL;
711
712         ret = glamo_framebuffer_create(dev, mode_cmd, &fb, obj);
713         if (ret) {
714                 drm_gem_object_unreference(obj);
715                 return NULL;
716         }
717
718         return fb;
719 }
720
721
722 int glamo_fbchanged(struct drm_device *dev)
723 {
724         return 0;
725 }
726
727
728 /* CRTC functions */
729 static const struct drm_crtc_funcs glamo_crtc_funcs = {
730         .cursor_set = glamo_crtc_cursor_set,
731         .cursor_move = glamo_crtc_cursor_move,
732         .gamma_set = glamo_crtc_gamma_set,
733         .set_config = drm_crtc_helper_set_config,
734         .destroy = glamo_crtc_destroy,
735 };
736
737
738 /* CRTC helper functions */
739 static const struct drm_crtc_helper_funcs glamo_crtc_helper_funcs = {
740         .dpms = glamo_crtc_dpms,
741         .mode_fixup = glamo_crtc_mode_fixup,
742         .mode_set = glamo_crtc_mode_set,
743         .mode_set_base = glamo_crtc_mode_set_base,
744         .prepare = glamo_crtc_prepare,
745         .commit = glamo_crtc_commit,
746 };
747
748
749 /* Connector functions */
750 static const struct drm_connector_funcs glamo_connector_funcs = {
751         .detect = glamo_connector_detect,
752         .fill_modes = drm_helper_probe_single_connector_modes,
753         .destroy = glamo_connector_destroy,
754         .set_property = glamo_connector_set_property,
755 };
756
757
758 /* Connector helper functions */
759 static const struct drm_connector_helper_funcs glamo_connector_helper_funcs = {
760         .mode_valid = glamo_connector_mode_valid,
761         .get_modes = glamo_connector_get_modes,
762         .best_encoder = glamo_connector_best_encoder,
763 };
764
765
766 /* Encoder functions */
767 static const struct drm_encoder_funcs glamo_encoder_funcs = {
768         .destroy = glamo_encoder_destroy,
769 };
770
771
772 /* Encoder helper functions */
773 static const struct drm_encoder_helper_funcs glamo_encoder_helper_funcs = {
774         .dpms = glamo_encoder_dpms,
775         .mode_fixup = glamo_encoder_mode_fixup,
776         .prepare = glamo_encoder_prepare,
777         .commit = glamo_encoder_commit,
778         .mode_set = glamo_encoder_mode_set,
779 };
780
781
782 /* Mode functions */
783 static const struct drm_mode_config_funcs glamo_mode_funcs = {
784         .fb_create = glamo_user_framebuffer_create,
785         .fb_changed = glamo_fbchanged
786 };
787
788
789 static struct drm_mode_set kernelfb_mode;
790
791
792 /* Restore's the kernel's fbcon mode, used for panic path */
793 void glamo_display_restore(void)
794 {
795         drm_crtc_helper_set_config(&kernelfb_mode);
796 }
797
798
799 static int glamo_display_panic(struct notifier_block *n, unsigned long ununsed,
800                                void *panic_str)
801 {
802         DRM_ERROR("panic occurred, switching back to text console\n");
803
804         glamo_display_restore();
805         return 0;
806 }
807
808
809 static struct notifier_block paniced = {
810         .notifier_call = glamo_display_panic,
811 };
812
813
814 int glamo_display_init(struct drm_device *dev)
815 {
816         struct glamodrm_handle *gdrm;
817         struct glamo_crtc *glamo_crtc;
818         struct glamo_output *glamo_output;
819         struct drm_connector *connector;
820         struct glamo_framebuffer *glamo_fb;
821         struct fb_info *info;
822         struct glamofb_par *par;
823         struct drm_mode_set *modeset;
824
825         gdrm = dev->dev_private;
826
827         /* Initial setup of the LCD controller */
828         glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
829         glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
830
831         glamo_run_lcd_script(gdrm, lcd_init_script,
832                                    ARRAY_SIZE(lcd_init_script));
833
834         drm_mode_config_init(dev);
835
836         dev->mode_config.min_width = 240;
837         dev->mode_config.min_height = 240;
838         dev->mode_config.max_width = 640;
839         dev->mode_config.max_height = 640;
840
841         dev->mode_config.funcs = (void *)&glamo_mode_funcs;
842
843         /* Initialise our CRTC object.
844          * Only one connector per CRTC.  We know this: it's kind of soldered. */
845         glamo_crtc = kzalloc(sizeof(struct glamo_crtc)
846                            + sizeof(struct drm_connector *), GFP_KERNEL);
847         if (glamo_crtc == NULL) return 1;
848         glamo_crtc->gdrm = gdrm;
849         gdrm->crtc = (struct drm_crtc *)glamo_crtc;
850         glamo_crtc->pixel_clock_on = 1;
851         glamo_crtc->blank_mode = DRM_MODE_DPMS_OFF;
852         drm_crtc_init(dev, &glamo_crtc->base, &glamo_crtc_funcs);
853         drm_crtc_helper_add(&glamo_crtc->base, &glamo_crtc_helper_funcs);
854
855         glamo_crtc->mode_set.crtc = &glamo_crtc->base;
856         glamo_crtc->mode_set.connectors =
857                                       (struct drm_connector **)(glamo_crtc + 1);
858         glamo_crtc->mode_set.num_connectors = 0;
859
860         /* Create our "output" object: consists of an output and an encoder */
861         glamo_output = kzalloc(sizeof(struct glamo_output), GFP_KERNEL);
862         if (glamo_output == NULL) return 1;
863         connector = &glamo_output->base;
864         glamo_output->gdrm = gdrm;
865
866         /* Initialise the connector */
867         drm_connector_init(dev, connector, &glamo_connector_funcs,
868                            DRM_MODE_CONNECTOR_LVDS);
869         drm_sysfs_connector_add(connector);
870         connector->interlace_allowed = 0;
871         connector->doublescan_allowed = 0;
872
873         /* Initialise the encoder */
874         drm_encoder_init(dev, &glamo_output->enc, &glamo_encoder_funcs,
875                          DRM_MODE_ENCODER_DAC);
876         glamo_output->enc.possible_crtcs = 1 << 0;
877         drm_mode_connector_attach_encoder(&glamo_output->base,
878                                           &glamo_output->enc);
879
880         drm_encoder_helper_add(&glamo_output->enc, &glamo_encoder_helper_funcs);
881         drm_connector_helper_add(connector, &glamo_connector_helper_funcs);
882
883         drm_helper_initial_config(dev);
884
885         if (list_empty(&dev->mode_config.fb_kernel_list)) {
886                 int ret, cols, cols_g;
887                 cols_g = reg_read_lcd(gdrm, GLAMO_REG_LCD_MODE3) & 0xc000;
888                 switch ( cols_g ) {
889                 case GLAMO_LCD_SRC_RGB565 :
890                         cols = GLAMO_FB_RGB565; break;
891                 case GLAMO_LCD_SRC_ARGB1555 :
892                         cols = GLAMO_FB_ARGB1555; break;
893                 case GLAMO_LCD_SRC_ARGB4444 :
894                         cols = GLAMO_FB_ARGB4444; break;
895                 default :
896                         printk(KERN_WARNING "Unrecognised LCD colour mode\n");
897                         cols = GLAMO_FB_RGB565; break; /* Take a guess */
898                 }
899                 ret = glamofb_create(dev, 480, 640, 480, 640, cols, &glamo_fb);
900                 if (ret) return -EINVAL;
901         }
902
903         info = glamo_fb->base.fbdev;
904         par = info->par;
905
906         modeset = &glamo_crtc->mode_set;
907         modeset->fb = &glamo_fb->base;
908         modeset->connectors[0] = connector;
909
910         par->crtc_ids[0] = glamo_crtc->base.base.id;
911
912         modeset->num_connectors = 1;
913         modeset->mode = modeset->crtc->desired_mode;
914
915         par->crtc_count = 1;
916
917         if (register_framebuffer(info) < 0)
918                 return -EINVAL;
919
920         printk(KERN_INFO "[glamo-drm] fb%d: %s frame buffer device\n",
921                info->node, info->fix.id);
922
923         /* Switch back to kernel console on panic */
924         kernelfb_mode = *modeset;
925         atomic_notifier_chain_register(&panic_notifier_list, &paniced);
926         printk(KERN_INFO "[glamo-drm] Registered panic notifier\n");
927
928         return 0;
929 }
930
931
932 void glamo_lcd_power(struct glamodrm_handle *gdrm, int mode)
933 {
934         struct drm_crtc *crtc = gdrm->crtc;
935         struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
936
937         if ( mode ) {
938                 glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
939                 gcrtc->pixel_clock_on = 1;
940                 jbt6k74_setpower(JBT_POWER_MODE_NORMAL);
941                 if ( gcrtc->current_mode_set ) {
942                         glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
943                                             &gcrtc->current_mode, 0, 0,
944                                             gcrtc->current_fb);
945                 }
946         } else {
947                 jbt6k74_setpower(JBT_POWER_MODE_OFF);
948                 glamo_engine_suspend(gdrm->glamo_core, GLAMO_ENGINE_LCD);
949                 gcrtc->pixel_clock_on = 0;
950         }
951 }
952
953
954 void glamo_display_suspend(struct glamodrm_handle *gdrm)
955 {
956         /* do nothing */
957 }
958
959
960 void glamo_display_resume(struct glamodrm_handle *gdrm)
961 {
962         struct drm_crtc *crtc = gdrm->crtc;
963         struct glamo_crtc *gcrtc = to_glamo_crtc(crtc);
964
965         glamo_engine_enable(gdrm->glamo_core, GLAMO_ENGINE_LCD);
966         glamo_engine_reset(gdrm->glamo_core, GLAMO_ENGINE_LCD);
967         glamo_run_lcd_script(gdrm, lcd_init_script,
968                                    ARRAY_SIZE(lcd_init_script));
969
970         if ( gcrtc->current_mode_set ) {
971                 glamo_crtc_mode_set(crtc, &gcrtc->current_mode,
972                                     &gcrtc->current_mode, 0, 0,
973                                     gcrtc->current_fb);
974         }
975 }