gta02_use_new_fiq_and_hdq_stuff.patch
authorBalaji Rao <balajirrao@openmoko.org>
Sun, 22 Feb 2009 04:40:03 +0000 (04:40 +0000)
committerAndy Green <agreen@octopus.localdomain>
Sun, 22 Feb 2009 04:40:03 +0000 (04:40 +0000)
Signed-off-by: Balaji Rao <balajirrao@openmoko.org>
arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h [deleted file]
arch/arm/mach-s3c2442/Kconfig
arch/arm/mach-s3c2442/fiq_c_isr.c [deleted file]
arch/arm/mach-s3c2442/fiq_c_isr.h [deleted file]
arch/arm/mach-s3c2442/mach-gta02.c
drivers/leds/leds-neo1973-vibrator.c
drivers/power/Kconfig
drivers/power/Makefile
drivers/power/gta02_hdq.c [deleted file]

diff --git a/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h b/arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h
deleted file mode 100644 (file)
index 401d1fb..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef _LINUX_FIQ_IPC_H
-#define _LINUX_FIQ_IPC_H
-
-/*
- * this defines the struct which is used to communicate between the FIQ
- * world and the normal linux kernel world.  One of these structs is
- * statically defined for you in the monolithic kernel so the FIQ ISR code
- * can safely touch it any any time.
- *
- * You also want to include this file in your kernel module that wants to
- * communicate with your FIQ code.  Add any kinds of vars that are used by
- * the FIQ ISR and the module in here.
- *
- * To get you started there is just an int that is incremented every FIQ
- * you can remove this when you are ready to customize, but it is useful
- * for testing
- */
-
-#include <plat/pwm.h>
-#include <plat/regs-timer.h>
-
-extern u8 fiq_ready;
-
-enum hdq_bitbang_states {
-       HDQB_IDLE = 0,
-       HDQB_TX_BREAK,
-       HDQB_TX_BREAK_RECOVERY,
-       HDQB_ADS_CALC,
-       HDQB_ADS_LOW,
-       HDQB_ADS_HIGH,
-       HDQB_WAIT_RX,
-       HDQB_DATA_RX_LOW,
-       HDQB_DATA_RX_HIGH,
-       HDQB_WAIT_TX,
-};
-
-struct fiq_ipc {
-       /* vibrator */
-       unsigned long vib_gpio_pin; /* which pin to meddle with */
-       u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
-       u8 vib_pwm_latched;
-
-       /* hdq */
-       u8 hdq_probed; /* nonzero after HDQ driver probed */
-       struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */
-       unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */
-       u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */
-       u8 hdq_tx_data; /* data to tx for write action */
-       u8 hdq_rx_data; /* data received in read action */
-       u8 hdq_request_ctr; /* incremented by "user" to request a transfer */
-       u8 hdq_transaction_ctr; /* incremented after each transfer */
-       u8 hdq_error; /* 0 = no error */
-};
-
-/* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */
-extern struct fiq_ipc fiq_ipc;
-extern unsigned long _fiq_count_fiqs;
-extern void fiq_kick(void);  /* provoke a FIQ "immediately" */
-
-#endif /* _LINUX_FIQ_IPC_H */
index 991ed6a..0d2dd03 100644 (file)
@@ -17,15 +17,6 @@ config CPU_S3C2442
        help
          Support for S3C2442 Samsung Mobile CPU based systems.
 
-config S3C2440_C_FIQ
-       bool "FIQ ISR support in C"
-       depends on ARCH_S3C2410
-       select FIQ
-       help
-         Support for S3C2440 FIQ support in C -- see
-         ./arch/arm/mach-s3c2440/fiq_c_isr.c
-
-
 
 menu "S3C2442 Machines"
 
@@ -43,6 +34,7 @@ config MACH_NEO1973_GTA02
        select MACH_NEO1973
        select S3C_PWM
        select S3C2410_CLOCK
+       select FIQ
        help
           Say Y here if you are using the FIC Neo1973 GSM Phone
 
diff --git a/arch/arm/mach-s3c2442/fiq_c_isr.c b/arch/arm/mach-s3c2442/fiq_c_isr.c
deleted file mode 100644 (file)
index e172830..0000000
+++ /dev/null
@@ -1,321 +0,0 @@
-/*
- * Copyright 2007  Andy Green <andy@warmcat.com>
- * S3C modfifications
- * Copyright 2008 Andy Green <andy@openmoko.com>
- */
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <mach/hardware.h>
-#include <asm/fiq.h>
-#include "fiq_c_isr.h"
-#include <linux/sysfs.h>
-#include <linux/device.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-
-#include <asm/io.h>
-
-#include <plat/cpu.h>
-#include <plat/irq.h>
-
-#include <plat/pwm.h>
-#include <plat/regs-timer.h>
-
-/*
- * Major Caveats for using FIQ
- * ---------------------------
- *
- * 1) it CANNOT touch any vmalloc()'d memory, only memory
- *    that was kmalloc()'d.  Static allocations in the monolithic kernel
- *    are kmalloc()'d so they are okay.  You can touch memory-mapped IO, but
- *    the pointer for it has to have been stored in kmalloc'd memory.  The
- *    reason for this is simple: every now and then Linux turns off interrupts
- *    and reorders the paging tables.  If a FIQ happens during this time, the
- *    virtual memory space can be partly or entirely disordered or missing.
- *
- * 2) Because vmalloc() is used when a module is inserted, THIS FIQ
- *    ISR HAS TO BE IN THE MONOLITHIC KERNEL, not a module.  But the way
- *    it is set up, you can all to enable and disable it from your module
- *    and intercommunicate with it through struct fiq_ipc
- *    fiq_ipc which you can define in
- *    asm/archfiq_ipc_type.h.  The reason is the same as above, a
- *    FIQ could happen while even the ISR is not present in virtual memory
- *    space due to pagetables being changed at the time.
- *
- * 3) You can't call any Linux API code except simple macros
- *    - understand that FIQ can come in at any time, no matter what
- *      state of undress the kernel may privately be in, thinking it
- *      locked the door by turning off interrupts... FIQ is an
- *      unstoppable monster force (which is its value)
- *    - they are not vmalloc()'d memory safe
- *    - they might do crazy stuff like sleep: FIQ pisses fire and
- *      is not interested in 'sleep' that the weak seem to need
- *    - calling APIs from FIQ can re-enter un-renterable things
- *    - summary: you cannot interoperate with linux APIs directly in the FIQ ISR
- *
- * If you follow these rules, it is fantastic, an extremely powerful, solid,
- * genuine hard realtime feature.
- *
- */
-
-/* more than enough to cover our jump instruction to the isr */
-#define SIZEOF_FIQ_JUMP 4
-
-#define FIQ_VECTOR 0xffff001c
-
-/* we put the stack at the area after the FIQ vector */
-#define FIQ_STACK_SIZE 256
-
-/* only one FIQ ISR possible, okay to do these here */
-u32 _fiq_ack_mask; /* used by isr exit define */
-unsigned long _fiq_count_fiqs; /* used by isr exit define */
-static int _fiq_irq; /* private ; irq index we were started with, or 0 */
-struct s3c2410_pwm pwm_timer_fiq;
-int _fiq_timer_index;
-u16 _fiq_timer_divisor;
-u8 fiq_ready;
-
-/* this function must live in the monolithic kernel somewhere!  A module is
- * NOT good enough!
- */
-extern void __attribute__ ((naked)) s3c2440_fiq_isr(void);
-
-static void fiq_set_vector_and_regs(void);
-
-
-/* this is copied into the hard FIQ vector during init */
-
-static void __attribute__ ((naked)) s3c2440_FIQ_Branch(void)
-{
-       asm __volatile__ (
-               "mov pc, r8 ; "
-       );
-}
-
-/* sysfs */
-
-static ssize_t show_count(struct device *dev, struct device_attribute *attr,
-                        char *buf)
-{
-       return sprintf(buf, "%ld\n", _fiq_count_fiqs);
-}
-
-static DEVICE_ATTR(count, 0444, show_count, NULL);
-
-static struct attribute *s3c2440_fiq_sysfs_entries[] = {
-       &dev_attr_count.attr,
-       NULL
-};
-
-static struct attribute_group s3c2440_fiq_attr_group = {
-       .name   = "fiq",
-       .attrs  = s3c2440_fiq_sysfs_entries,
-};
-
-/*
- * call this from your kernel module to set up the FIQ ISR to service FIQs,
- * You need to have configured your FIQ input pin before anything will happen
- *
- * call it with, eg, IRQ_TIMER3 from asm-arm/arch-s3c2410/irqs.h
- *
- * you still need to clear the source interrupt in S3C2410_INTMSK to get
- * anything good happening
- */
-static int fiq_init_irq_source(int irq_index_fiq)
-{
-       int rc = 0;
-
-       if (!irq_index_fiq) /* no interrupt */
-               goto bail;
-
-       local_fiq_disable();
-
-       _fiq_irq = irq_index_fiq;
-       _fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
-       _fiq_timer_index = (irq_index_fiq - IRQ_TIMER0);
-
-       /* set up the timer to operate as a pwm device */
-
-       rc = s3c2410_pwm_init(&pwm_timer_fiq);
-       if (rc)
-               goto bail;
-
-       pwm_timer_fiq.timerid = PWM0 + _fiq_timer_index;
-       pwm_timer_fiq.prescaler = (6 - 1) / 2;
-       pwm_timer_fiq.divider = S3C2410_TCFG1_MUX3_DIV2;
-       /* default rate == ~32us */
-       pwm_timer_fiq.counter = pwm_timer_fiq.comparer = 3000;
-
-       rc = s3c2410_pwm_enable(&pwm_timer_fiq);
-       if (rc)
-               goto bail;
-
-       s3c2410_pwm_start(&pwm_timer_fiq);
-
-       _fiq_timer_divisor = 0xffff; /* so kick will work initially */
-
-       /* let our selected interrupt be a magic FIQ interrupt */
-       __raw_writel(_fiq_ack_mask, S3C2410_INTMOD);
-
-       /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
-       local_fiq_enable();
-bail:
-       return rc;
-}
-
-
-/* call this from your kernel module to disable generation of FIQ actions */
-static void fiq_disable_irq_source(void)
-{
-       /* nothing makes FIQ any more */
-       __raw_writel(0, S3C2410_INTMOD);
-       local_fiq_disable();
-       _fiq_irq = 0; /* no active source interrupt now either */
-}
-
-/*
- * fiq_kick() forces a FIQ event to happen shortly after leaving the routine
- */
-void fiq_kick(void)
-{
-       unsigned long flags;
-       u32 tcon;
-
-       if (!fiq_ready) {
-               printk(KERN_ERR "fiq_kick called before fiq probed\n");
-               return;
-       }
-       
-       /* we have to take care about FIQ because this modification is
-        * non-atomic, FIQ could come in after the read and before the
-        * writeback and its changes to the register would be lost
-        * (platform INTMSK mod code is taken care of already)
-        */
-       local_save_flags(flags);
-       local_fiq_disable();
-       /* allow FIQs to resume */
-       __raw_writel(__raw_readl(S3C2410_INTMSK) &
-                    ~(1 << (_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
-                    S3C2410_INTMSK);
-       tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
-       /* fake the timer to a count of 1 */
-       __raw_writel(1, S3C2410_TCNTB(_fiq_timer_index));
-       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
-       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
-                    S3C2410_TCON);
-       __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON);
-       local_irq_restore(flags);
-}
-EXPORT_SYMBOL_GPL(fiq_kick);
-
-
-
-
-static int __init sc32440_fiq_probe(struct platform_device *pdev)
-{
-       struct resource *r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
-       struct sc32440_fiq_platform_data *pdata = pdev->dev.platform_data;
-       int ret;
-
-       if (!r)
-               return -EIO;
-
-       /* configure for the interrupt we are meant to use */
-       printk(KERN_INFO "Enabling FIQ using irq %d\n", r->start);
-
-       fiq_set_vector_and_regs();
-       fiq_init_irq_source(r->start);
-
-       ret = sysfs_create_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
-       if (ret)
-               return ret;
-       
-       fiq_ready = 1;
-
-       /*
-        * if wanted, users can defer registration of devices
-        * that depend on FIQ until after we register, and can use our
-        * device as parent so suspend-resume ordering is correct
-        */
-       if (pdata->attach_child_devices)
-               (pdata->attach_child_devices)(&pdev->dev);
-
-       return 0;
-}
-
-static int sc32440_fiq_remove(struct platform_device *pdev)
-{
-       fiq_disable_irq_source();
-       sysfs_remove_group(&pdev->dev.kobj, &s3c2440_fiq_attr_group);
-
-       return 0;
-}
-
-static void fiq_set_vector_and_regs(void)
-{
-       struct pt_regs regs;
-
-       /* prep the special FIQ mode regs */
-       memset(&regs, 0, sizeof(regs));
-       regs.ARM_r8 = (unsigned long)s3c2440_fiq_isr;
-       regs.ARM_r10 = FIQ_VECTOR + SIZEOF_FIQ_JUMP;
-       regs.ARM_sp = FIQ_VECTOR + SIZEOF_FIQ_JUMP + FIQ_STACK_SIZE - 4;
-       
-       /* copy our jump to the real ISR into the hard vector address */
-       set_fiq_handler(s3c2440_FIQ_Branch, SIZEOF_FIQ_JUMP);
-
-       /* set up the special FIQ-mode-only registers from our regs */
-       set_fiq_regs(&regs);
-}
-
-#ifdef CONFIG_PM
-static int sc32440_fiq_suspend(struct platform_device *pdev, pm_message_t state)
-{
-       /* nothing makes FIQ any more */
-       __raw_writel(0, S3C2410_INTMOD);
-       local_fiq_disable();
-
-       return 0;
-}
-
-static int sc32440_fiq_resume(struct platform_device *pdev)
-{
-       fiq_set_vector_and_regs();
-       fiq_init_irq_source(_fiq_irq);
-       return 0;
-}
-#else
-#define sc32440_fiq_suspend    NULL
-#define sc32440_fiq_resume     NULL
-#endif
-
-static struct platform_driver sc32440_fiq_driver = {
-       .driver = {
-               .name   = "sc32440_fiq",
-               .owner  = THIS_MODULE,
-       },
-
-       .probe   = sc32440_fiq_probe,
-       .remove  = __devexit_p(sc32440_fiq_remove),
-       .suspend = sc32440_fiq_suspend,
-       .resume  = sc32440_fiq_resume,
-};
-
-static int __init sc32440_fiq_init(void)
-{
-       fiq_set_vector_and_regs();
-
-       return platform_driver_register(&sc32440_fiq_driver);
-}
-
-static void __exit sc32440_fiq_exit(void)
-{
-       fiq_disable_irq_source();
-}
-
-MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
-MODULE_LICENSE("GPL");
-
-module_init(sc32440_fiq_init);
-module_exit(sc32440_fiq_exit);
diff --git a/arch/arm/mach-s3c2442/fiq_c_isr.h b/arch/arm/mach-s3c2442/fiq_c_isr.h
deleted file mode 100644 (file)
index e92b103..0000000
+++ /dev/null
@@ -1,76 +0,0 @@
-#ifndef _LINUX_FIQ_C_ISR_H
-#define _LINUX_FIQ_C_ISR_H
-
-#include <mach/regs-irq.h>
-#include <linux/platform_device.h>
-
-extern unsigned long _fiq_count_fiqs;
-extern u32 _fiq_ack_mask;
-extern int _fiq_timer_index;
-extern u16 _fiq_timer_divisor;
-
-/* platform data */
-
-struct sc32440_fiq_platform_data {
-       /*
-        * give an opportunity to use us as parent for
-        * devices that depend on us
-        */
-       void (*attach_child_devices)(struct device *parent_device);
-};
-
-/* This CANNOT be implemented in a module -- it has to be used in code
- * included in the monolithic kernel
- */
-
-#define FIQ_HANDLER_START() \
-void __attribute__ ((naked)) s3c2440_fiq_isr(void) \
-{\
-       /*\
-        * you can declare local vars here, take care to set the frame size\
-        *  below accordingly if there are more than a few dozen bytes of them\
-        */\
-
-/* stick your locals here :-)
- * Do NOT initialize them here!  define them and initialize them after
- * FIQ_HANDLER_ENTRY() is done.
- */
-
-#define FIQ_HANDLER_ENTRY(LOCALS, FRAME) \
-       const int _FIQ_FRAME_SIZE = FRAME; \
-       /* entry takes care to store registers we will be treading on here */\
-       asm __volatile__ (\
-               /* stash FIQ and r0-r8 normal regs */\
-               "stmdb  sp!, {r0-r12, lr};"\
-               /* allow SP to get some space */\
-               "sub     sp, sp, %1 ;"\
-               /* !! THIS SETS THE FRAME, adjust to > sizeof locals */\
-               "sub     fp, sp, %0 ;"\
-               :\
-               : "rI" (LOCALS), "rI" (FRAME)\
-               :"r9"\
-       );
-
-/* stick your ISR code here and then end with... */
-
-#define FIQ_HANDLER_END() \
-       _fiq_count_fiqs++;\
-       __raw_writel(_fiq_ack_mask, S3C2410_SRCPND);\
-\
-       /* exit back to normal mode restoring everything */\
-       asm __volatile__ (\
-               /* pop our allocation */\
-               "add     sp, sp, %0 ;"\
-               /* return FIQ regs back to pristine state\
-                * and get normal regs back\
-                */\
-               "ldmia  sp!, {r0-r12, lr};"\
-\
-               /* return */\
-               "subs   pc, lr, #4;"\
-               : \
-               : "rI" (_FIQ_FRAME_SIZE) \
-       );\
-}
-
-#endif /* _LINUX_FIQ_C_ISR_H */
index ffc72fb..ff102fa 100644 (file)
@@ -76,6 +76,7 @@
 #include <mach/spi-gpio.h>
 #include <mach/usb-control.h>
 #include <mach/regs-mem.h>
+#include <plat/pwm.h>
 
 #include <mach/gta02.h>
 
 #include <asm/plat-s3c24xx/neo1973.h>
 #include <mach/neo1973-pm-gsm.h>
 #include <mach/gta02-pm-wlan.h>
+#include <plat/regs-timer.h>
 
 #include <linux/jbt6k74.h>
 
 #include <linux/glamofb.h>
 
-#include <mach/fiq_ipc_gta02.h>
-#include "fiq_c_isr.h"
-#include <linux/gta02_hdq.h>
+#include <linux/hdq.h>
 #include <linux/bq27000_battery.h>
 
 #include <linux/i2c.h>
 #include <../drivers/input/touchscreen/ts_filter_group.h>
 #endif
 
+#include <asm/fiq.h>
+
+#include <linux/neo1973_vibrator.h>
+
 /* arbitrates which sensor IRQ owns the shared SPI bus */
 static spinlock_t motion_irq_lock;
 
-/* define FIQ IPC struct */
-/*
- * contains stuff FIQ ISR modifies and normal kernel code can see and use
- * this is defined in <arch/arm/mach-s3c2410/include/mach/fiq_ipc_gta02.h>, you should customize
- * the definition in there and include the same definition in your kernel
- * module that wants to interoperate with your FIQ code.
+
+/* -------------------------------------------------------------------------------
+ * GTA02 FIQ related
+ *
+ * Calls into vibrator and hdq and based on the return values
+ * determines if we the FIQ source be kept alive
  */
-struct fiq_ipc fiq_ipc;
-EXPORT_SYMBOL(fiq_ipc);
 
 #define DIVISOR_FROM_US(x) ((x) << 3)
 
-#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100)
+#ifdef CONFIG_HDQ_GPIO_BITBANG
+#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(20)
+extern int hdq_fiq_handler(void);
+#endif
 
-#ifdef CONFIG_GTA02_HDQ
-/* HDQ specific */
-#define HDQ_SAMPLE_PERIOD_US 20
-/* private HDQ FSM state -- all other info interesting for caller in fiq_ipc */
-static enum hdq_bitbang_states hdq_state;
-static u8 hdq_ctr;
-static u8 hdq_ctr2;
-static u8 hdq_bit;
-static u8 hdq_shifter;
-static u8 hdq_tx_data_done;
-
-#define FIQ_DIVISOR_HDQ DIVISOR_FROM_US(HDQ_SAMPLE_PERIOD_US)
+#ifdef CONFIG_LEDS_NEO1973_VIBRATOR
+#define FIQ_DIVISOR_VIBRATOR DIVISOR_FROM_US(100)
+extern int neo1973_vibrator_fiq_handler(void);
 #endif
-/* define FIQ ISR */
 
-FIQ_HANDLER_START()
-/* define your locals here -- no initializers though */
-       u16 divisor;
-FIQ_HANDLER_ENTRY(64, 64)
-/* Your ISR here :-) */
-       divisor = 0xffff;
+/* Global data related to our fiq source */
+static u32 gta02_fiq_ack_mask;
+static struct s3c2410_pwm gta02_fiq_pwm_timer;
+static u16 gta02_fiq_timer_index;
+static int gta02_fiq_irq;
+
+static void gta02_fiq_handler(void)
+{
+       u16 divisor = 0xffff;
 
        /* Vibrator servicing */
 
-       if (fiq_ipc.vib_pwm_latched || fiq_ipc.vib_pwm) { /* not idle */
-               if (((u8)_fiq_count_fiqs) == fiq_ipc.vib_pwm_latched)
-                       neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 0);
-               if (((u8)_fiq_count_fiqs) == 0) {
-                       fiq_ipc.vib_pwm_latched = fiq_ipc.vib_pwm;
-                       if (fiq_ipc.vib_pwm_latched)
-                               neo1973_gpb_setpin(fiq_ipc.vib_gpio_pin, 1);
-               }
+       /* disable further timer interrupts if nobody has any work
+        * or adjust rate according to who still has work
+        *
+        * CAUTION: it means forground code must disable FIQ around
+        * its own non-atomic S3C2410_INTMSK changes... not common
+        * thankfully and taken care of by the fiq-basis patch
+        */
+
+#ifdef CONFIG_LEDS_NEO1973_VIBRATOR
+       if (neo1973_vibrator_fiq_handler())
                divisor = FIQ_DIVISOR_VIBRATOR;
-       }
+#endif
 
-#ifdef CONFIG_GTA02_HDQ
-       /* HDQ servicing */
+#ifdef CONFIG_HDQ_GPIO_BITBANG
+       if (hdq_fiq_handler())
+               divisor = FIQ_DIVISOR_HDQ;
+#endif
 
-       switch (hdq_state) {
-       case HDQB_IDLE:
-               if (fiq_ipc.hdq_request_ctr == fiq_ipc.hdq_transaction_ctr)
-                       break;
-               hdq_ctr = 210 / HDQ_SAMPLE_PERIOD_US;
-               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
-               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
-               hdq_tx_data_done = 0;
-               hdq_state = HDQB_TX_BREAK;
-               break;
+       if (divisor == 0xffff) /* mask the fiq irq source */
+               __raw_writel(__raw_readl(S3C2410_INTMSK) | gta02_fiq_ack_mask,
+                            S3C2410_INTMSK);
+       else /* still working, maybe at a different rate */
+               __raw_writel(divisor, S3C2410_TCNTB(gta02_fiq_timer_index));
 
-       case HDQB_TX_BREAK: /* issue low for > 190us */
-               if (--hdq_ctr == 0) {
-                       hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
-                       hdq_state = HDQB_TX_BREAK_RECOVERY;
-                       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
-               }
-               break;
+       __raw_writel(gta02_fiq_ack_mask, S3C2410_SRCPND);
+}
 
-       case HDQB_TX_BREAK_RECOVERY: /* issue low for > 40us */
-               if (--hdq_ctr)
-                       break;
-               hdq_shifter = fiq_ipc.hdq_ads;
-               hdq_bit = 8; /* 8 bits of ads / rw */
-               hdq_tx_data_done = 0; /* doing ads */
-               /* fallthru on last one */
-       case HDQB_ADS_CALC:
-               if (hdq_shifter & 1)
-                       hdq_ctr = 50 / HDQ_SAMPLE_PERIOD_US;
-               else
-                       hdq_ctr = 120 / HDQ_SAMPLE_PERIOD_US;
-               /* carefully precompute the other phase length */
-               hdq_ctr2 = (210 - (hdq_ctr * HDQ_SAMPLE_PERIOD_US)) /
-                               HDQ_SAMPLE_PERIOD_US;
-               hdq_state = HDQB_ADS_LOW;
-               hdq_shifter >>= 1;
-               hdq_bit--;
-               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
-               break;
+static void gta02_fiq_kick(void)
+{
+       unsigned long flags;
+       u32 tcon;
+       
+       /* we have to take care about FIQ because this modification is
+        * non-atomic, FIQ could come in after the read and before the
+        * writeback and its changes to the register would be lost
+        * (platform INTMSK mod code is taken care of already)
+        */
+       local_save_flags(flags);
+       local_fiq_disable();
+       /* allow FIQs to resume */
+       __raw_writel(__raw_readl(S3C2410_INTMSK) &
+                    ~(1 << (gta02_fiq_irq - S3C2410_CPUIRQ_OFFSET)),
+                    S3C2410_INTMSK);
+       tcon = __raw_readl(S3C2410_TCON) & ~S3C2410_TCON_T3START;
+       /* fake the timer to a count of 1 */
+       __raw_writel(1, S3C2410_TCNTB(gta02_fiq_timer_index));
+       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD, S3C2410_TCON);
+       __raw_writel(tcon | S3C2410_TCON_T3MANUALUPD | S3C2410_TCON_T3START,
+                    S3C2410_TCON);
+       __raw_writel(tcon | S3C2410_TCON_T3START, S3C2410_TCON);
+       local_irq_restore(flags);
+}
 
-       case HDQB_ADS_LOW:
-               if (--hdq_ctr)
-                       break;
-               s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
-               hdq_state = HDQB_ADS_HIGH;
-               break;
+static int gta02_fiq_enable(void)
+{
+       int irq_index_fiq = IRQ_TIMER3;
+       int rc = 0;
 
-       case HDQB_ADS_HIGH:
-               if (--hdq_ctr2 > 1) /* account for HDQB_ADS_CALC */
-                       break;
-               if (hdq_bit) { /* more bits to do */
-                       hdq_state = HDQB_ADS_CALC;
-                       break;
-               }
-               /* no more bits, wait it out until hdq_ctr2 exhausted */
-               if (hdq_ctr2)
-                       break;
-               /* ok no more bits and very last state */
-               hdq_ctr = 60 / HDQ_SAMPLE_PERIOD_US;
-               /* FIXME 0 = read */
-               if (fiq_ipc.hdq_ads & 0x80) { /* write the byte out */
-                        /* set delay before payload */
-                       hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
-                       /* already high, no need to write */
-                       hdq_state = HDQB_WAIT_TX;
-                       break;
-               }
-               /* read the next byte */
-               hdq_bit = 8; /* 8 bits of data */
-               hdq_ctr = 3000 / HDQ_SAMPLE_PERIOD_US;
-               hdq_state = HDQB_WAIT_RX;
-               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
-               break;
+       local_fiq_disable();
 
-       case HDQB_WAIT_TX: /* issue low for > 40us */
-               if (--hdq_ctr)
-                       break;
-               if (!hdq_tx_data_done) { /* was that the data sent? */
-                       hdq_tx_data_done++;
-                       hdq_shifter = fiq_ipc.hdq_tx_data;
-                       hdq_bit = 8; /* 8 bits of data */
-                       hdq_state = HDQB_ADS_CALC; /* start sending */
-                       break;
-               }
-               fiq_ipc.hdq_error = 0;
-               fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr;
-               hdq_state = HDQB_IDLE; /* all tx is done */
-               /* idle in input mode, it's pulled up by 10K */
-               s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_INPUT);
-               break;
+       gta02_fiq_irq = irq_index_fiq;
+       gta02_fiq_ack_mask = 1 << (irq_index_fiq - S3C2410_CPUIRQ_OFFSET);
+       gta02_fiq_timer_index = (irq_index_fiq - IRQ_TIMER0);
 
-       case HDQB_WAIT_RX: /* wait for battery to talk to us */
-               if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin) == 0) {
-                       /* it talks to us! */
-                       hdq_ctr2 = 1;
-                       hdq_bit = 8; /* 8 bits of data */
-                       /* timeout */
-                       hdq_ctr = 300 / HDQ_SAMPLE_PERIOD_US;
-                       hdq_state = HDQB_DATA_RX_LOW;
-                       break;
-               }
-               if (--hdq_ctr == 0) { /* timed out, error */
-                       fiq_ipc.hdq_error = 1;
-                       fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr;
-                       hdq_state = HDQB_IDLE; /* abort */
-               }
-               break;
+       /* set up the timer to operate as a pwm device */
 
-       /*
-        * HDQ basically works by measuring the low time of the bit cell
-        * 32-50us --> '1', 80 - 145us --> '0'
-        */
+       rc = s3c2410_pwm_init(&gta02_fiq_pwm_timer);
+       if (rc)
+               goto bail;
 
-       case HDQB_DATA_RX_LOW:
-               if (s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
-                       fiq_ipc.hdq_rx_data >>= 1;
-                       if (hdq_ctr2 <= (65 / HDQ_SAMPLE_PERIOD_US))
-                               fiq_ipc.hdq_rx_data |= 0x80;
-
-                       if (--hdq_bit == 0) {
-                               fiq_ipc.hdq_error = 0;
-                               fiq_ipc.hdq_transaction_ctr =
-                                                       fiq_ipc.hdq_request_ctr;
-
-                               hdq_state = HDQB_IDLE;
-                       } else
-                               hdq_state = HDQB_DATA_RX_HIGH;
-                       /* timeout */
-                       hdq_ctr = 1000 / HDQ_SAMPLE_PERIOD_US;
-                       hdq_ctr2 = 1;
-                       break;
-               }
-               hdq_ctr2++;
-               if (--hdq_ctr)
-                       break;
-                /* timed out, error */
-               fiq_ipc.hdq_error = 2;
-               fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr;
-               hdq_state = HDQB_IDLE; /* abort */
-               break;
+       gta02_fiq_pwm_timer.timerid = PWM0 + gta02_fiq_timer_index;
+       gta02_fiq_pwm_timer.prescaler = (6 - 1) / 2;
+       gta02_fiq_pwm_timer.divider = S3C2410_TCFG1_MUX3_DIV2;
+       /* default rate == ~32us */
+       gta02_fiq_pwm_timer.counter = gta02_fiq_pwm_timer.comparer = 3000;
 
-       case HDQB_DATA_RX_HIGH:
-               if (!s3c2410_gpio_getpin(fiq_ipc.hdq_gpio_pin)) {
-                       /* it talks to us! */
-                       hdq_ctr2 = 1;
-                       /* timeout */
-                       hdq_ctr = 400 / HDQ_SAMPLE_PERIOD_US;
-                       hdq_state = HDQB_DATA_RX_LOW;
-                       break;
-               }
-               if (--hdq_ctr)
-                       break;
-               /* timed out, error */
-               fiq_ipc.hdq_error = 3;
-               fiq_ipc.hdq_transaction_ctr = fiq_ipc.hdq_request_ctr;
+       rc = s3c2410_pwm_enable(&gta02_fiq_pwm_timer);
+       if (rc)
+               goto bail;
 
-               /* we're in input mode already */
-               hdq_state = HDQB_IDLE; /* abort */
-               break;
-       }
+       s3c2410_pwm_start(&gta02_fiq_pwm_timer);
 
-       if (hdq_state != HDQB_IDLE) /* ie, not idle */
-               if (divisor > FIQ_DIVISOR_HDQ)
-                       divisor = FIQ_DIVISOR_HDQ; /* keep us going */
-#endif
+       /* let our selected interrupt be a magic FIQ interrupt */
+       __raw_writel(gta02_fiq_ack_mask, S3C2410_INTMOD);
 
-       /* disable further timer interrupts if nobody has any work
-        * or adjust rate according to who still has work
-        *
-        * CAUTION: it means forground code must disable FIQ around
-        * its own non-atomic S3C2410_INTMSK changes... not common
-        * thankfully and taken care of by the fiq-basis patch
-        */
-       if (divisor == 0xffff) /* mask the fiq irq source */
-               __raw_writel(__raw_readl(S3C2410_INTMSK) | _fiq_ack_mask,
-                            S3C2410_INTMSK);
-       else /* still working, maybe at a different rate */
-               __raw_writel(divisor, S3C2410_TCNTB(_fiq_timer_index));
-       _fiq_timer_divisor = divisor;
+       /* it's ready to go as soon as we unmask the source in S3C2410_INTMSK */
+       local_fiq_enable();
 
-FIQ_HANDLER_END()
+       set_fiq_c_handler(gta02_fiq_handler);
+
+bail:
+       printk(KERN_ERR "Count not initialize FIQ for GTA02\n");
+       return rc;
+}
 
+static void gta02_fiq_disable(void)
+{
+       __raw_writel(0, S3C2410_INTMOD);
+       local_fiq_disable();
+       gta02_fiq_irq = 0; /* no active source interrupt now either */
+
+}
+/* -------------------- /GTA02 FIQ Handler ------------------------------------- */
 
 /*
  * this gets called every 1ms when we paniced.
@@ -497,9 +402,9 @@ static int gta02_get_charger_active_status(void)
 struct bq27000_platform_data bq27000_pdata = {
        .name = "battery",
        .rsense_mohms = 20,
-       .hdq_read = gta02hdq_read,
-       .hdq_write = gta02hdq_write,
-       .hdq_initialized = gta02hdq_initialized,
+       .hdq_read = hdq_read,
+       .hdq_write = hdq_write,
+       .hdq_initialized = hdq_initialized,
        .get_charger_online_status = gta02_get_charger_online_status,
        .get_charger_active_status = gta02_get_charger_active_status
 };
@@ -807,7 +712,7 @@ static void mangle_pmu_pdata_by_system_rev(void)
        }
 }
 
-#ifdef CONFIG_GTA02_HDQ
+#ifdef CONFIG_HDQ_GPIO_BITBANG
 /* HDQ */
 
 static void gta02_hdq_attach_child_devices(struct device *parent_device)
@@ -823,6 +728,27 @@ static void gta02_hdq_attach_child_devices(struct device *parent_device)
        }
 }
 
+static void gta02_hdq_gpio_direction_out(void)
+{
+       s3c2410_gpio_cfgpin(GTA02v5_GPIO_HDQ, S3C2410_GPIO_OUTPUT);
+}
+
+static void gta02_hdq_gpio_direction_in(void)
+{
+       s3c2410_gpio_cfgpin(GTA02v5_GPIO_HDQ, S3C2410_GPIO_INPUT);
+}
+
+static void gta02_hdq_gpio_set_value(int val)
+{
+
+       s3c2410_gpio_setpin(GTA02v5_GPIO_HDQ, val);
+}
+
+static int gta02_hdq_gpio_get_value(void)
+{
+       return s3c2410_gpio_getpin(GTA02v5_GPIO_HDQ);
+}
+
 static struct resource gta02_hdq_resources[] = {
        [0] = {
                .start  = GTA02v5_GPIO_HDQ,
@@ -830,12 +756,21 @@ static struct resource gta02_hdq_resources[] = {
        },
 };
 
-struct gta02_hdq_platform_data gta02_hdq_platform_data = {
-       .attach_child_devices = gta02_hdq_attach_child_devices
+struct hdq_platform_data gta02_hdq_platform_data = {
+       .attach_child_devices = gta02_hdq_attach_child_devices,
+       .gpio_dir_out = gta02_hdq_gpio_direction_out,
+       .gpio_dir_in = gta02_hdq_gpio_direction_in,
+       .gpio_set = gta02_hdq_gpio_set_value,
+       .gpio_get = gta02_hdq_gpio_get_value,
+
+       .enable_fiq = gta02_fiq_enable,
+       .disable_fiq = gta02_fiq_disable,
+       .kick_fiq = gta02_fiq_kick,
+
 };
 
 struct platform_device gta02_hdq_device = {
-       .name           = "gta02-hdq",
+       .name           = "hdq",
        .num_resources  = 1,
        .resource       = gta02_hdq_resources,
        .dev            = {
@@ -852,52 +787,19 @@ static struct resource gta02_vibrator_resources[] = {
                .end    = GTA02_GPIO_VIBRATOR_ON,
        },
 };
+struct neo1973_vib_platform_data gta02_vib_pdata = {
+       .enable_fiq = gta02_fiq_enable,
+       .disable_fiq = gta02_fiq_disable,
+       .kick_fiq = gta02_fiq_kick,
+};
 
 static struct platform_device gta02_vibrator_dev = {
        .name           = "neo1973-vibrator",
        .num_resources  = ARRAY_SIZE(gta02_vibrator_resources),
        .resource       = gta02_vibrator_resources,
-};
-
-/* FIQ, used PWM regs, so not child of PWM */
-
-static void gta02_fiq_attach_child_devices(struct device *parent_device)
-{
-#ifdef CONFIG_GTA02_HDQ
-       switch (system_rev) {
-       case GTA02v5_SYSTEM_REV:
-       case GTA02v6_SYSTEM_REV:
-               gta02_hdq_device.dev.parent = parent_device;
-               platform_device_register(&gta02_hdq_device);
-               gta02_vibrator_dev.dev.parent = parent_device;
-               platform_device_register(&gta02_vibrator_dev);
-               break;
-       default:
-               break;
-       }
-#endif
-}
-
-
-static struct resource sc32440_fiq_resources[] = {
-       [0] = {
-               .flags  = IORESOURCE_IRQ,
-               .start  = IRQ_TIMER3,
-               .end    = IRQ_TIMER3,
-       },
-};
-
-struct sc32440_fiq_platform_data gta02_sc32440_fiq_platform_data = {
-       .attach_child_devices = gta02_fiq_attach_child_devices
-};
-
-struct platform_device sc32440_fiq_device = {
-       .name           = "sc32440_fiq",
-       .num_resources  = 1,
-       .resource       = sc32440_fiq_resources,
-       .dev            = {
-               .platform_data = &gta02_sc32440_fiq_platform_data,
-       },
+       .dev     = {
+               .platform_data = &gta02_vib_pdata,
+               },
 };
 
 /* NOR Flash */
@@ -1648,7 +1550,6 @@ static struct platform_device *gta02_devices[] __initdata = {
        &s3c_device_nand,
        &gta02_nor_flash,
 
-       &sc32440_fiq_device,
        &s3c24xx_pwm_device,
        &gta02_led_dev,
        &gta02_pm_wlan_dev, /* not dependent on PMU */
@@ -1789,6 +1690,13 @@ static void __init gta02_machine_init(void)
        enable_irq_wake(GTA02_IRQ_WLAN_GPIO1);
 
        pm_power_off = gta02_poweroff;
+
+       /* Register the HDQ and vibrator as children of pwm device */
+       gta02_vibrator_dev.dev.parent = &s3c24xx_pwm_device.dev; 
+       gta02_hdq_device.dev.parent = &s3c24xx_pwm_device.dev;
+       platform_device_register(&gta02_hdq_device);
+       platform_device_register(&gta02_vibrator_dev);
+
 }
 
 void DEBUG_LED(int n)
index 9508607..e35872b 100644 (file)
 #include <plat/pwm.h>
 #include <mach/gta01.h>
 #include <plat/regs-timer.h>
+#include <linux/neo1973_vibrator.h>
 
-#ifdef CONFIG_MACH_NEO1973_GTA02
-#include <mach/fiq_ipc_gta02.h>
-#endif
 #include <asm/plat-s3c24xx/neo1973.h>
 
 #define COUNTER 64
 
-struct neo1973_vib_priv {
+enum hdq_bitbang_states {
+       HDQB_IDLE = 0,
+       HDQB_TX_BREAK,
+       HDQB_TX_BREAK_RECOVERY,
+       HDQB_ADS_CALC,
+       HDQB_ADS_LOW,
+       HDQB_ADS_HIGH,
+       HDQB_WAIT_RX,
+       HDQB_DATA_RX_LOW,
+       HDQB_DATA_RX_HIGH,
+       HDQB_WAIT_TX,
+};
+
+static struct neo1973_vib_priv {
        struct led_classdev cdev;
        unsigned int gpio;
        spinlock_t lock;
        unsigned int has_pwm;
        struct s3c2410_pwm pwm;
-};
+       
+       unsigned long vib_gpio_pin; /* which pin to meddle with */
+       u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */
+       u8 vib_pwm_latched;
+       u32 fiq_count;
+
+       struct neo1973_vib_platform_data *pdata;
+} neo1973_vib_priv;
+
+int neo1973_vibrator_fiq_handler(void)
+{
+       neo1973_vib_priv.fiq_count++;
+
+       if (neo1973_vib_priv.vib_pwm_latched || neo1973_vib_priv.vib_pwm) { /* not idle */
+               if (((u8)neo1973_vib_priv.fiq_count) == neo1973_vib_priv.vib_pwm_latched)
+                       neo1973_gpb_setpin(neo1973_vib_priv.vib_gpio_pin, 0);
+               if (((u8)neo1973_vib_priv.fiq_count) == 0) {
+                       neo1973_vib_priv.vib_pwm_latched = neo1973_vib_priv.vib_pwm;
+                       if (neo1973_vib_priv.vib_pwm_latched)
+                               neo1973_gpb_setpin(neo1973_vib_priv.vib_gpio_pin, 1);
+               }
+
+               return 1;
+       }
+       return 0;
+}
 
 static void neo1973_vib_vib_set(struct led_classdev *led_cdev,
                                enum led_brightness value)
@@ -48,8 +84,8 @@ static void neo1973_vib_vib_set(struct led_classdev *led_cdev,
 
 #ifdef CONFIG_MACH_NEO1973_GTA02
        if (machine_is_neo1973_gta02()) { /* use FIQ to control GPIO */
-               fiq_ipc.vib_pwm = value; /* set it for FIQ */
-               fiq_kick(); /* start up FIQs if not already going */
+               neo1973_vib_priv.vib_pwm = value; /* set it for FIQ */
+               neo1973_vib_priv.pdata->kick_fiq(); /* start up FIQs if not already going */
                return;
        }
 #endif
@@ -103,6 +139,7 @@ static int neo1973_vib_init_hw(struct neo1973_vib_priv *vp)
 static int neo1973_vib_suspend(struct platform_device *dev, pm_message_t state)
 {
        led_classdev_suspend(&neo1973_vib_led.cdev);
+       neo1973_vib_priv.pdata->disable_fiq();
        return 0;
 }
 
@@ -114,6 +151,7 @@ static int neo1973_vib_resume(struct platform_device *dev)
                neo1973_vib_init_hw(vp);
 
        led_classdev_resume(&neo1973_vib_led.cdev);
+       neo1973_vib_priv.pdata->enable_fiq();
 
        return 0;
 }
@@ -132,6 +170,8 @@ static int __init neo1973_vib_probe(struct platform_device *pdev)
                return -EIO;
 
        neo1973_vib_led.gpio = r->start;
+
+       neo1973_vib_priv.pdata = pdev->dev.platform_data;
        platform_set_drvdata(pdev, &neo1973_vib_led);
 
 #ifdef CONFIG_MACH_NEO1973_GTA02
@@ -139,8 +179,8 @@ static int __init neo1973_vib_probe(struct platform_device *pdev)
                neo1973_gpb_setpin(neo1973_vib_led.gpio, 0); /* off */
                s3c2410_gpio_cfgpin(neo1973_vib_led.gpio, S3C2410_GPIO_OUTPUT);
                /* safe, kmalloc'd copy needed for FIQ ISR */
-               fiq_ipc.vib_gpio_pin = neo1973_vib_led.gpio;
-               fiq_ipc.vib_pwm = 0; /* off */
+               neo1973_vib_priv.vib_gpio_pin = neo1973_vib_led.gpio;
+               neo1973_vib_priv.vib_pwm = 0; /* off */
                goto configured;
        }
 #endif
@@ -167,7 +207,7 @@ static int neo1973_vib_remove(struct platform_device *pdev)
 {
 #ifdef CONFIG_MACH_NEO1973_GTA02
        if (machine_is_neo1973_gta02()) /* use FIQ to control GPIO */
-               fiq_ipc.vib_pwm = 0; /* off */
+               neo1973_vib_priv.vib_pwm = 0; /* off */
        /* would only need kick if already off so no kick needed */
 #endif
 
index 13d5b83..b5332f7 100644 (file)
@@ -93,14 +93,6 @@ config BATTERY_BQ27000_HDQ
        help
          Say Y to enable support for the battery on the Neo Freerunner
 
-config GTA02_HDQ
-       tristate "Neo Freerunner HDQ"
-       depends on MACH_NEO1973_GTA02 && FIQ && S3C2440_C_FIQ
-       help
-         Say Y to enable support for communicating with an HDQ battery
-         on the Neo Freerunner.  You probably want to select
-         at least BATTERY_BQ27000_HDQ as well
-
 config HDQ_GPIO_BITBANG
        bool "Generic gpio based HDQ bitbang"
        help
index 5c421a4..cabf53b 100644 (file)
@@ -31,5 +31,4 @@ obj-$(CONFIG_BATTERY_PALMTX)  += palmtx_battery.o
 obj-$(CONFIG_BATTERY_BQ27000_HDQ)      += bq27000_battery.o
 obj-$(CONFIG_BATTERY_GTA01)    += gta01_battery.o
 
-obj-$(CONFIG_GTA02_HDQ)                += gta02_hdq.o
 obj-$(CONFIG_HDQ_GPIO_BITBANG)  += hdq.o
diff --git a/drivers/power/gta02_hdq.c b/drivers/power/gta02_hdq.c
deleted file mode 100644 (file)
index d51f4c9..0000000
+++ /dev/null
@@ -1,292 +0,0 @@
-/*
- * HDQ driver for the FIC Neo1973 GTA02 GSM phone
- *
- * (C) 2006-2007 by Openmoko, Inc.
- * Author: Andy Green <andy@openmoko.com>
- * All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/platform_device.h>
-#include <mach/hardware.h>
-#include <linux/gta02_hdq.h>
-#include <asm/mach-types.h>
-#include <mach/gta02.h>
-#include <mach/fiq_ipc_gta02.h>
-
-
-
-#define HDQ_READ 0
-#define HDQ_WRITE 0x80
-
-static int fiq_busy(void)
-{
-       int request = (volatile u8)fiq_ipc.hdq_request_ctr;
-       int transact = (volatile u8)fiq_ipc.hdq_transaction_ctr;
-
-       return (request != transact);
-}
-
-int gta02hdq_initialized(void)
-{
-       return fiq_ipc.hdq_probed;
-}
-EXPORT_SYMBOL_GPL(gta02hdq_initialized);
-
-int gta02hdq_read(int address)
-{
-       int count_sleeps = 5;
-       int ret = -ETIME;
-
-       if (!fiq_ipc.hdq_probed)
-               return -EINVAL;
-
-       mutex_lock(&fiq_ipc.hdq_lock);
-
-       fiq_ipc.hdq_error = 0;
-       fiq_ipc.hdq_ads = address | HDQ_READ;
-       fiq_ipc.hdq_request_ctr++;
-       fiq_kick();
-       /*
-        * FIQ takes care of it while we block our calling process
-        * But we're not spinning -- other processes run normally while
-        * we wait for the result
-        */
-       while (count_sleeps--) {
-               msleep(10); /* valid transaction always completes in < 10ms */
-
-               if (fiq_busy())
-                       continue;
-
-               if (fiq_ipc.hdq_error)
-                       goto done; /* didn't see a response in good time */
-
-               ret = fiq_ipc.hdq_rx_data;
-               goto done;
-       }
-
-done:
-       mutex_unlock(&fiq_ipc.hdq_lock);
-       return ret;
-}
-EXPORT_SYMBOL_GPL(gta02hdq_read);
-
-int gta02hdq_write(int address, u8 data)
-{
-       int count_sleeps = 5;
-       int ret = -ETIME;
-
-       if (!fiq_ipc.hdq_probed)
-               return -EINVAL;
-
-       mutex_lock(&fiq_ipc.hdq_lock);
-
-       fiq_ipc.hdq_error = 0;
-       fiq_ipc.hdq_ads = address | HDQ_WRITE;
-       fiq_ipc.hdq_tx_data = data;
-       fiq_ipc.hdq_request_ctr++;
-       fiq_kick();
-       /*
-        * FIQ takes care of it while we block our calling process
-        * But we're not spinning -- other processes run normally while
-        * we wait for the result
-        */
-       while (count_sleeps--) {
-               msleep(10); /* valid transaction always completes in < 10ms */
-
-               if (fiq_busy())
-                       continue; /* something bad with FIQ */
-
-               if (fiq_ipc.hdq_error)
-                       goto done; /* didn't see a response in good time */
-
-               ret = 0;
-               goto done;
-       }
-
-done:
-       mutex_unlock(&fiq_ipc.hdq_lock);
-       return ret;
-}
-EXPORT_SYMBOL_GPL(gta02hdq_write);
-
-/* sysfs */
-
-static ssize_t hdq_sysfs_dump(struct device *dev, struct device_attribute *attr,
-                        char *buf)
-{
-       int n;
-       int v;
-       u8 u8a[128]; /* whole address space for HDQ */
-       char *end = buf;
-
-       if (!fiq_ipc.hdq_probed)
-               return -EINVAL;
-
-       /* the dump does not take care about 16 bit regs, because at this
-        * bus level we don't know about the chip details
-        */
-       for (n = 0; n < sizeof(u8a); n++) {
-               v = gta02hdq_read(n);
-               if (v < 0)
-                       goto bail;
-               u8a[n] = v;
-       }
-
-       for (n = 0; n < sizeof(u8a); n += 16) {
-               hex_dump_to_buffer(u8a + n, sizeof(u8a), 16, 1, end, 4096, 0);
-               end += strlen(end);
-               *end++ = '\n';
-               *end = '\0';
-       }
-       return (end - buf);
-
-bail:
-       return sprintf(buf, "ERROR %d\n", v);
-}
-
-/* you write by <address> <data>, eg, "34 128" */
-
-#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
-
-static ssize_t hdq_sysfs_write(struct device *dev,
-                              struct device_attribute *attr,
-                              const char *buf, size_t count)
-{
-       const char *end = buf + count;
-       int address = atoi(buf);
-
-       if (!fiq_ipc.hdq_probed)
-               return -EINVAL;
-
-       while ((buf != end) && (*buf != ' '))
-               buf++;
-       if (buf >= end)
-               return 0;
-       while ((buf < end) && (*buf == ' '))
-               buf++;
-       if (buf >= end)
-               return 0;
-
-       gta02hdq_write(address, atoi(buf));
-
-       return count;
-}
-
-static DEVICE_ATTR(dump, 0400, hdq_sysfs_dump, NULL);
-static DEVICE_ATTR(write, 0600, NULL, hdq_sysfs_write);
-
-static struct attribute *gta02hdq_sysfs_entries[] = {
-       &dev_attr_dump.attr,
-       &dev_attr_write.attr,
-       NULL
-};
-
-static struct attribute_group gta02hdq_attr_group = {
-       .name   = "hdq",
-       .attrs  = gta02hdq_sysfs_entries,
-};
-
-
-#ifdef CONFIG_PM
-static int gta02hdq_suspend(struct platform_device *pdev, pm_message_t state)
-{
-       /* after 18s of this, the battery monitor will also go to sleep */
-       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 0);
-       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
-       return 0;
-}
-
-static int gta02hdq_resume(struct platform_device *pdev)
-{
-       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
-       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
-       return 0;
-}
-#endif
-
-static int __init gta02hdq_probe(struct platform_device *pdev)
-{
-       struct resource *r = platform_get_resource(pdev, 0, 0);
-       int ret;
-       struct gta02_hdq_platform_data *pdata = pdev->dev.platform_data;
-
-       if (!machine_is_neo1973_gta02())
-               return -EIO;
-
-       if (!r)
-               return -EINVAL;
-
-       if (!fiq_ready) {
-               printk(KERN_ERR "hdq probe fails on fiq not ready\n");
-               return -EINVAL;
-       }
-
-       platform_set_drvdata(pdev, NULL);
-
-       mutex_init(&fiq_ipc.hdq_lock);
-
-       /* set our HDQ comms pin from the platform data */
-       fiq_ipc.hdq_gpio_pin = r->start;
-
-       s3c2410_gpio_setpin(fiq_ipc.hdq_gpio_pin, 1);
-       s3c2410_gpio_cfgpin(fiq_ipc.hdq_gpio_pin, S3C2410_GPIO_OUTPUT);
-
-       ret = sysfs_create_group(&pdev->dev.kobj, &gta02hdq_attr_group);
-       if (ret)
-               return ret;
-
-       fiq_ipc.hdq_probed = 1; /* we are ready to do stuff now */
-
-       /*
-        * if wanted, users can defer registration of devices
-        * that depend on HDQ until after we register, and can use our
-        * device as parent so suspend-resume ordering is correct
-        */
-       if (pdata->attach_child_devices)
-               (pdata->attach_child_devices)(&pdev->dev);
-
-       return 0;
-}
-
-static int gta02hdq_remove(struct platform_device *pdev)
-{
-       sysfs_remove_group(&pdev->dev.kobj, &gta02hdq_attr_group);
-       return 0;
-}
-
-static struct platform_driver gta02hdq_driver = {
-       .probe          = gta02hdq_probe,
-       .remove         = gta02hdq_remove,
-#ifdef CONFIG_PM
-       .suspend        = gta02hdq_suspend,
-       .resume         = gta02hdq_resume,
-#endif
-       .driver         = {
-               .name           = "gta02-hdq",
-       },
-};
-
-static int __init gta02hdq_init(void)
-{
-       return platform_driver_register(&gta02hdq_driver);
-}
-
-static void __exit gta02hdq_exit(void)
-{
-       platform_driver_unregister(&gta02hdq_driver);
-}
-
-module_init(gta02hdq_init);
-module_exit(gta02hdq_exit);
-
-MODULE_AUTHOR("Andy Green <andy@openmoko.com>");
-MODULE_DESCRIPTION("GTA02 HDQ driver");
-MODULE_LICENSE("GPL");