Merge branch 'master' into export-slabh
[kernel.git] / drivers / gpu / drm / radeon / radeon_object.c
1 /*
2  * Copyright 2009 Jerome Glisse.
3  * All Rights Reserved.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the
7  * "Software"), to deal in the Software without restriction, including
8  * without limitation the rights to use, copy, modify, merge, publish,
9  * distribute, sub license, and/or sell copies of the Software, and to
10  * permit persons to whom the Software is furnished to do so, subject to
11  * the following conditions:
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
20  *
21  * The above copyright notice and this permission notice (including the
22  * next paragraph) shall be included in all copies or substantial portions
23  * of the Software.
24  *
25  */
26 /*
27  * Authors:
28  *    Jerome Glisse <glisse@freedesktop.org>
29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30  *    Dave Airlie
31  */
32 #include <linux/list.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include "radeon_drm.h"
36 #include "radeon.h"
37
38
39 int radeon_ttm_init(struct radeon_device *rdev);
40 void radeon_ttm_fini(struct radeon_device *rdev);
41 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
42
43 /*
44  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
45  * function are calling it.
46  */
47
48 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
49 {
50         struct radeon_bo *bo;
51
52         bo = container_of(tbo, struct radeon_bo, tbo);
53         mutex_lock(&bo->rdev->gem.mutex);
54         list_del_init(&bo->list);
55         mutex_unlock(&bo->rdev->gem.mutex);
56         radeon_bo_clear_surface_reg(bo);
57         kfree(bo);
58 }
59
60 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
61 {
62         if (bo->destroy == &radeon_ttm_bo_destroy)
63                 return true;
64         return false;
65 }
66
67 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
68 {
69         u32 c = 0;
70
71         rbo->placement.fpfn = 0;
72         rbo->placement.lpfn = 0;
73         rbo->placement.placement = rbo->placements;
74         rbo->placement.busy_placement = rbo->placements;
75         if (domain & RADEON_GEM_DOMAIN_VRAM)
76                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
77                                         TTM_PL_FLAG_VRAM;
78         if (domain & RADEON_GEM_DOMAIN_GTT)
79                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
80         if (domain & RADEON_GEM_DOMAIN_CPU)
81                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
82         if (!c)
83                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
84         rbo->placement.num_placement = c;
85         rbo->placement.num_busy_placement = c;
86 }
87
88 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
89                         unsigned long size, bool kernel, u32 domain,
90                         struct radeon_bo **bo_ptr)
91 {
92         struct radeon_bo *bo;
93         enum ttm_bo_type type;
94         int r;
95
96         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
97                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
98         }
99         if (kernel) {
100                 type = ttm_bo_type_kernel;
101         } else {
102                 type = ttm_bo_type_device;
103         }
104         *bo_ptr = NULL;
105         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
106         if (bo == NULL)
107                 return -ENOMEM;
108         bo->rdev = rdev;
109         bo->gobj = gobj;
110         bo->surface_reg = -1;
111         INIT_LIST_HEAD(&bo->list);
112
113         radeon_ttm_placement_from_domain(bo, domain);
114         /* Kernel allocation are uninterruptible */
115         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
116                         &bo->placement, 0, 0, !kernel, NULL, size,
117                         &radeon_ttm_bo_destroy);
118         if (unlikely(r != 0)) {
119                 if (r != -ERESTARTSYS)
120                         dev_err(rdev->dev,
121                                 "object_init failed for (%lu, 0x%08X)\n",
122                                 size, domain);
123                 return r;
124         }
125         *bo_ptr = bo;
126         if (gobj) {
127                 mutex_lock(&bo->rdev->gem.mutex);
128                 list_add_tail(&bo->list, &rdev->gem.objects);
129                 mutex_unlock(&bo->rdev->gem.mutex);
130         }
131         return 0;
132 }
133
134 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
135 {
136         bool is_iomem;
137         int r;
138
139         if (bo->kptr) {
140                 if (ptr) {
141                         *ptr = bo->kptr;
142                 }
143                 return 0;
144         }
145         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
146         if (r) {
147                 return r;
148         }
149         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
150         if (ptr) {
151                 *ptr = bo->kptr;
152         }
153         radeon_bo_check_tiling(bo, 0, 0);
154         return 0;
155 }
156
157 void radeon_bo_kunmap(struct radeon_bo *bo)
158 {
159         if (bo->kptr == NULL)
160                 return;
161         bo->kptr = NULL;
162         radeon_bo_check_tiling(bo, 0, 0);
163         ttm_bo_kunmap(&bo->kmap);
164 }
165
166 void radeon_bo_unref(struct radeon_bo **bo)
167 {
168         struct ttm_buffer_object *tbo;
169
170         if ((*bo) == NULL)
171                 return;
172         tbo = &((*bo)->tbo);
173         ttm_bo_unref(&tbo);
174         if (tbo == NULL)
175                 *bo = NULL;
176 }
177
178 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
179 {
180         int r, i;
181
182         if (bo->pin_count) {
183                 bo->pin_count++;
184                 if (gpu_addr)
185                         *gpu_addr = radeon_bo_gpu_offset(bo);
186                 return 0;
187         }
188         radeon_ttm_placement_from_domain(bo, domain);
189         if (domain == RADEON_GEM_DOMAIN_VRAM) {
190                 /* force to pin into visible video ram */
191                 bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
192         }
193         for (i = 0; i < bo->placement.num_placement; i++)
194                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
195         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
196         if (likely(r == 0)) {
197                 bo->pin_count = 1;
198                 if (gpu_addr != NULL)
199                         *gpu_addr = radeon_bo_gpu_offset(bo);
200         }
201         if (unlikely(r != 0))
202                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
203         return r;
204 }
205
206 int radeon_bo_unpin(struct radeon_bo *bo)
207 {
208         int r, i;
209
210         if (!bo->pin_count) {
211                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
212                 return 0;
213         }
214         bo->pin_count--;
215         if (bo->pin_count)
216                 return 0;
217         for (i = 0; i < bo->placement.num_placement; i++)
218                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
219         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
220         if (unlikely(r != 0))
221                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
222         return r;
223 }
224
225 int radeon_bo_evict_vram(struct radeon_device *rdev)
226 {
227         /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
228         if (0 && (rdev->flags & RADEON_IS_IGP)) {
229                 if (rdev->mc.igp_sideport_enabled == false)
230                         /* Useless to evict on IGP chips */
231                         return 0;
232         }
233         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
234 }
235
236 void radeon_bo_force_delete(struct radeon_device *rdev)
237 {
238         struct radeon_bo *bo, *n;
239         struct drm_gem_object *gobj;
240
241         if (list_empty(&rdev->gem.objects)) {
242                 return;
243         }
244         dev_err(rdev->dev, "Userspace still has active objects !\n");
245         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
246                 mutex_lock(&rdev->ddev->struct_mutex);
247                 gobj = bo->gobj;
248                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
249                         gobj, bo, (unsigned long)gobj->size,
250                         *((unsigned long *)&gobj->refcount));
251                 mutex_lock(&bo->rdev->gem.mutex);
252                 list_del_init(&bo->list);
253                 mutex_unlock(&bo->rdev->gem.mutex);
254                 radeon_bo_unref(&bo);
255                 gobj->driver_private = NULL;
256                 drm_gem_object_unreference(gobj);
257                 mutex_unlock(&rdev->ddev->struct_mutex);
258         }
259 }
260
261 int radeon_bo_init(struct radeon_device *rdev)
262 {
263         /* Add an MTRR for the VRAM */
264         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
265                         MTRR_TYPE_WRCOMB, 1);
266         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
267                 rdev->mc.mc_vram_size >> 20,
268                 (unsigned long long)rdev->mc.aper_size >> 20);
269         DRM_INFO("RAM width %dbits %cDR\n",
270                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
271         return radeon_ttm_init(rdev);
272 }
273
274 void radeon_bo_fini(struct radeon_device *rdev)
275 {
276         radeon_ttm_fini(rdev);
277 }
278
279 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
280                                 struct list_head *head)
281 {
282         if (lobj->wdomain) {
283                 list_add(&lobj->list, head);
284         } else {
285                 list_add_tail(&lobj->list, head);
286         }
287 }
288
289 int radeon_bo_list_reserve(struct list_head *head)
290 {
291         struct radeon_bo_list *lobj;
292         int r;
293
294         list_for_each_entry(lobj, head, list){
295                 r = radeon_bo_reserve(lobj->bo, false);
296                 if (unlikely(r != 0))
297                         return r;
298         }
299         return 0;
300 }
301
302 void radeon_bo_list_unreserve(struct list_head *head)
303 {
304         struct radeon_bo_list *lobj;
305
306         list_for_each_entry(lobj, head, list) {
307                 /* only unreserve object we successfully reserved */
308                 if (radeon_bo_is_reserved(lobj->bo))
309                         radeon_bo_unreserve(lobj->bo);
310         }
311 }
312
313 int radeon_bo_list_validate(struct list_head *head)
314 {
315         struct radeon_bo_list *lobj;
316         struct radeon_bo *bo;
317         int r;
318
319         r = radeon_bo_list_reserve(head);
320         if (unlikely(r != 0)) {
321                 return r;
322         }
323         list_for_each_entry(lobj, head, list) {
324                 bo = lobj->bo;
325                 if (!bo->pin_count) {
326                         if (lobj->wdomain) {
327                                 radeon_ttm_placement_from_domain(bo,
328                                                                 lobj->wdomain);
329                         } else {
330                                 radeon_ttm_placement_from_domain(bo,
331                                                                 lobj->rdomain);
332                         }
333                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
334                                                 true, false);
335                         if (unlikely(r))
336                                 return r;
337                 }
338                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
339                 lobj->tiling_flags = bo->tiling_flags;
340         }
341         return 0;
342 }
343
344 void radeon_bo_list_fence(struct list_head *head, void *fence)
345 {
346         struct radeon_bo_list *lobj;
347         struct radeon_bo *bo;
348         struct radeon_fence *old_fence = NULL;
349
350         list_for_each_entry(lobj, head, list) {
351                 bo = lobj->bo;
352                 spin_lock(&bo->tbo.lock);
353                 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
354                 bo->tbo.sync_obj = radeon_fence_ref(fence);
355                 bo->tbo.sync_obj_arg = NULL;
356                 spin_unlock(&bo->tbo.lock);
357                 if (old_fence) {
358                         radeon_fence_unref(&old_fence);
359                 }
360         }
361 }
362
363 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
364                              struct vm_area_struct *vma)
365 {
366         return ttm_fbdev_mmap(vma, &bo->tbo);
367 }
368
369 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
370 {
371         struct radeon_device *rdev = bo->rdev;
372         struct radeon_surface_reg *reg;
373         struct radeon_bo *old_object;
374         int steal;
375         int i;
376
377         BUG_ON(!atomic_read(&bo->tbo.reserved));
378
379         if (!bo->tiling_flags)
380                 return 0;
381
382         if (bo->surface_reg >= 0) {
383                 reg = &rdev->surface_regs[bo->surface_reg];
384                 i = bo->surface_reg;
385                 goto out;
386         }
387
388         steal = -1;
389         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
390
391                 reg = &rdev->surface_regs[i];
392                 if (!reg->bo)
393                         break;
394
395                 old_object = reg->bo;
396                 if (old_object->pin_count == 0)
397                         steal = i;
398         }
399
400         /* if we are all out */
401         if (i == RADEON_GEM_MAX_SURFACES) {
402                 if (steal == -1)
403                         return -ENOMEM;
404                 /* find someone with a surface reg and nuke their BO */
405                 reg = &rdev->surface_regs[steal];
406                 old_object = reg->bo;
407                 /* blow away the mapping */
408                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
409                 ttm_bo_unmap_virtual(&old_object->tbo);
410                 old_object->surface_reg = -1;
411                 i = steal;
412         }
413
414         bo->surface_reg = i;
415         reg->bo = bo;
416
417 out:
418         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
419                                bo->tbo.mem.mm_node->start << PAGE_SHIFT,
420                                bo->tbo.num_pages << PAGE_SHIFT);
421         return 0;
422 }
423
424 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
425 {
426         struct radeon_device *rdev = bo->rdev;
427         struct radeon_surface_reg *reg;
428
429         if (bo->surface_reg == -1)
430                 return;
431
432         reg = &rdev->surface_regs[bo->surface_reg];
433         radeon_clear_surface_reg(rdev, bo->surface_reg);
434
435         reg->bo = NULL;
436         bo->surface_reg = -1;
437 }
438
439 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
440                                 uint32_t tiling_flags, uint32_t pitch)
441 {
442         int r;
443
444         r = radeon_bo_reserve(bo, false);
445         if (unlikely(r != 0))
446                 return r;
447         bo->tiling_flags = tiling_flags;
448         bo->pitch = pitch;
449         radeon_bo_unreserve(bo);
450         return 0;
451 }
452
453 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
454                                 uint32_t *tiling_flags,
455                                 uint32_t *pitch)
456 {
457         BUG_ON(!atomic_read(&bo->tbo.reserved));
458         if (tiling_flags)
459                 *tiling_flags = bo->tiling_flags;
460         if (pitch)
461                 *pitch = bo->pitch;
462 }
463
464 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
465                                 bool force_drop)
466 {
467         BUG_ON(!atomic_read(&bo->tbo.reserved));
468
469         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
470                 return 0;
471
472         if (force_drop) {
473                 radeon_bo_clear_surface_reg(bo);
474                 return 0;
475         }
476
477         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
478                 if (!has_moved)
479                         return 0;
480
481                 if (bo->surface_reg >= 0)
482                         radeon_bo_clear_surface_reg(bo);
483                 return 0;
484         }
485
486         if ((bo->surface_reg >= 0) && !has_moved)
487                 return 0;
488
489         return radeon_bo_get_surface_reg(bo);
490 }
491
492 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
493                            struct ttm_mem_reg *mem)
494 {
495         struct radeon_bo *rbo;
496         if (!radeon_ttm_bo_is_radeon_bo(bo))
497                 return;
498         rbo = container_of(bo, struct radeon_bo, tbo);
499         radeon_bo_check_tiling(rbo, 0, 1);
500 }
501
502 void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
503 {
504         struct radeon_bo *rbo;
505         if (!radeon_ttm_bo_is_radeon_bo(bo))
506                 return;
507         rbo = container_of(bo, struct radeon_bo, tbo);
508         radeon_bo_check_tiling(rbo, 0, 0);
509 }