Linux 2.6.34-rc7
[kernel.git] / sound / pci / oxygen / xonar_cs43xx.c
1 /*
2  * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  *
6  *
7  *  This driver is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License, version 2.
9  *
10  *  This driver is distributed in the hope that it will be useful,
11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  *  GNU General Public License for more details.
14  *
15  *  You should have received a copy of the GNU General Public License
16  *  along with this driver; if not, see <http://www.gnu.org/licenses/>.
17  */
18
19 /*
20  * Xonar D1/DX
21  * -----------
22  *
23  * CMI8788:
24  *
25  * I²C <-> CS4398 (front)
26  *     <-> CS4362A (surround, center/LFE, back)
27  *
28  * GPI 0 <- external power present (DX only)
29  *
30  * GPIO 0 -> enable output to speakers
31  * GPIO 1 -> enable front panel I/O
32  * GPIO 2 -> M0 of CS5361
33  * GPIO 3 -> M1 of CS5361
34  * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
35  *
36  * CS4398:
37  *
38  * AD0 <- 1
39  * AD1 <- 1
40  *
41  * CS4362A:
42  *
43  * AD0 <- 0
44  *
45  * CM9780:
46  *
47  * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
48  */
49
50 #include <linux/pci.h>
51 #include <linux/delay.h>
52 #include <sound/ac97_codec.h>
53 #include <sound/control.h>
54 #include <sound/core.h>
55 #include <sound/pcm.h>
56 #include <sound/pcm_params.h>
57 #include <sound/tlv.h>
58 #include "xonar.h"
59 #include "cs4398.h"
60 #include "cs4362a.h"
61
62 #define GPI_EXT_POWER           0x01
63 #define GPIO_D1_OUTPUT_ENABLE   0x0001
64 #define GPIO_D1_FRONT_PANEL     0x0002
65 #define GPIO_D1_INPUT_ROUTE     0x0100
66
67 #define I2C_DEVICE_CS4398       0x9e    /* 10011, AD1=1, AD0=1, /W=0 */
68 #define I2C_DEVICE_CS4362A      0x30    /* 001100, AD0=0, /W=0 */
69
70 struct xonar_cs43xx {
71         struct xonar_generic generic;
72         u8 cs4398_regs[8];
73         u8 cs4362a_regs[15];
74 };
75
76 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
77 {
78         struct xonar_cs43xx *data = chip->model_data;
79
80         oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
81         if (reg < ARRAY_SIZE(data->cs4398_regs))
82                 data->cs4398_regs[reg] = value;
83 }
84
85 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
86 {
87         struct xonar_cs43xx *data = chip->model_data;
88
89         if (value != data->cs4398_regs[reg])
90                 cs4398_write(chip, reg, value);
91 }
92
93 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
94 {
95         struct xonar_cs43xx *data = chip->model_data;
96
97         oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
98         if (reg < ARRAY_SIZE(data->cs4362a_regs))
99                 data->cs4362a_regs[reg] = value;
100 }
101
102 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
103 {
104         struct xonar_cs43xx *data = chip->model_data;
105
106         if (value != data->cs4362a_regs[reg])
107                 cs4362a_write(chip, reg, value);
108 }
109
110 static void cs43xx_registers_init(struct oxygen *chip)
111 {
112         struct xonar_cs43xx *data = chip->model_data;
113         unsigned int i;
114
115         /* set CPEN (control port mode) and power down */
116         cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
117         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
118         /* configure */
119         cs4398_write(chip, 2, data->cs4398_regs[2]);
120         cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
121         cs4398_write(chip, 4, data->cs4398_regs[4]);
122         cs4398_write(chip, 5, data->cs4398_regs[5]);
123         cs4398_write(chip, 6, data->cs4398_regs[6]);
124         cs4398_write(chip, 7, data->cs4398_regs[7]);
125         cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
126         cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
127                       CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
128         cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
129         cs4362a_write(chip, 0x05, 0);
130         for (i = 6; i <= 14; ++i)
131                 cs4362a_write(chip, i, data->cs4362a_regs[i]);
132         /* clear power down */
133         cs4398_write(chip, 8, CS4398_CPEN);
134         cs4362a_write(chip, 0x01, CS4362A_CPEN);
135 }
136
137 static void xonar_d1_init(struct oxygen *chip)
138 {
139         struct xonar_cs43xx *data = chip->model_data;
140
141         data->generic.anti_pop_delay = 800;
142         data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
143         data->cs4398_regs[2] =
144                 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
145         data->cs4398_regs[4] = CS4398_MUTEP_LOW |
146                 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
147         data->cs4398_regs[5] = 60 * 2;
148         data->cs4398_regs[6] = 60 * 2;
149         data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
150                 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
151         data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
152         data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
153                 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
154         data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
155         data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
156         data->cs4362a_regs[9] = data->cs4362a_regs[6];
157         data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
158         data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
159         data->cs4362a_regs[12] = data->cs4362a_regs[6];
160         data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
161         data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
162
163         oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
164                        OXYGEN_2WIRE_LENGTH_8 |
165                        OXYGEN_2WIRE_INTERRUPT_MASK |
166                        OXYGEN_2WIRE_SPEED_FAST);
167
168         cs43xx_registers_init(chip);
169
170         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
171                           GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
172         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
173                             GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
174
175         xonar_init_cs53x1(chip);
176         xonar_enable_output(chip);
177
178         snd_component_add(chip->card, "CS4398");
179         snd_component_add(chip->card, "CS4362A");
180         snd_component_add(chip->card, "CS5361");
181 }
182
183 static void xonar_dx_init(struct oxygen *chip)
184 {
185         struct xonar_cs43xx *data = chip->model_data;
186
187         data->generic.ext_power_reg = OXYGEN_GPI_DATA;
188         data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
189         data->generic.ext_power_bit = GPI_EXT_POWER;
190         xonar_init_ext_power(chip);
191         xonar_d1_init(chip);
192 }
193
194 static void xonar_d1_cleanup(struct oxygen *chip)
195 {
196         xonar_disable_output(chip);
197         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
198         oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
199 }
200
201 static void xonar_d1_suspend(struct oxygen *chip)
202 {
203         xonar_d1_cleanup(chip);
204 }
205
206 static void xonar_d1_resume(struct oxygen *chip)
207 {
208         oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
209         msleep(1);
210         cs43xx_registers_init(chip);
211         xonar_enable_output(chip);
212 }
213
214 static void set_cs43xx_params(struct oxygen *chip,
215                               struct snd_pcm_hw_params *params)
216 {
217         struct xonar_cs43xx *data = chip->model_data;
218         u8 cs4398_fm, cs4362a_fm;
219
220         if (params_rate(params) <= 50000) {
221                 cs4398_fm = CS4398_FM_SINGLE;
222                 cs4362a_fm = CS4362A_FM_SINGLE;
223         } else if (params_rate(params) <= 100000) {
224                 cs4398_fm = CS4398_FM_DOUBLE;
225                 cs4362a_fm = CS4362A_FM_DOUBLE;
226         } else {
227                 cs4398_fm = CS4398_FM_QUAD;
228                 cs4362a_fm = CS4362A_FM_QUAD;
229         }
230         cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
231         cs4398_write_cached(chip, 2, cs4398_fm);
232         cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
233         cs4362a_write_cached(chip, 6, cs4362a_fm);
234         cs4362a_write_cached(chip, 12, cs4362a_fm);
235         cs4362a_fm &= CS4362A_FM_MASK;
236         cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
237         cs4362a_write_cached(chip, 9, cs4362a_fm);
238 }
239
240 static void update_cs4362a_volumes(struct oxygen *chip)
241 {
242         unsigned int i;
243         u8 mute;
244
245         mute = chip->dac_mute ? CS4362A_MUTE : 0;
246         for (i = 0; i < 6; ++i)
247                 cs4362a_write_cached(chip, 7 + i + i / 2,
248                                      (127 - chip->dac_volume[2 + i]) | mute);
249 }
250
251 static void update_cs43xx_volume(struct oxygen *chip)
252 {
253         cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
254         cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
255         update_cs4362a_volumes(chip);
256 }
257
258 static void update_cs43xx_mute(struct oxygen *chip)
259 {
260         u8 reg;
261
262         reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
263         if (chip->dac_mute)
264                 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
265         cs4398_write_cached(chip, 4, reg);
266         update_cs4362a_volumes(chip);
267 }
268
269 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
270 {
271         struct xonar_cs43xx *data = chip->model_data;
272         u8 reg;
273
274         reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
275         if (mixed)
276                 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
277         else
278                 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
279         cs4362a_write_cached(chip, 9, reg);
280 }
281
282 static const struct snd_kcontrol_new front_panel_switch = {
283         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284         .name = "Front Panel Switch",
285         .info = snd_ctl_boolean_mono_info,
286         .get = xonar_gpio_bit_switch_get,
287         .put = xonar_gpio_bit_switch_put,
288         .private_value = GPIO_D1_FRONT_PANEL,
289 };
290
291 static int rolloff_info(struct snd_kcontrol *ctl,
292                         struct snd_ctl_elem_info *info)
293 {
294         static const char *const names[2] = {
295                 "Fast Roll-off", "Slow Roll-off"
296         };
297
298         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
299         info->count = 1;
300         info->value.enumerated.items = 2;
301         if (info->value.enumerated.item >= 2)
302                 info->value.enumerated.item = 1;
303         strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
304         return 0;
305 }
306
307 static int rolloff_get(struct snd_kcontrol *ctl,
308                        struct snd_ctl_elem_value *value)
309 {
310         struct oxygen *chip = ctl->private_data;
311         struct xonar_cs43xx *data = chip->model_data;
312
313         value->value.enumerated.item[0] =
314                 (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
315         return 0;
316 }
317
318 static int rolloff_put(struct snd_kcontrol *ctl,
319                        struct snd_ctl_elem_value *value)
320 {
321         struct oxygen *chip = ctl->private_data;
322         struct xonar_cs43xx *data = chip->model_data;
323         int changed;
324         u8 reg;
325
326         mutex_lock(&chip->mutex);
327         reg = data->cs4398_regs[7];
328         if (value->value.enumerated.item[0])
329                 reg |= CS4398_FILT_SEL;
330         else
331                 reg &= ~CS4398_FILT_SEL;
332         changed = reg != data->cs4398_regs[7];
333         if (changed) {
334                 cs4398_write(chip, 7, reg);
335                 if (reg & CS4398_FILT_SEL)
336                         reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
337                 else
338                         reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
339                 cs4362a_write(chip, 0x04, reg);
340         }
341         mutex_unlock(&chip->mutex);
342         return changed;
343 }
344
345 static const struct snd_kcontrol_new rolloff_control = {
346         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
347         .name = "DAC Filter Playback Enum",
348         .info = rolloff_info,
349         .get = rolloff_get,
350         .put = rolloff_put,
351 };
352
353 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
354                                           unsigned int reg, unsigned int mute)
355 {
356         if (reg == AC97_LINE) {
357                 spin_lock_irq(&chip->reg_lock);
358                 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
359                                       mute ? GPIO_D1_INPUT_ROUTE : 0,
360                                       GPIO_D1_INPUT_ROUTE);
361                 spin_unlock_irq(&chip->reg_lock);
362         }
363 }
364
365 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
366
367 static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
368 {
369         if (!strncmp(template->name, "CD Capture ", 11))
370                 return 1; /* no CD input */
371         return 0;
372 }
373
374 static int xonar_d1_mixer_init(struct oxygen *chip)
375 {
376         int err;
377
378         err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
379         if (err < 0)
380                 return err;
381         err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
382         if (err < 0)
383                 return err;
384         return 0;
385 }
386
387 static const struct oxygen_model model_xonar_d1 = {
388         .longname = "Asus Virtuoso 100",
389         .chip = "AV200",
390         .init = xonar_d1_init,
391         .control_filter = xonar_d1_control_filter,
392         .mixer_init = xonar_d1_mixer_init,
393         .cleanup = xonar_d1_cleanup,
394         .suspend = xonar_d1_suspend,
395         .resume = xonar_d1_resume,
396         .get_i2s_mclk = oxygen_default_i2s_mclk,
397         .set_dac_params = set_cs43xx_params,
398         .set_adc_params = xonar_set_cs53x1_params,
399         .update_dac_volume = update_cs43xx_volume,
400         .update_dac_mute = update_cs43xx_mute,
401         .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
402         .ac97_switch = xonar_d1_line_mic_ac97_switch,
403         .dac_tlv = cs4362a_db_scale,
404         .model_data_size = sizeof(struct xonar_cs43xx),
405         .device_config = PLAYBACK_0_TO_I2S |
406                          PLAYBACK_1_TO_SPDIF |
407                          CAPTURE_0_FROM_I2S_2,
408         .dac_channels = 8,
409         .dac_volume_min = 127 - 60,
410         .dac_volume_max = 127,
411         .function_flags = OXYGEN_FUNCTION_2WIRE,
412         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
413         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
414 };
415
416 int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
417                                      const struct pci_device_id *id)
418 {
419         switch (id->subdevice) {
420         case 0x834f:
421                 chip->model = model_xonar_d1;
422                 chip->model.shortname = "Xonar D1";
423                 break;
424         case 0x8275:
425         case 0x8327:
426                 chip->model = model_xonar_d1;
427                 chip->model.shortname = "Xonar DX";
428                 chip->model.init = xonar_dx_init;
429                 break;
430         default:
431                 return -EINVAL;
432         }
433         return 0;
434 }