ALSA: virtuoso: fix Xonar D1/DX front panel microphone
[kernel.git] / sound / pci / oxygen / xonar_cs43xx.c
1 /*
2  * card driver for models with CS4398/CS4362A DACs (Xonar D1/DX)
3  *
4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5  *
6  *
7  *  This driver is free software; you can redistribute it and/or modify
8  *  it under the terms of the GNU General Public License, version 2.
9  *
10  *  This driver is distributed in the hope that it will be useful,
11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  *  GNU General Public License for more details.
14  *
15  *  You should have received a copy of the GNU General Public License
16  *  along with this driver; if not, see <http://www.gnu.org/licenses/>.
17  */
18
19 /*
20  * Xonar D1/DX
21  * -----------
22  *
23  * CMI8788:
24  *
25  * I²C <-> CS4398 (front)
26  *     <-> CS4362A (surround, center/LFE, back)
27  *
28  * GPI 0 <- external power present (DX only)
29  *
30  * GPIO 0 -> enable output to speakers
31  * GPIO 1 -> enable front panel I/O
32  * GPIO 2 -> M0 of CS5361
33  * GPIO 3 -> M1 of CS5361
34  * GPIO 8 -> route input jack to line-in (0) or mic-in (1)
35  *
36  * CS4398:
37  *
38  * AD0 <- 1
39  * AD1 <- 1
40  *
41  * CS4362A:
42  *
43  * AD0 <- 0
44  *
45  * CM9780:
46  *
47  * GPO 0 -> route line-in (0) or AC97 output (1) to CS5361 input
48  */
49
50 #include <linux/pci.h>
51 #include <linux/delay.h>
52 #include <sound/ac97_codec.h>
53 #include <sound/control.h>
54 #include <sound/core.h>
55 #include <sound/pcm.h>
56 #include <sound/pcm_params.h>
57 #include <sound/tlv.h>
58 #include "xonar.h"
59 #include "cm9780.h"
60 #include "cs4398.h"
61 #include "cs4362a.h"
62
63 #define GPI_EXT_POWER           0x01
64 #define GPIO_D1_OUTPUT_ENABLE   0x0001
65 #define GPIO_D1_FRONT_PANEL     0x0002
66 #define GPIO_D1_INPUT_ROUTE     0x0100
67
68 #define I2C_DEVICE_CS4398       0x9e    /* 10011, AD1=1, AD0=1, /W=0 */
69 #define I2C_DEVICE_CS4362A      0x30    /* 001100, AD0=0, /W=0 */
70
71 struct xonar_cs43xx {
72         struct xonar_generic generic;
73         u8 cs4398_regs[8];
74         u8 cs4362a_regs[15];
75 };
76
77 static void cs4398_write(struct oxygen *chip, u8 reg, u8 value)
78 {
79         struct xonar_cs43xx *data = chip->model_data;
80
81         oxygen_write_i2c(chip, I2C_DEVICE_CS4398, reg, value);
82         if (reg < ARRAY_SIZE(data->cs4398_regs))
83                 data->cs4398_regs[reg] = value;
84 }
85
86 static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
87 {
88         struct xonar_cs43xx *data = chip->model_data;
89
90         if (value != data->cs4398_regs[reg])
91                 cs4398_write(chip, reg, value);
92 }
93
94 static void cs4362a_write(struct oxygen *chip, u8 reg, u8 value)
95 {
96         struct xonar_cs43xx *data = chip->model_data;
97
98         oxygen_write_i2c(chip, I2C_DEVICE_CS4362A, reg, value);
99         if (reg < ARRAY_SIZE(data->cs4362a_regs))
100                 data->cs4362a_regs[reg] = value;
101 }
102
103 static void cs4362a_write_cached(struct oxygen *chip, u8 reg, u8 value)
104 {
105         struct xonar_cs43xx *data = chip->model_data;
106
107         if (value != data->cs4362a_regs[reg])
108                 cs4362a_write(chip, reg, value);
109 }
110
111 static void cs43xx_registers_init(struct oxygen *chip)
112 {
113         struct xonar_cs43xx *data = chip->model_data;
114         unsigned int i;
115
116         /* set CPEN (control port mode) and power down */
117         cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
118         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
119         /* configure */
120         cs4398_write(chip, 2, data->cs4398_regs[2]);
121         cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
122         cs4398_write(chip, 4, data->cs4398_regs[4]);
123         cs4398_write(chip, 5, data->cs4398_regs[5]);
124         cs4398_write(chip, 6, data->cs4398_regs[6]);
125         cs4398_write(chip, 7, data->cs4398_regs[7]);
126         cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
127         cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
128                       CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
129         cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
130         cs4362a_write(chip, 0x05, 0);
131         for (i = 6; i <= 14; ++i)
132                 cs4362a_write(chip, i, data->cs4362a_regs[i]);
133         /* clear power down */
134         cs4398_write(chip, 8, CS4398_CPEN);
135         cs4362a_write(chip, 0x01, CS4362A_CPEN);
136 }
137
138 static void xonar_d1_init(struct oxygen *chip)
139 {
140         struct xonar_cs43xx *data = chip->model_data;
141
142         data->generic.anti_pop_delay = 800;
143         data->generic.output_enable_bit = GPIO_D1_OUTPUT_ENABLE;
144         data->cs4398_regs[2] =
145                 CS4398_FM_SINGLE | CS4398_DEM_NONE | CS4398_DIF_LJUST;
146         data->cs4398_regs[4] = CS4398_MUTEP_LOW |
147                 CS4398_MUTE_B | CS4398_MUTE_A | CS4398_PAMUTE;
148         data->cs4398_regs[5] = 60 * 2;
149         data->cs4398_regs[6] = 60 * 2;
150         data->cs4398_regs[7] = CS4398_RMP_DN | CS4398_RMP_UP |
151                 CS4398_ZERO_CROSS | CS4398_SOFT_RAMP;
152         data->cs4362a_regs[4] = CS4362A_RMP_DN | CS4362A_DEM_NONE;
153         data->cs4362a_regs[6] = CS4362A_FM_SINGLE |
154                 CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
155         data->cs4362a_regs[7] = 60 | CS4362A_MUTE;
156         data->cs4362a_regs[8] = 60 | CS4362A_MUTE;
157         data->cs4362a_regs[9] = data->cs4362a_regs[6];
158         data->cs4362a_regs[10] = 60 | CS4362A_MUTE;
159         data->cs4362a_regs[11] = 60 | CS4362A_MUTE;
160         data->cs4362a_regs[12] = data->cs4362a_regs[6];
161         data->cs4362a_regs[13] = 60 | CS4362A_MUTE;
162         data->cs4362a_regs[14] = 60 | CS4362A_MUTE;
163
164         oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
165                        OXYGEN_2WIRE_LENGTH_8 |
166                        OXYGEN_2WIRE_INTERRUPT_MASK |
167                        OXYGEN_2WIRE_SPEED_FAST);
168
169         cs43xx_registers_init(chip);
170
171         oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
172                           GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
173         oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
174                             GPIO_D1_FRONT_PANEL | GPIO_D1_INPUT_ROUTE);
175
176         oxygen_ac97_set_bits(chip, 0, CM9780_JACK, CM9780_FMIC2MIC);
177
178         xonar_init_cs53x1(chip);
179         xonar_enable_output(chip);
180
181         snd_component_add(chip->card, "CS4398");
182         snd_component_add(chip->card, "CS4362A");
183         snd_component_add(chip->card, "CS5361");
184 }
185
186 static void xonar_dx_init(struct oxygen *chip)
187 {
188         struct xonar_cs43xx *data = chip->model_data;
189
190         data->generic.ext_power_reg = OXYGEN_GPI_DATA;
191         data->generic.ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
192         data->generic.ext_power_bit = GPI_EXT_POWER;
193         xonar_init_ext_power(chip);
194         xonar_d1_init(chip);
195 }
196
197 static void xonar_d1_cleanup(struct oxygen *chip)
198 {
199         xonar_disable_output(chip);
200         cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
201         oxygen_clear_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
202 }
203
204 static void xonar_d1_suspend(struct oxygen *chip)
205 {
206         xonar_d1_cleanup(chip);
207 }
208
209 static void xonar_d1_resume(struct oxygen *chip)
210 {
211         oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC);
212         msleep(1);
213         cs43xx_registers_init(chip);
214         xonar_enable_output(chip);
215 }
216
217 static void set_cs43xx_params(struct oxygen *chip,
218                               struct snd_pcm_hw_params *params)
219 {
220         struct xonar_cs43xx *data = chip->model_data;
221         u8 cs4398_fm, cs4362a_fm;
222
223         if (params_rate(params) <= 50000) {
224                 cs4398_fm = CS4398_FM_SINGLE;
225                 cs4362a_fm = CS4362A_FM_SINGLE;
226         } else if (params_rate(params) <= 100000) {
227                 cs4398_fm = CS4398_FM_DOUBLE;
228                 cs4362a_fm = CS4362A_FM_DOUBLE;
229         } else {
230                 cs4398_fm = CS4398_FM_QUAD;
231                 cs4362a_fm = CS4362A_FM_QUAD;
232         }
233         cs4398_fm |= CS4398_DEM_NONE | CS4398_DIF_LJUST;
234         cs4398_write_cached(chip, 2, cs4398_fm);
235         cs4362a_fm |= data->cs4362a_regs[6] & ~CS4362A_FM_MASK;
236         cs4362a_write_cached(chip, 6, cs4362a_fm);
237         cs4362a_write_cached(chip, 12, cs4362a_fm);
238         cs4362a_fm &= CS4362A_FM_MASK;
239         cs4362a_fm |= data->cs4362a_regs[9] & ~CS4362A_FM_MASK;
240         cs4362a_write_cached(chip, 9, cs4362a_fm);
241 }
242
243 static void update_cs4362a_volumes(struct oxygen *chip)
244 {
245         unsigned int i;
246         u8 mute;
247
248         mute = chip->dac_mute ? CS4362A_MUTE : 0;
249         for (i = 0; i < 6; ++i)
250                 cs4362a_write_cached(chip, 7 + i + i / 2,
251                                      (127 - chip->dac_volume[2 + i]) | mute);
252 }
253
254 static void update_cs43xx_volume(struct oxygen *chip)
255 {
256         cs4398_write_cached(chip, 5, (127 - chip->dac_volume[0]) * 2);
257         cs4398_write_cached(chip, 6, (127 - chip->dac_volume[1]) * 2);
258         update_cs4362a_volumes(chip);
259 }
260
261 static void update_cs43xx_mute(struct oxygen *chip)
262 {
263         u8 reg;
264
265         reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
266         if (chip->dac_mute)
267                 reg |= CS4398_MUTE_B | CS4398_MUTE_A;
268         cs4398_write_cached(chip, 4, reg);
269         update_cs4362a_volumes(chip);
270 }
271
272 static void update_cs43xx_center_lfe_mix(struct oxygen *chip, bool mixed)
273 {
274         struct xonar_cs43xx *data = chip->model_data;
275         u8 reg;
276
277         reg = data->cs4362a_regs[9] & ~CS4362A_ATAPI_MASK;
278         if (mixed)
279                 reg |= CS4362A_ATAPI_B_LR | CS4362A_ATAPI_A_LR;
280         else
281                 reg |= CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
282         cs4362a_write_cached(chip, 9, reg);
283 }
284
285 static const struct snd_kcontrol_new front_panel_switch = {
286         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
287         .name = "Front Panel Switch",
288         .info = snd_ctl_boolean_mono_info,
289         .get = xonar_gpio_bit_switch_get,
290         .put = xonar_gpio_bit_switch_put,
291         .private_value = GPIO_D1_FRONT_PANEL,
292 };
293
294 static int rolloff_info(struct snd_kcontrol *ctl,
295                         struct snd_ctl_elem_info *info)
296 {
297         static const char *const names[2] = {
298                 "Fast Roll-off", "Slow Roll-off"
299         };
300
301         info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
302         info->count = 1;
303         info->value.enumerated.items = 2;
304         if (info->value.enumerated.item >= 2)
305                 info->value.enumerated.item = 1;
306         strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
307         return 0;
308 }
309
310 static int rolloff_get(struct snd_kcontrol *ctl,
311                        struct snd_ctl_elem_value *value)
312 {
313         struct oxygen *chip = ctl->private_data;
314         struct xonar_cs43xx *data = chip->model_data;
315
316         value->value.enumerated.item[0] =
317                 (data->cs4398_regs[7] & CS4398_FILT_SEL) != 0;
318         return 0;
319 }
320
321 static int rolloff_put(struct snd_kcontrol *ctl,
322                        struct snd_ctl_elem_value *value)
323 {
324         struct oxygen *chip = ctl->private_data;
325         struct xonar_cs43xx *data = chip->model_data;
326         int changed;
327         u8 reg;
328
329         mutex_lock(&chip->mutex);
330         reg = data->cs4398_regs[7];
331         if (value->value.enumerated.item[0])
332                 reg |= CS4398_FILT_SEL;
333         else
334                 reg &= ~CS4398_FILT_SEL;
335         changed = reg != data->cs4398_regs[7];
336         if (changed) {
337                 cs4398_write(chip, 7, reg);
338                 if (reg & CS4398_FILT_SEL)
339                         reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
340                 else
341                         reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
342                 cs4362a_write(chip, 0x04, reg);
343         }
344         mutex_unlock(&chip->mutex);
345         return changed;
346 }
347
348 static const struct snd_kcontrol_new rolloff_control = {
349         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
350         .name = "DAC Filter Playback Enum",
351         .info = rolloff_info,
352         .get = rolloff_get,
353         .put = rolloff_put,
354 };
355
356 static void xonar_d1_line_mic_ac97_switch(struct oxygen *chip,
357                                           unsigned int reg, unsigned int mute)
358 {
359         if (reg == AC97_LINE) {
360                 spin_lock_irq(&chip->reg_lock);
361                 oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
362                                       mute ? GPIO_D1_INPUT_ROUTE : 0,
363                                       GPIO_D1_INPUT_ROUTE);
364                 spin_unlock_irq(&chip->reg_lock);
365         }
366 }
367
368 static const DECLARE_TLV_DB_SCALE(cs4362a_db_scale, -6000, 100, 0);
369
370 static int xonar_d1_control_filter(struct snd_kcontrol_new *template)
371 {
372         if (!strncmp(template->name, "CD Capture ", 11))
373                 return 1; /* no CD input */
374         return 0;
375 }
376
377 static int xonar_d1_mixer_init(struct oxygen *chip)
378 {
379         int err;
380
381         err = snd_ctl_add(chip->card, snd_ctl_new1(&front_panel_switch, chip));
382         if (err < 0)
383                 return err;
384         err = snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
385         if (err < 0)
386                 return err;
387         return 0;
388 }
389
390 static const struct oxygen_model model_xonar_d1 = {
391         .longname = "Asus Virtuoso 100",
392         .chip = "AV200",
393         .init = xonar_d1_init,
394         .control_filter = xonar_d1_control_filter,
395         .mixer_init = xonar_d1_mixer_init,
396         .cleanup = xonar_d1_cleanup,
397         .suspend = xonar_d1_suspend,
398         .resume = xonar_d1_resume,
399         .get_i2s_mclk = oxygen_default_i2s_mclk,
400         .set_dac_params = set_cs43xx_params,
401         .set_adc_params = xonar_set_cs53x1_params,
402         .update_dac_volume = update_cs43xx_volume,
403         .update_dac_mute = update_cs43xx_mute,
404         .update_center_lfe_mix = update_cs43xx_center_lfe_mix,
405         .ac97_switch = xonar_d1_line_mic_ac97_switch,
406         .dac_tlv = cs4362a_db_scale,
407         .model_data_size = sizeof(struct xonar_cs43xx),
408         .device_config = PLAYBACK_0_TO_I2S |
409                          PLAYBACK_1_TO_SPDIF |
410                          CAPTURE_0_FROM_I2S_2,
411         .dac_channels = 8,
412         .dac_volume_min = 127 - 60,
413         .dac_volume_max = 127,
414         .function_flags = OXYGEN_FUNCTION_2WIRE,
415         .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
416         .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
417 };
418
419 int __devinit get_xonar_cs43xx_model(struct oxygen *chip,
420                                      const struct pci_device_id *id)
421 {
422         switch (id->subdevice) {
423         case 0x834f:
424                 chip->model = model_xonar_d1;
425                 chip->model.shortname = "Xonar D1";
426                 break;
427         case 0x8275:
428         case 0x8327:
429                 chip->model = model_xonar_d1;
430                 chip->model.shortname = "Xonar DX";
431                 chip->model.init = xonar_dx_init;
432                 break;
433         default:
434                 return -EINVAL;
435         }
436         return 0;
437 }