Merge commit 'v2.6.30-rc5' into x86/apic
authorIngo Molnar <mingo@elte.hu>
Mon, 11 May 2009 07:33:06 +0000 (09:33 +0200)
committerIngo Molnar <mingo@elte.hu>
Mon, 11 May 2009 07:50:02 +0000 (09:50 +0200)
Merge reason: this branch was on a .30-rc2 base - sync it up with
              all the latest fixes.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
1  2 
Documentation/kernel-parameters.txt
arch/x86/Kconfig
arch/x86/kernel/apic/io_apic.c
arch/x86/kernel/apic/x2apic_uv_x.c

@@@ -17,6 -17,12 +17,12 @@@ are specified on the kernel command lin
  
        usbcore.blinkenlights=1
  
+ Hyphens (dashes) and underscores are equivalent in parameter names, so
+       log_buf_len=1M print-fatal-signals=1
+ can also be entered as
+       log-buf-len=1M print_fatal_signals=1
  This document may not be entirely up to date and comprehensive. The command
  "modinfo -p ${modulename}" shows a current list of all parameters of a loadable
  module. Loadable modules, after being loaded into the running kernel, also
@@@ -134,7 -140,7 +140,7 @@@ and is between 256 and 4096 characters
  ./include/asm/setup.h as COMMAND_LINE_SIZE.
  
  
-       acpi=           [HW,ACPI,X86-64,i386]
+       acpi=           [HW,ACPI,X86]
                        Advanced Configuration and Power Interface
                        Format: { force | off | ht | strict | noirq | rsdt }
                        force -- enable ACPI if default was off
                        acpi_osi="!string2"     # remove built-in string2
                        acpi_osi=               # disable all strings
  
-       acpi_pm_good    [X86-32,X86-64]
+       acpi_pm_good    [X86]
                        Override the pmtimer bug detection: force the kernel
                        to assume that this machine's pmtimer latches its value
                        and always returns good values.
                        power state again in power transition.
                        1 : disable the power state check
  
+       acpi_sci=       [HW,ACPI] ACPI System Control Interrupt trigger mode
+                       Format: { level | edge | high | low }
+       acpi_serialize  [HW,ACPI] force serialization of AML methods
+       acpi_skip_timer_override [HW,ACPI]
+                       Recognize and ignore IRQ0/pin2 Interrupt Override.
+                       For broken nForce2 BIOS resulting in XT-PIC timer.
+       acpi_sleep=     [HW,ACPI] Sleep options
+                       Format: { s3_bios, s3_mode, s3_beep, s4_nohwsig,
+                                 old_ordering, s4_nonvs }
+                       See Documentation/power/video.txt for information on
+                       s3_bios and s3_mode.
+                       s3_beep is for debugging; it makes the PC's speaker beep
+                       as soon as the kernel's real-mode entry point is called.
+                       s4_nohwsig prevents ACPI hardware signature from being
+                       used during resume from hibernation.
+                       old_ordering causes the ACPI 1.0 ordering of the _PTS
+                       control method, with respect to putting devices into
+                       low power states, to be enforced (the ACPI 2.0 ordering
+                       of _PTS is used by default).
+                       s4_nonvs prevents the kernel from saving/restoring the
+                       ACPI NVS memory during hibernation.
+       acpi_use_timer_override [HW,ACPI]
+                       Use timer override. For some broken Nvidia NF5 boards
+                       that require a timer override, but don't have HPET
        acpi_enforce_resources= [ACPI]
                        { strict | lax | no }
                        Check for resource conflicts between native drivers
        ad1848=         [HW,OSS]
                        Format: <io>,<irq>,<dma>,<dma2>,<type>
  
+       add_efi_memmap  [EFI; X86] Include EFI memory map in
+                       kernel's map of available physical RAM.
        advansys=       [HW,SCSI]
                        See header of drivers/scsi/advansys.c.
  
                        not play well with APC CPU idle - disable it if you have
                        APC and your system crashes randomly.
  
-       apic=           [APIC,i386] Advanced Programmable Interrupt Controller
+       apic=           [APIC,X86-32] Advanced Programmable Interrupt Controller
                        Change the output verbosity whilst booting
                        Format: { quiet (default) | verbose | debug }
                        Change the amount of debugging information output
                        Also note the kernel might malfunction if you disable
                        some critical bits.
  
-       code_bytes      [IA32/X86_64] How many bytes of object code to print
+       code_bytes      [X86] How many bytes of object code to print
                        in an oops report.
                        Range: 0 - 8192
                        Default: 64
                        MTRR settings.  This parameter disables that behavior,
                        possibly causing your machine to run very slowly.
  
-       disable_timer_pin_1 [i386,x86-64]
+       disable_timer_pin_1 [X86]
                        Disable PIN 1 of APIC timer
                        Can be useful to work around chipset bugs.
  
                        UART at the specified I/O port or MMIO address.
                        The options are the same as for ttyS, above.
  
-       earlyprintk=    [X86-32,X86-64,SH,BLACKFIN]
+       earlyprintk=    [X86,SH,BLACKFIN]
                        earlyprintk=vga
                        earlyprintk=serial[,ttySn[,baudrate]]
                        earlyprintk=dbgp
                        See Documentation/block/as-iosched.txt and
                        Documentation/block/deadline-iosched.txt for details.
  
-       elfcorehdr=     [IA64,PPC,SH,X86-32,X86_64]
+       elfcorehdr=     [IA64,PPC,SH,X86]
                        Specifies physical address of start of kernel core
                        image elf header. Generally kexec loader will
                        pass this option to capture kernel.
                        to discrete, to make X server driver able to add WB
                        entry later. This parameter enables that.
  
-       enable_timer_pin_1 [i386,x86-64]
+       enable_timer_pin_1 [X86]
                        Enable PIN 1 of APIC timer
                        Can be useful to work around chipset bugs
                        (in particular on some ATI chipsets).
  
        hashdist=       [KNL,NUMA] Large hashes allocated during boot
                        are distributed across NUMA nodes.  Defaults on
-                       for IA-64, off otherwise.
+                       for 64bit NUMA, off otherwise.
                        Format: 0 | 1 (for off | on)
  
        hcl=            [IA-64] SGI's Hardware Graph compatibility layer
                        See comment before marvel_specify_io7 in
                        arch/alpha/kernel/core_marvel.c.
  
-       io_delay=       [X86-32,X86-64] I/O delay method
+       io_delay=       [X86] I/O delay method
                0x80
                        Standard port 0x80 based delay
                0xed
  
        keepinitrd      [HW,ARM]
  
-       kernelcore=nn[KMG]      [KNL,X86-32,IA-64,PPC,X86-64] This parameter
+       kernelcore=nn[KMG]      [KNL,X86,IA-64,PPC] This parameter
                        specifies the amount of memory usable by the kernel
                        for non-movable allocations.  The requested amount is
                        spread evenly throughout all nodes in the system. The
                        Configure the RouterBoard 532 series on-chip
                        Ethernet adapter MAC address.
  
-       kstack=N        [X86-32,X86-64] Print N words from the kernel stack
+       kstack=N        [X86] Print N words from the kernel stack
                        in oops dumps.
  
        l2cr=           [PPC]
        lapic           [X86-32,APIC] Enable the local APIC even if BIOS
                        disabled it.
  
-       lapic_timer_c2_ok       [X86-32,x86-64,APIC] trust the local apic timer
+       lapic_timer_c2_ok       [X86,APIC] trust the local apic timer
                        in C2 power state.
  
        libata.dma=     [LIBATA] DMA control
                        [KNL,SH] Allow user to override the default size for
                        per-device physically contiguous DMA buffers.
  
-       memmap=exactmap [KNL,X86-32,X86_64] Enable setting of an exact
+       memmap=exactmap [KNL,X86] Enable setting of an exact
                        E820 memory map, as specified by the user.
                        Such memmap=exactmap lines can be constructed based on
                        BIOS output or other requirements. See the memmap=nn@ss
        mousedev.yres=  [MOUSE] Vertical screen resolution, used for devices
                        reporting absolute coordinates, such as tablets
  
-       movablecore=nn[KMG]     [KNL,X86-32,IA-64,PPC,X86-64] This parameter
+       movablecore=nn[KMG]     [KNL,X86,IA-64,PPC] This parameter
                        is similar to kernelcore except it specifies the
                        amount of memory used for migratable allocations.
                        If both kernelcore and movablecore is specified,
                        when a NMI is triggered.
                        Format: [state][,regs][,debounce][,die]
  
-       nmi_watchdog=   [KNL,BUGS=X86-32,X86-64] Debugging features for SMP kernels
+       nmi_watchdog=   [KNL,BUGS=X86] Debugging features for SMP kernels
                        Format: [panic,][num]
                        Valid num: 0,1,2
                        0 - turn nmi_watchdog off
  
        nodsp           [SH] Disable hardware DSP at boot time.
  
-       noefi           [X86-32,X86-64] Disable EFI runtime services support.
+       noefi           [X86] Disable EFI runtime services support.
  
        noexec          [IA-64]
  
-       noexec          [X86-32,X86-64]
+       noexec          [X86]
                        On X86-32 available only on PAE configured kernels.
                        noexec=on: enable non-executable mappings (default)
                        noexec=off: disable non-executable mappings
        noirqdebug      [X86-32] Disables the code which attempts to detect and
                        disable unhandled interrupt sources.
  
-       no_timer_check  [X86-32,X86_64,APIC] Disables the code which tests for
+       no_timer_check  [X86,APIC] Disables the code which tests for
                        broken timer IRQ sources.
  
        noisapnp        [ISAPNP] Disables ISA PnP code.
        noinitrd        [RAM] Tells the kernel not to load any configured
                        initial RAM disk.
  
 +      nointremap      [X86-64, Intel-IOMMU] Do not enable interrupt
 +                      remapping.
 +
        nointroute      [IA-64]
  
        nojitter        [IA64] Disables jitter checking for ITC timers.
                                disable the use of PCIE advanced error reporting.
                nodomains       [PCI] Disable support for multiple PCI
                                root domains (aka PCI segments, in ACPI-speak).
-               nommconf        [X86-32,X86_64] Disable use of MMCONFIG for PCI
+               nommconf        [X86] Disable use of MMCONFIG for PCI
                                Configuration
                nomsi           [MSI] If the PCI_MSI kernel config parameter is
                                enabled, this kernel boot option can be used to
                        autoconfiguration.
                        Ranges are in pairs (memory base and size).
  
+       ports=          [IP_VS_FTP] IPVS ftp helper module
+                       Default is 21.
+                       Up to 8 (IP_VS_APP_MAX_PORTS) ports
+                       may be specified.
+                       Format: <port>,<port>....
        print-fatal-signals=
                        [KNL] debug: print fatal signals
                        print-fatal-signals=1: print segfault info to
                        reported either.
  
        unknown_nmi_panic
-                       [X86-32,X86-64]
+                       [X86]
                        Set unknown_nmi_panic=1 early on boot.
  
        usbcore.autosuspend=
                                        medium is write-protected).
                        Example: quirks=0419:aaf5:rl,0421:0433:rc
  
-       vdso=           [X86-32,SH,x86-64]
+       vdso=           [X86,SH]
                        vdso=2: enable compat VDSO (default with COMPAT_VDSO)
                        vdso=1: enable VDSO (default)
                        vdso=0: disable VDSO mapping
  
-       vdso32=         [X86-32,X86-64]
+       vdso32=         [X86]
                        vdso32=2: enable compat VDSO (default with COMPAT_VDSO)
                        vdso32=1: enable 32-bit VDSO (default)
                        vdso32=0: disable 32-bit VDSO mapping
diff --combined arch/x86/Kconfig
@@@ -277,6 -277,7 +277,7 @@@ config SPARSE_IR
  config NUMA_MIGRATE_IRQ_DESC
        bool "Move irq desc when changing irq smp_affinity"
        depends on SPARSE_IRQ && NUMA
+       depends on BROKEN
        default n
        ---help---
          This enables moving irq_desc to cpu/node that irq will use handled.
@@@ -354,7 -355,7 +355,7 @@@ config X86_U
        depends on X86_64
        depends on X86_EXTENDED_PLATFORM
        depends on NUMA
 -      select X86_X2APIC
 +      depends on X86_X2APIC
        ---help---
          This option is needed in order to support SGI Ultraviolet systems.
          If you don't have one of these, you should say N here.
@@@ -664,6 -665,7 +665,7 @@@ config MAXSM
  
  config NR_CPUS
        int "Maximum number of CPUs" if SMP && !MAXSMP
+       range 2 8 if SMP && X86_32 && !X86_BIGSMP
        range 2 512 if SMP && !MAXSMP
        default "1" if !SMP
        default "4096" if MAXSMP
@@@ -518,6 -518,120 +518,6 @@@ static void ioapic_mask_entry(int apic
        spin_unlock_irqrestore(&ioapic_lock, flags);
  }
  
 -#ifdef CONFIG_SMP
 -static void send_cleanup_vector(struct irq_cfg *cfg)
 -{
 -      cpumask_var_t cleanup_mask;
 -
 -      if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) {
 -              unsigned int i;
 -              cfg->move_cleanup_count = 0;
 -              for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
 -                      cfg->move_cleanup_count++;
 -              for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
 -                      apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
 -      } else {
 -              cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
 -              cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
 -              apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
 -              free_cpumask_var(cleanup_mask);
 -      }
 -      cfg->move_in_progress = 0;
 -}
 -
 -static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)
 -{
 -      int apic, pin;
 -      struct irq_pin_list *entry;
 -      u8 vector = cfg->vector;
 -
 -      entry = cfg->irq_2_pin;
 -      for (;;) {
 -              unsigned int reg;
 -
 -              if (!entry)
 -                      break;
 -
 -              apic = entry->apic;
 -              pin = entry->pin;
 -              /*
 -               * With interrupt-remapping, destination information comes
 -               * from interrupt-remapping table entry.
 -               */
 -              if (!irq_remapped(irq))
 -                      io_apic_write(apic, 0x11 + pin*2, dest);
 -              reg = io_apic_read(apic, 0x10 + pin*2);
 -              reg &= ~IO_APIC_REDIR_VECTOR_MASK;
 -              reg |= vector;
 -              io_apic_modify(apic, 0x10 + pin*2, reg);
 -              if (!entry->next)
 -                      break;
 -              entry = entry->next;
 -      }
 -}
 -
 -static int
 -assign_irq_vector(int irq, struct irq_cfg *cfg, const struct cpumask *mask);
 -
 -/*
 - * Either sets desc->affinity to a valid value, and returns
 - * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
 - * leaves desc->affinity untouched.
 - */
 -static unsigned int
 -set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
 -{
 -      struct irq_cfg *cfg;
 -      unsigned int irq;
 -
 -      if (!cpumask_intersects(mask, cpu_online_mask))
 -              return BAD_APICID;
 -
 -      irq = desc->irq;
 -      cfg = desc->chip_data;
 -      if (assign_irq_vector(irq, cfg, mask))
 -              return BAD_APICID;
 -
 -      /* check that before desc->addinity get updated */
 -      set_extra_move_desc(desc, mask);
 -
 -      cpumask_copy(desc->affinity, mask);
 -
 -      return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain);
 -}
 -
 -static void
 -set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 -{
 -      struct irq_cfg *cfg;
 -      unsigned long flags;
 -      unsigned int dest;
 -      unsigned int irq;
 -
 -      irq = desc->irq;
 -      cfg = desc->chip_data;
 -
 -      spin_lock_irqsave(&ioapic_lock, flags);
 -      dest = set_desc_affinity(desc, mask);
 -      if (dest != BAD_APICID) {
 -              /* Only the high 8 bits are valid. */
 -              dest = SET_APIC_LOGICAL_ID(dest);
 -              __target_IO_APIC_irq(irq, dest, cfg);
 -      }
 -      spin_unlock_irqrestore(&ioapic_lock, flags);
 -}
 -
 -static void
 -set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
 -{
 -      struct irq_desc *desc;
 -
 -      desc = irq_to_desc(irq);
 -
 -      set_ioapic_affinity_irq_desc(desc, mask);
 -}
 -#endif /* CONFIG_SMP */
 -
  /*
   * The common case is 1:1 IRQ<->pin mappings. Sometimes there are
   * shared ISA-space IRQs, so we have to support them. We are super
@@@ -736,6 -850,7 +736,6 @@@ static int __init ioapic_pirq_setup(cha
  __setup("pirq=", ioapic_pirq_setup);
  #endif /* CONFIG_X86_32 */
  
 -#ifdef CONFIG_INTR_REMAP
  struct IO_APIC_route_entry **alloc_ioapic_entries(void)
  {
        int apic;
@@@ -833,6 -948,20 +833,6 @@@ int restore_IO_APIC_setup(struct IO_API
        return 0;
  }
  
 -void reinit_intr_remapped_IO_APIC(int intr_remapping,
 -      struct IO_APIC_route_entry **ioapic_entries)
 -
 -{
 -      /*
 -       * for now plain restore of previous settings.
 -       * TBD: In the case of OS enabling interrupt-remapping,
 -       * IO-APIC RTE's need to be setup to point to interrupt-remapping
 -       * table entries. for now, do a plain restore, and wait for
 -       * the setup_IO_APIC_irqs() to do proper initialization.
 -       */
 -      restore_IO_APIC_setup(ioapic_entries);
 -}
 -
  void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries)
  {
        int apic;
  
        kfree(ioapic_entries);
  }
 -#endif
  
  /*
   * Find the IRQ entry number of a certain pin.
@@@ -2230,115 -2360,6 +2230,115 @@@ static int ioapic_retrigger_irq(unsigne
   */
  
  #ifdef CONFIG_SMP
 +static void send_cleanup_vector(struct irq_cfg *cfg)
 +{
 +      cpumask_var_t cleanup_mask;
 +
 +      if (unlikely(!alloc_cpumask_var(&cleanup_mask, GFP_ATOMIC))) {
 +              unsigned int i;
 +              cfg->move_cleanup_count = 0;
 +              for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
 +                      cfg->move_cleanup_count++;
 +              for_each_cpu_and(i, cfg->old_domain, cpu_online_mask)
 +                      apic->send_IPI_mask(cpumask_of(i), IRQ_MOVE_CLEANUP_VECTOR);
 +      } else {
 +              cpumask_and(cleanup_mask, cfg->old_domain, cpu_online_mask);
 +              cfg->move_cleanup_count = cpumask_weight(cleanup_mask);
 +              apic->send_IPI_mask(cleanup_mask, IRQ_MOVE_CLEANUP_VECTOR);
 +              free_cpumask_var(cleanup_mask);
 +      }
 +      cfg->move_in_progress = 0;
 +}
 +
 +static void
 +__target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq_cfg *cfg)
 +{
 +      int apic, pin;
 +      struct irq_pin_list *entry;
 +      u8 vector = cfg->vector;
 +
 +      entry = cfg->irq_2_pin;
 +      for (;;) {
 +              unsigned int reg;
 +
 +              if (!entry)
 +                      break;
 +
 +              apic = entry->apic;
 +              pin = entry->pin;
 +              /*
 +               * With interrupt-remapping, destination information comes
 +               * from interrupt-remapping table entry.
 +               */
 +              if (!irq_remapped(irq))
 +                      io_apic_write(apic, 0x11 + pin*2, dest);
 +              reg = io_apic_read(apic, 0x10 + pin*2);
 +              reg &= ~IO_APIC_REDIR_VECTOR_MASK;
 +              reg |= vector;
 +              io_apic_modify(apic, 0x10 + pin*2, reg);
 +              if (!entry->next)
 +                      break;
 +              entry = entry->next;
 +      }
 +}
 +
 +/*
 + * Either sets desc->affinity to a valid value, and returns
 + * ->cpu_mask_to_apicid of that, or returns BAD_APICID and
 + * leaves desc->affinity untouched.
 + */
 +static unsigned int
 +set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask)
 +{
 +      struct irq_cfg *cfg;
 +      unsigned int irq;
 +
 +      if (!cpumask_intersects(mask, cpu_online_mask))
 +              return BAD_APICID;
 +
 +      irq = desc->irq;
 +      cfg = desc->chip_data;
 +      if (assign_irq_vector(irq, cfg, mask))
 +              return BAD_APICID;
 +
 +      /* check that before desc->addinity get updated */
 +      set_extra_move_desc(desc, mask);
 +
 +      cpumask_copy(desc->affinity, mask);
 +
 +      return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain);
 +}
 +
 +static void
 +set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask)
 +{
 +      struct irq_cfg *cfg;
 +      unsigned long flags;
 +      unsigned int dest;
 +      unsigned int irq;
 +
 +      irq = desc->irq;
 +      cfg = desc->chip_data;
 +
 +      spin_lock_irqsave(&ioapic_lock, flags);
 +      dest = set_desc_affinity(desc, mask);
 +      if (dest != BAD_APICID) {
 +              /* Only the high 8 bits are valid. */
 +              dest = SET_APIC_LOGICAL_ID(dest);
 +              __target_IO_APIC_irq(irq, dest, cfg);
 +      }
 +      spin_unlock_irqrestore(&ioapic_lock, flags);
 +}
 +
 +static void
 +set_ioapic_affinity_irq(unsigned int irq, const struct cpumask *mask)
 +{
 +      struct irq_desc *desc;
 +
 +      desc = irq_to_desc(irq);
 +
 +      set_ioapic_affinity_irq_desc(desc, mask);
 +}
  
  #ifdef CONFIG_INTR_REMAP
  
@@@ -2503,6 -2524,53 +2503,6 @@@ static void irq_complete_move(struct ir
  static inline void irq_complete_move(struct irq_desc **descp) {}
  #endif
  
 -static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
 -{
 -      int apic, pin;
 -      struct irq_pin_list *entry;
 -
 -      entry = cfg->irq_2_pin;
 -      for (;;) {
 -
 -              if (!entry)
 -                      break;
 -
 -              apic = entry->apic;
 -              pin = entry->pin;
 -              io_apic_eoi(apic, pin);
 -              entry = entry->next;
 -      }
 -}
 -
 -static void
 -eoi_ioapic_irq(struct irq_desc *desc)
 -{
 -      struct irq_cfg *cfg;
 -      unsigned long flags;
 -      unsigned int irq;
 -
 -      irq = desc->irq;
 -      cfg = desc->chip_data;
 -
 -      spin_lock_irqsave(&ioapic_lock, flags);
 -      __eoi_ioapic_irq(irq, cfg);
 -      spin_unlock_irqrestore(&ioapic_lock, flags);
 -}
 -
 -#ifdef CONFIG_X86_X2APIC
 -static void ack_x2apic_level(unsigned int irq)
 -{
 -      struct irq_desc *desc = irq_to_desc(irq);
 -      ack_x2APIC_irq();
 -      eoi_ioapic_irq(desc);
 -}
 -
 -static void ack_x2apic_edge(unsigned int irq)
 -{
 -      ack_x2APIC_irq();
 -}
 -#endif
 -
  static void ack_apic_edge(unsigned int irq)
  {
        struct irq_desc *desc = irq_to_desc(irq);
@@@ -2566,6 -2634,9 +2566,6 @@@ static void ack_apic_level(unsigned in
         */
        ack_APIC_irq();
  
 -      if (irq_remapped(irq))
 -              eoi_ioapic_irq(desc);
 -
        /* Now we can move and renable the irq */
        if (unlikely(do_unmask_irq)) {
                /* Only migrate the irq if the ack has been received.
  }
  
  #ifdef CONFIG_INTR_REMAP
 +static void __eoi_ioapic_irq(unsigned int irq, struct irq_cfg *cfg)
 +{
 +      int apic, pin;
 +      struct irq_pin_list *entry;
 +
 +      entry = cfg->irq_2_pin;
 +      for (;;) {
 +
 +              if (!entry)
 +                      break;
 +
 +              apic = entry->apic;
 +              pin = entry->pin;
 +              io_apic_eoi(apic, pin);
 +              entry = entry->next;
 +      }
 +}
 +
 +static void
 +eoi_ioapic_irq(struct irq_desc *desc)
 +{
 +      struct irq_cfg *cfg;
 +      unsigned long flags;
 +      unsigned int irq;
 +
 +      irq = desc->irq;
 +      cfg = desc->chip_data;
 +
 +      spin_lock_irqsave(&ioapic_lock, flags);
 +      __eoi_ioapic_irq(irq, cfg);
 +      spin_unlock_irqrestore(&ioapic_lock, flags);
 +}
 +
  static void ir_ack_apic_edge(unsigned int irq)
  {
 -#ifdef CONFIG_X86_X2APIC
 -       if (x2apic_enabled())
 -               return ack_x2apic_edge(irq);
 -#endif
 -       return ack_apic_edge(irq);
 +      ack_APIC_irq();
  }
  
  static void ir_ack_apic_level(unsigned int irq)
  {
 -#ifdef CONFIG_X86_X2APIC
 -       if (x2apic_enabled())
 -               return ack_x2apic_level(irq);
 -#endif
 -       return ack_apic_level(irq);
 +      struct irq_desc *desc = irq_to_desc(irq);
 +
 +      ack_APIC_irq();
 +      eoi_ioapic_irq(desc);
  }
  #endif /* CONFIG_INTR_REMAP */
  
@@@ -3627,12 -3670,14 +3627,14 @@@ int arch_setup_hpet_msi(unsigned int ir
  {
        int ret;
        struct msi_msg msg;
+       struct irq_desc *desc = irq_to_desc(irq);
  
        ret = msi_compose_msg(NULL, irq, &msg);
        if (ret < 0)
                return ret;
  
        hpet_msi_write(irq, &msg);
+       desc->status |= IRQ_MOVE_PCNTXT;
        set_irq_chip_and_handler_name(irq, &hpet_msi_type, handle_edge_irq,
                "edge");
  
@@@ -3749,8 -3794,6 +3751,8 @@@ int arch_enable_uv_irq(char *irq_name, 
        unsigned long flags;
        int err;
  
 +      BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 +
        cfg = irq_cfg(irq);
  
        err = assign_irq_vector(irq, cfg, eligible_cpu);
  
        mmr_value = 0;
        entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
 -      BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 -
 -      entry->vector = cfg->vector;
 -      entry->delivery_mode = apic->irq_delivery_mode;
 -      entry->dest_mode = apic->irq_dest_mode;
 -      entry->polarity = 0;
 -      entry->trigger = 0;
 -      entry->mask = 0;
 -      entry->dest = apic->cpu_mask_to_apicid(eligible_cpu);
 +      entry->vector           = cfg->vector;
 +      entry->delivery_mode    = apic->irq_delivery_mode;
 +      entry->dest_mode        = apic->irq_dest_mode;
 +      entry->polarity         = 0;
 +      entry->trigger          = 0;
 +      entry->mask             = 0;
 +      entry->dest             = apic->cpu_mask_to_apicid(eligible_cpu);
  
        mmr_pnode = uv_blade_to_pnode(mmr_blade);
        uv_write_global_mmr64(mmr_pnode, mmr_offset, mmr_value);
@@@ -3788,10 -3833,10 +3790,10 @@@ void arch_disable_uv_irq(int mmr_blade
        struct uv_IO_APIC_route_entry *entry;
        int mmr_pnode;
  
 +      BUILD_BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 +
        mmr_value = 0;
        entry = (struct uv_IO_APIC_route_entry *)&mmr_value;
 -      BUG_ON(sizeof(struct uv_IO_APIC_route_entry) != sizeof(unsigned long));
 -
        entry->mask = 1;
  
        mmr_pnode = uv_blade_to_pnode(mmr_blade);
@@@ -19,6 -19,7 +19,7 @@@
  #include <linux/timer.h>
  #include <linux/cpu.h>
  #include <linux/init.h>
+ #include <linux/io.h>
  
  #include <asm/uv/uv_mmrs.h>
  #include <asm/uv/uv_hub.h>
@@@ -34,6 -35,17 +35,17 @@@ DEFINE_PER_CPU(int, x2apic_extra_bits)
  
  static enum uv_system_type uv_system_type;
  
+ static int early_get_nodeid(void)
+ {
+       union uvh_node_id_u node_id;
+       unsigned long *mmr;
+       mmr = early_ioremap(UV_LOCAL_MMR_BASE | UVH_NODE_ID, sizeof(*mmr));
+       node_id.v = *mmr;
+       early_iounmap(mmr, sizeof(*mmr));
+       return node_id.s.node_id;
+ }
  static int uv_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  {
        if (!strcmp(oem_id, "SGI")) {
@@@ -42,6 -54,8 +54,8 @@@
                else if (!strcmp(oem_table_id, "UVX"))
                        uv_system_type = UV_X2APIC;
                else if (!strcmp(oem_table_id, "UVH")) {
+                       __get_cpu_var(x2apic_extra_bits) =
+                               early_get_nodeid() << (UV_APIC_PNODE_SHIFT - 1);
                        uv_system_type = UV_NON_UNIQUE_APIC;
                        return 1;
                }
@@@ -91,7 -105,7 +105,7 @@@ static void uv_vector_allocation_domain
        cpumask_set_cpu(cpu, retmask);
  }
  
 -static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
 +static int __cpuinit uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
  {
  #ifdef CONFIG_SMP
        unsigned long val;
@@@ -569,18 -583,15 +583,18 @@@ void __init uv_system_init(void
  
        bytes = sizeof(struct uv_blade_info) * uv_num_possible_blades();
        uv_blade_info = kmalloc(bytes, GFP_KERNEL);
 +      BUG_ON(!uv_blade_info);
  
        get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
  
        bytes = sizeof(uv_node_to_blade[0]) * num_possible_nodes();
        uv_node_to_blade = kmalloc(bytes, GFP_KERNEL);
 +      BUG_ON(!uv_node_to_blade);
        memset(uv_node_to_blade, 255, bytes);
  
        bytes = sizeof(uv_cpu_to_blade[0]) * num_possible_cpus();
        uv_cpu_to_blade = kmalloc(bytes, GFP_KERNEL);
 +      BUG_ON(!uv_cpu_to_blade);
        memset(uv_cpu_to_blade, 255, bytes);
  
        blade = 0;
                if (uv_node_to_blade[nid] >= 0)
                        continue;
                paddr = node_start_pfn(nid) << PAGE_SHIFT;
+               paddr = uv_soc_phys_ram_to_gpa(paddr);
                pnode = (paddr >> m_val) & pnode_mask;
                blade = boot_pnode_to_blade(pnode);
                uv_node_to_blade[nid] = blade;