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authorPeter Ujfalusi <peter.ujfalusi@nokia.com>2009-01-27 11:29:39 +0200
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-01-27 10:42:39 +0000
commit3fc93030e5a792fdd0da3321487f5cbfd1143c2b (patch)
treee917a95e51ac8a393c5641ae4c45fb1ec003146f
parent6627a653bceb3a54e55e5cdc478ec5b8d5c9cc44 (diff)
ASoC: TWL4030: Syncronize the reg_cache for ANAMICL after the offset cancelation
The offset cancelation bit in ANAMICL register is self cleanig. Make sure that the reg_cache holds the same value as the HW register. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/twl4030.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index 796f34cac85..24419afd319 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -913,6 +913,9 @@ static void twl4030_power_up(struct snd_soc_codec *codec)
((byte & TWL4030_CNCL_OFFSET_START) ==
TWL4030_CNCL_OFFSET_START));
+ /* Make sure that the reg_cache has the same value as the HW */
+ twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
+
/* anti-pop when changing analog gain */
regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
twl4030_write(codec, TWL4030_REG_MISC_SET_1,