diff options
| author | Li Yang <leoli@freescale.com> | 2007-06-19 17:33:48 +0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-07-12 16:34:38 -0700 |
| commit | 7542548fd843f3d49068f17a082069319f19992a (patch) | |
| tree | f269ec825dda3ee2e51065bb9347f635da0e6c65 | |
| parent | 7bbe990c989ee16f2c1be3e4ae28f8004bec788c (diff) | |
USB: fsl_usb2_udc: fix bug for portsc bit masking
Fix a bug that PORT_TYPE and PORT_WIDTH aren't masked correctly in portsc.
Signed-off-by: Christopher Cason <chris.cason@nec.com.au>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| -rw-r--r-- | drivers/usb/gadget/fsl_usb2_udc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/usb/gadget/fsl_usb2_udc.c b/drivers/usb/gadget/fsl_usb2_udc.c index e4aa29fc293..4e14bcd7c3b 100644 --- a/drivers/usb/gadget/fsl_usb2_udc.c +++ b/drivers/usb/gadget/fsl_usb2_udc.c @@ -228,7 +228,7 @@ static int dr_controller_setup(struct fsl_udc *udc) /* Config PHY interface */ portctrl = fsl_readl(&dr_regs->portsc1); - portctrl &= ~(PORTSCX_PHY_TYPE_SEL & PORTSCX_PORT_WIDTH); + portctrl &= ~(PORTSCX_PHY_TYPE_SEL | PORTSCX_PORT_WIDTH); switch (udc->phy_mode) { case FSL_USB2_PHY_ULPI: portctrl |= PORTSCX_PTS_ULPI; |