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authorSascha Hauer <s.hauer@pengutronix.de>2010-02-04 14:45:11 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2010-02-04 15:56:34 +0100
commit84ab80616b0eb5fac4d1970f10ea1b3cf75280e1 (patch)
tree5b58e17cffeb5f9966e0efe3d47e589fecafa7eb
parentba593e5966440deec8684863e0cba9b502c4a377 (diff)
i.MX ehci platform support: Some fixes
- The SIC mask is only 2bits wide, not 4 - MX31_OTG_PM_BIT and MX31_H1_PM_BIT use negative logic - clear MX31_H1_DT_BIT and MX31_H2_DT_BIT so that they can be cleared, not only set. - return -EINVAL if called with an invalid controller number Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Cc: Daniel Mack <daniel@caiaq.de>
-rw-r--r--arch/arm/plat-mxc/ehci.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 8df03f36295..586b55dc2ab 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -25,16 +25,16 @@
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX31_OTG_SIC_SHIFT 29
-#define MX31_OTG_SIC_MASK (0xf << MX31_OTG_SIC_SHIFT)
+#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
#define MX31_OTG_PM_BIT (1 << 24)
#define MX31_H2_SIC_SHIFT 21
-#define MX31_H2_SIC_MASK (0xf << MX31_H2_SIC_SHIFT)
+#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
#define MX31_H2_PM_BIT (1 << 16)
#define MX31_H2_DT_BIT (1 << 5)
#define MX31_H1_SIC_SHIFT 13
-#define MX31_H1_SIC_MASK (0xf << MX31_H1_SIC_SHIFT)
+#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
#define MX31_H1_PM_BIT (1 << 8)
#define MX31_H1_DT_BIT (1 << 4)
@@ -51,15 +51,15 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK)
<< MX31_OTG_SIC_SHIFT;
- if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_OTG_PM_BIT;
break;
case 1: /* H1 port */
- v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT);
+ v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK)
<< MX31_H1_SIC_SHIFT;
- if (flags & MXC_EHCI_POWER_PINS_ENABLED)
+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_H1_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
@@ -67,7 +67,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
break;
case 2: /* H2 port */
- v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT);
+ v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK)
<< MX31_H2_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
@@ -77,6 +77,8 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
v |= MX31_H2_DT_BIT;
break;
+ default:
+ return -EINVAL;
}
writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +