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author | Dan Williams <dan.j.williams@intel.com> | 2009-08-28 14:32:04 -0700 |
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committer | Dan Williams <dan.j.williams@intel.com> | 2009-08-29 19:12:39 -0700 |
commit | 7bf649aee8ac93ecc280f8745dcf8ec19d7b9fb1 (patch) | |
tree | b35282323d278afb16c18a42c8c0db34508cef6c /Documentation/scsi/ncr53c8xx.txt | |
parent | 72be12f0c39df46832403cbfd82e132a883f5ddc (diff) |
iop-adma: P+Q support for iop13xx adma engines
iop33x support is not included because that engine is a bit more awkward
to handle in that it can either be in xor mode or pq mode. The
dmaengine/async_tx layers currently only comprehend static capabilities.
Note iop13xx does not support hardware PQ continuation so the driver
must handle the DMA_PREP_CONTINUE flag for operations across > 16
sources. From the comment for dma_maxpq:
/* When an engine does not support native continuation we need 3 extra
* source slots to reuse P and Q with the following coefficients:
* 1/ {00} * P : remove P from Q', but use it as a source for P'
* 2/ {01} * Q : use Q to continue Q' calculation
* 3/ {00} * Q : subtract Q from P' to cancel (2)
*/
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'Documentation/scsi/ncr53c8xx.txt')
0 files changed, 0 insertions, 0 deletions