diff options
| author | Chandra Shekhar <x0044955@ti.com> | 2008-10-08 10:01:40 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2008-10-08 10:01:40 +0300 |
| commit | 9c8e3a0fac67d24bbc60ccb3920b6a9150e798bc (patch) | |
| tree | 2acd9f7e2e43c83e6146065a31b6a9843a2f4f46 /arch/arm/mach-omap2 | |
| parent | b4b58f5834a023dab67201db9a626bef07bb200c (diff) | |
ARM: OMAP: Add support for McBSP devices 3 - 5 on 34xx
Based on Chandra's earlier patches in linux-omap tree.
Signed-off-by: Chandra Shekhar <x0044955@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2')
| -rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 56 |
1 files changed, 55 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index 73f2279ef2e..b4fe0f3714c 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -28,7 +28,7 @@ struct mcbsp_internal_clk { int n_childs; }; -#if defined(CONFIG_ARCH_OMAP24XX) +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) { const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; @@ -89,6 +89,30 @@ static struct mcbsp_internal_clk omap_mcbsp_clks[] = { .disable = omap_mcbsp_clk_disable, }, }, + { + .clk = { + .name = "mcbsp_clk", + .id = 3, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 4, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 5, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, }; #define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) @@ -168,6 +192,33 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .ops = &omap2_mcbsp_ops, .clk_name = "mcbsp_clk", }, + { + .phys_base = OMAP34XX_MCBSP3_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, + .rx_irq = INT_24XX_MCBSP3_IRQ_RX, + .tx_irq = INT_24XX_MCBSP3_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP4_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, + .rx_irq = INT_24XX_MCBSP4_IRQ_RX, + .tx_irq = INT_24XX_MCBSP4_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, + { + .phys_base = OMAP34XX_MCBSP5_BASE, + .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, + .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, + .rx_irq = INT_24XX_MCBSP5_IRQ_RX, + .tx_irq = INT_24XX_MCBSP5_IRQ_TX, + .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", + }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) #else @@ -198,6 +249,9 @@ static int __init omap2_mcbsp_init(void) if (cpu_is_omap24xx()) omap_mcbsp_register_board_cfg(omap24xx_mcbsp_pdata, OMAP24XX_MCBSP_PDATA_SZ); + if (cpu_is_omap34xx()) + omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, + OMAP34XX_MCBSP_PDATA_SZ); return omap_mcbsp_init(); } |