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authorLinus Torvalds <torvalds@linux-foundation.org>2009-01-08 14:25:00 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2009-01-08 14:25:00 -0800
commitce279e6ec91c49f2c5f59f7492e19d39edbf8bbd (patch)
treec2c4fb4266ec8dd07574f22ca6e0e0c943aabc1f /arch/arm/plat-s3c24xx/gpiolib.c
parent894bcdfb1a40a7c5032242c380b956aab106e05d (diff)
parent97b5fe8e28d78779e35ac283bacb9eceffd5b4a3 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (23 commits) [ARM] fix pxa930_trkball build errors [ARM] fix netx [ARM] fix pnx4008 [ARM] fix pxa [ARM] remove missed CLPS7500 defconfig [ARM] clps711x: fix warning in edb7211-mm.c [ARM] clps711x: fix warning in fortunet [ARM] fix AT91, davinci, h720x, ks8695, msm, mx2, mx3, netx, omap1, omap2, pxa, s3c [ARM] Fix realview build [ARM] 5357/1: Kirkwood: add missing ge01 tclk initialization [ARM] 5358/1: AT2440EVB: Use new include path of mci.h [ARM] 5361/1: mv78xx0: fix compilation error [ARM] 5360/1: Orion: fix compilation error [ARM] 5359/1: Kirkwood: fix compilation error [ARM] S3C64XX: Fix EINT group macro definition [ARM] Ensure CONFIG_SERIAL_SAMSUNG_UARTS is always set. [ARM] S3C24XX: Add gpio_to_irq implementation [ARM] S3C24XX: Add gpio_to_irq() facility [ARM] footbridge: dc21285.c warning fixes [ARM] footbridge: add isa_init_irq() to common header ...
Diffstat (limited to 'arch/arm/plat-s3c24xx/gpiolib.c')
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index f95c6c9d9f1..94a341aaa4e 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -59,6 +59,22 @@ static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip,
return 0;
}
+static int s3c24xx_gpiolib_bankf_toirq(struct gpio_chip *chip, unsigned offset)
+{
+ if (offset < 4)
+ return IRQ_EINT0 + offset;
+
+ if (offset < 8)
+ return IRQ_EINT4 + offset - 4;
+
+ return -EINVAL;
+}
+
+static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset)
+{
+ return IRQ_EINT8 + offset;
+}
+
struct s3c_gpio_chip s3c24xx_gpios[] = {
[0] = {
.base = S3C24XX_GPIO_BASE(S3C2410_GPA0),
@@ -114,6 +130,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.owner = THIS_MODULE,
.label = "GPIOF",
.ngpio = 8,
+ .to_irq = s3c24xx_gpiolib_bankf_toirq,
},
},
[6] = {
@@ -123,6 +140,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
.owner = THIS_MODULE,
.label = "GPIOG",
.ngpio = 10,
+ .to_irq = s3c24xx_gpiolib_bankg_toirq,
},
},
};