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authorBen Dooks <ben-linux@fluff.org>2008-10-21 14:07:08 +0100
committerBen Dooks <ben-linux@fluff.org>2008-12-15 23:15:46 +0000
commit80789e79150b34e45a630e2f4f1b04d82c449c19 (patch)
tree2fa0a12db09eafd00568e9c940933d58815c4721 /arch/arm/plat-s3c64xx/include
parent94df868b884d673c294e39a11acdfebf2bfcd67b (diff)
[ARM] S3C64XX: Add IRQ_EINT support
Add the necessary code to support IRQ_EINT(x) on the S3C64XX series of CPUs. Note, since there is no GPIO configuration support in the kernel, the irq set_type method does not configure the relevant pin to interrupt. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include')
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/irqs.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 8bdfb27425e..5ab41ad143b 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -150,7 +150,8 @@
#define S3C_IRQ_EINT_BASE S3C_IRQ(64+5)
-#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE)
+#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE)
+#define IRQ_EINT(x) S3C_EINT(x)
/* Define NR_IRQs here, machine specific can always re-define.
* Currently the IRQ_EINT27 is the last one we can have. */