aboutsummaryrefslogtreecommitdiff
path: root/arch/blackfin/mach-bf537/head.S
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-16 12:45:08 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-16 12:45:08 -0700
commit1b821bfb034c5db5af62b463e3001243905179ba (patch)
treea5c1090f41716a6912742c9bc960dc2d3ae82899 /arch/blackfin/mach-bf537/head.S
parenta45fbc33137b11e479ea8b7d478a1d7e6488971b (diff)
parent1390da4ee75168b6e4d8354e93e3b5f0a0291f2f (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney/blackfin-2.6: Blackfin arch: make sure cycles is marked as volatile so gcc doesnt reorder on us Blackfin arch: disable CONFIG_HW_RANDOM and CONFIG_DAB in defconfig files Blackfin arch: update cache flush prototypes with argument names to make them less mysterious Blackfin arch: move bfin_addr_dcachable() and friends into the cacheflush header where it belongs Blackfin arch: use the new bfin_addr_dcachable() function Blackfin arch: fix bug - build kernel failed at head.S when reprogram clock on all platforms Blackfin arch: unify/cleanup cache code Blackfin arch: update AD7879 platform resources in board file Blackfin arch: Zero out bss region in L1/L2 memory. Blackfin arch: add read/write IO accessor functions to Blackfin Blackfin arch: fix bug - some serial header files set RTS to an input when they should all be outputs
Diffstat (limited to 'arch/blackfin/mach-bf537/head.S')
-rw-r--r--arch/blackfin/mach-bf537/head.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/mach-bf537/head.S b/arch/blackfin/mach-bf537/head.S
index 559a7eef7a3..f5c94bf80e3 100644
--- a/arch/blackfin/mach-bf537/head.S
+++ b/arch/blackfin/mach-bf537/head.S
@@ -88,7 +88,7 @@ ENTRY(_start_dma_code)
r1 = r1 << 8; /* Shift it over */
r0 = r1 | r0; /* add them all together */
#ifdef ANOMALY_05000265
- r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
+ BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
#endif
p0.h = hi(PLL_CTL);