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authorKumar Gala <galak@kernel.crashing.org>2007-10-04 01:04:57 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-10-08 08:38:47 -0500
commite1c1575f831ab2165732037e6d664010a0149730 (patch)
treeecfc90b06eb4b7402a3334ebe6b8287e73abc671 /arch/powerpc/boot/dts/mpc8641_hpcn.dts
parentc9438affcb7ac0dda4c6c6961637fb272f7c32d4 (diff)
[POWERPC] 85xx/86xx: refactor RSTCR reset code
On the majority of 85xx & 86xx we have a register that's ability to assert HRESET_REQ to reset the board. We refactored that code so it can be shared between both platforms into fsl_soc.c and removed all the duplication in each platform directory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8641_hpcn.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index f797662212b..367765937a0 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -214,6 +214,12 @@
device_type = "open-pic";
big-endian;
};
+
+ global-utilities@e0000 {
+ compatible = "fsl,mpc8641-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
};
pcie@f8008000 {