diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2007-10-11 13:36:52 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2007-10-11 13:36:52 -0500 |
| commit | 8a13c4f972e6c107d8cff54de647544c00e25b41 (patch) | |
| tree | bd1e291a935fe8420b270d0a4f8e9d3b7a8e1bd1 /arch/powerpc/kernel/head_32.S | |
| parent | f5d7d13cd96313a90f8d13fa5d6e0704f6d534ba (diff) | |
[POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers
Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on
6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or
user space address. This mimics how the macro is_kernel_addr() works.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/head_32.S')
| -rw-r--r-- | arch/powerpc/kernel/head_32.S | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index d83f04e5a59..a5b13ae7fd2 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S @@ -469,12 +469,12 @@ InstructionTLBMiss: mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_IMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 + lis r1,PAGE_OFFSET@h /* check if kernel address */ + cmplw 0,r1,r3 mfspr r2,SPRN_SPRG3 li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ lwz r2,PGDIR(r2) - blt+ 112f + bge- 112f mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2,swapper_pg_dir@ha /* if kernel address, use */ @@ -543,12 +543,12 @@ DataLoadTLBMiss: mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 + lis r1,PAGE_OFFSET@h /* check if kernel address */ + cmplw 0,r1,r3 mfspr r2,SPRN_SPRG3 li r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */ lwz r2,PGDIR(r2) - blt+ 112f + bge- 112f mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2,swapper_pg_dir@ha /* if kernel address, use */ @@ -615,12 +615,12 @@ DataStoreTLBMiss: mfctr r0 /* Get PTE (linux-style) and check access */ mfspr r3,SPRN_DMISS - lis r1,KERNELBASE@h /* check if kernel address */ - cmplw 0,r3,r1 + lis r1,PAGE_OFFSET@h /* check if kernel address */ + cmplw 0,r1,r3 mfspr r2,SPRN_SPRG3 li r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */ lwz r2,PGDIR(r2) - blt+ 112f + bge- 112f mfspr r2,SPRN_SRR1 /* and MSR_PR bit from SRR1 */ rlwimi r1,r2,32-12,29,29 /* shift MSR_PR to _PAGE_USER posn */ lis r2,swapper_pg_dir@ha /* if kernel address, use */ |