diff options
author | Ingo Molnar <mingo@elte.hu> | 2008-07-21 17:19:50 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-07-21 17:19:50 +0200 |
commit | eb6a12c2428d21a9f3e0f1a50e927d5fd80fc3d0 (patch) | |
tree | 5ac6f43899648abeab1d43aad3107f664e7f13d5 /drivers/media/video/cx18/cx18-av-core.c | |
parent | c4762aba0b1f72659aae9ce37b772ca8bd8f06f4 (diff) | |
parent | 14b395e35d1afdd8019d11b92e28041fad591b71 (diff) |
Merge branch 'linus' into cpus4096-for-linus
Conflicts:
net/sunrpc/svc.c
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/media/video/cx18/cx18-av-core.c')
-rw-r--r-- | drivers/media/video/cx18/cx18-av-core.c | 225 |
1 files changed, 156 insertions, 69 deletions
diff --git a/drivers/media/video/cx18/cx18-av-core.c b/drivers/media/video/cx18/cx18-av-core.c index faca43eb940..3b0a2c45060 100644 --- a/drivers/media/video/cx18/cx18-av-core.c +++ b/drivers/media/video/cx18/cx18-av-core.c @@ -69,58 +69,6 @@ int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask, or_value); } -int cx18_av_write_no_acfg(struct cx18 *cx, u16 addr, u8 value, int no_acfg_mask) -{ - int retval; - u32 saved_reg[8] = {0}; - - if (no_acfg_mask & CXADEC_NO_ACFG_AFE) { - saved_reg[0] = cx18_av_read4(cx, CXADEC_CHIP_CTRL); - saved_reg[1] = cx18_av_read4(cx, CXADEC_AFE_CTRL); - } - - if (no_acfg_mask & CXADEC_NO_ACFG_PLL) { - saved_reg[2] = cx18_av_read4(cx, CXADEC_PLL_CTRL1); - saved_reg[3] = cx18_av_read4(cx, CXADEC_VID_PLL_FRAC); - } - - if (no_acfg_mask & CXADEC_NO_ACFG_VID) { - saved_reg[4] = cx18_av_read4(cx, CXADEC_HORIZ_TIM_CTRL); - saved_reg[5] = cx18_av_read4(cx, CXADEC_VERT_TIM_CTRL); - saved_reg[6] = cx18_av_read4(cx, CXADEC_SRC_COMB_CFG); - saved_reg[7] = cx18_av_read4(cx, CXADEC_CHROMA_VBIOFF_CFG); - } - - retval = cx18_av_write(cx, addr, value); - - if (no_acfg_mask & CXADEC_NO_ACFG_AFE) { - cx18_av_write4(cx, CXADEC_CHIP_CTRL, saved_reg[0]); - cx18_av_write4(cx, CXADEC_AFE_CTRL, saved_reg[1]); - } - - if (no_acfg_mask & CXADEC_NO_ACFG_PLL) { - cx18_av_write4(cx, CXADEC_PLL_CTRL1, saved_reg[2]); - cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, saved_reg[3]); - } - - if (no_acfg_mask & CXADEC_NO_ACFG_VID) { - cx18_av_write4(cx, CXADEC_HORIZ_TIM_CTRL, saved_reg[4]); - cx18_av_write4(cx, CXADEC_VERT_TIM_CTRL, saved_reg[5]); - cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, saved_reg[6]); - cx18_av_write4(cx, CXADEC_CHROMA_VBIOFF_CFG, saved_reg[7]); - } - - return retval; -} - -int cx18_av_and_or_no_acfg(struct cx18 *cx, u16 addr, unsigned and_mask, - u8 or_value, int no_acfg_mask) -{ - return cx18_av_write_no_acfg(cx, addr, - (cx18_av_read(cx, addr) & and_mask) | - or_value, no_acfg_mask); -} - /* ----------------------------------------------------------------------- */ static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, @@ -132,6 +80,7 @@ static void log_video_status(struct cx18 *cx); static void cx18_av_initialize(struct cx18 *cx) { + struct cx18_av_state *state = &cx->av_state; u32 v; cx18_av_loadfw(cx); @@ -211,6 +160,149 @@ static void cx18_av_initialize(struct cx18 *cx) /* CxDevWrReg(CXADEC_SRC_COMB_CFG, 0x6628021F); */ /* } */ cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, 0x6628021F); + state->default_volume = 228 - cx18_av_read(cx, 0x8d4); + state->default_volume = ((state->default_volume / 2) + 23) << 9; +} + +/* ----------------------------------------------------------------------- */ + +void cx18_av_std_setup(struct cx18 *cx) +{ + struct cx18_av_state *state = &cx->av_state; + v4l2_std_id std = state->std; + int hblank, hactive, burst, vblank, vactive, sc; + int vblank656, src_decimation; + int luma_lpf, uv_lpf, comb; + u32 pll_int, pll_frac, pll_post; + + /* datasheet startup, step 8d */ + if (std & ~V4L2_STD_NTSC) + cx18_av_write(cx, 0x49f, 0x11); + else + cx18_av_write(cx, 0x49f, 0x14); + + if (std & V4L2_STD_625_50) { + hblank = 132; + hactive = 720; + burst = 93; + vblank = 36; + vactive = 580; + vblank656 = 40; + src_decimation = 0x21f; + + luma_lpf = 2; + if (std & V4L2_STD_PAL) { + uv_lpf = 1; + comb = 0x20; + sc = 688739; + } else if (std == V4L2_STD_PAL_Nc) { + uv_lpf = 1; + comb = 0x20; + sc = 556453; + } else { /* SECAM */ + uv_lpf = 0; + comb = 0; + sc = 672351; + } + } else { + hactive = 720; + hblank = 122; + vactive = 487; + luma_lpf = 1; + uv_lpf = 1; + vblank = 26; + vblank656 = 26; + + src_decimation = 0x21f; + if (std == V4L2_STD_PAL_60) { + burst = 0x5b; + luma_lpf = 2; + comb = 0x20; + sc = 688739; + } else if (std == V4L2_STD_PAL_M) { + burst = 0x61; + comb = 0x20; + sc = 555452; + } else { + burst = 0x5b; + comb = 0x66; + sc = 556063; + } + } + + /* DEBUG: Displays configured PLL frequency */ + pll_int = cx18_av_read(cx, 0x108); + pll_frac = cx18_av_read4(cx, 0x10c) & 0x1ffffff; + pll_post = cx18_av_read(cx, 0x109); + CX18_DEBUG_INFO("PLL regs = int: %u, frac: %u, post: %u\n", + pll_int, pll_frac, pll_post); + + if (pll_post) { + int fin, fsc; + int pll = 28636363L * ((((u64)pll_int) << 25) + pll_frac); + + pll >>= 25; + pll /= pll_post; + CX18_DEBUG_INFO("PLL = %d.%06d MHz\n", + pll / 1000000, pll % 1000000); + CX18_DEBUG_INFO("PLL/8 = %d.%06d MHz\n", + pll / 8000000, (pll / 8) % 1000000); + + fin = ((u64)src_decimation * pll) >> 12; + CX18_DEBUG_INFO("ADC Sampling freq = %d.%06d MHz\n", + fin / 1000000, fin % 1000000); + + fsc = (((u64)sc) * pll) >> 24L; + CX18_DEBUG_INFO("Chroma sub-carrier freq = %d.%06d MHz\n", + fsc / 1000000, fsc % 1000000); + + CX18_DEBUG_INFO("hblank %i, hactive %i, " + "vblank %i , vactive %i, vblank656 %i, src_dec %i," + "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x," + " sc 0x%06x\n", + hblank, hactive, vblank, vactive, vblank656, + src_decimation, burst, luma_lpf, uv_lpf, comb, sc); + } + + /* Sets horizontal blanking delay and active lines */ + cx18_av_write(cx, 0x470, hblank); + cx18_av_write(cx, 0x471, 0xff & (((hblank >> 8) & 0x3) | + (hactive << 4))); + cx18_av_write(cx, 0x472, hactive >> 4); + + /* Sets burst gate delay */ + cx18_av_write(cx, 0x473, burst); + + /* Sets vertical blanking delay and active duration */ + cx18_av_write(cx, 0x474, vblank); + cx18_av_write(cx, 0x475, 0xff & (((vblank >> 8) & 0x3) | + (vactive << 4))); + cx18_av_write(cx, 0x476, vactive >> 4); + cx18_av_write(cx, 0x477, vblank656); + + /* Sets src decimation rate */ + cx18_av_write(cx, 0x478, 0xff & src_decimation); + cx18_av_write(cx, 0x479, 0xff & (src_decimation >> 8)); + + /* Sets Luma and UV Low pass filters */ + cx18_av_write(cx, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30)); + + /* Enables comb filters */ + cx18_av_write(cx, 0x47b, comb); + + /* Sets SC Step*/ + cx18_av_write(cx, 0x47c, sc); + cx18_av_write(cx, 0x47d, 0xff & sc >> 8); + cx18_av_write(cx, 0x47e, 0xff & sc >> 16); + + /* Sets VBI parameters */ + if (std & V4L2_STD_625_50) { + cx18_av_write(cx, 0x47f, 0x01); + state->vbi_line_offset = 5; + } else { + cx18_av_write(cx, 0x47f, 0x00); + state->vbi_line_offset = 8; + } } /* ----------------------------------------------------------------------- */ @@ -221,16 +313,9 @@ static void input_change(struct cx18 *cx) v4l2_std_id std = state->std; /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */ - if (std & V4L2_STD_SECAM) - cx18_av_write_no_acfg(cx, 0x402, 0, CXADEC_NO_ACFG_ALL); - else { - cx18_av_write_no_acfg(cx, 0x402, 0x04, CXADEC_NO_ACFG_ALL); - cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11); - } - cx18_av_and_or_no_acfg(cx, 0x401, ~0x60, 0, - CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); - cx18_av_and_or_no_acfg(cx, 0x401, ~0x60, 0x60, - CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); + cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11); + cx18_av_and_or(cx, 0x401, ~0x60, 0); + cx18_av_and_or(cx, 0x401, ~0x60, 0x60); if (std & V4L2_STD_525_60) { if (std == V4L2_STD_NTSC_M_JP) { @@ -300,7 +385,8 @@ static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, } switch (aud_input) { - case CX18_AV_AUDIO_SERIAL: + case CX18_AV_AUDIO_SERIAL1: + case CX18_AV_AUDIO_SERIAL2: /* do nothing, use serial audio input */ break; case CX18_AV_AUDIO4: reg &= ~0x30; break; @@ -316,8 +402,7 @@ static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, cx18_av_write(cx, 0x103, reg); /* Set INPUT_MODE to Composite (0) or S-Video (1) */ - cx18_av_and_or_no_acfg(cx, 0x401, ~0x6, is_composite ? 0 : 0x02, - CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); + cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02); /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */ cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0); /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */ @@ -373,13 +458,13 @@ static int set_v4lstd(struct cx18 *cx) This happens for example with the Yuan MPC622. */ if (fmt >= 4 && fmt < 8) { /* Set format to NTSC-M */ - cx18_av_and_or_no_acfg(cx, 0x400, ~0xf, 1, CXADEC_NO_ACFG_AFE); + cx18_av_and_or(cx, 0x400, ~0xf, 1); /* Turn off LCOMB */ cx18_av_and_or(cx, 0x47b, ~6, 0); } - cx18_av_and_or_no_acfg(cx, 0x400, ~0xf, fmt, CXADEC_NO_ACFG_AFE); - cx18_av_and_or_no_acfg(cx, 0x403, ~0x3, pal_m, CXADEC_NO_ACFG_ALL); - cx18_av_vbi_setup(cx); + cx18_av_and_or(cx, 0x400, ~0x2f, fmt | 0x20); + cx18_av_and_or(cx, 0x403, ~0x3, pal_m); + cx18_av_std_setup(cx); input_change(cx); return 0; } @@ -618,6 +703,8 @@ int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg) switch (qc->id) { case V4L2_CID_AUDIO_VOLUME: + return v4l2_ctrl_query_fill(qc, 0, 65535, + 65535 / 100, state->default_volume); case V4L2_CID_AUDIO_MUTE: case V4L2_CID_AUDIO_BALANCE: case V4L2_CID_AUDIO_BASS: |