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authorSuresh Siddha <suresh.b.siddha@intel.com>2007-08-23 15:18:02 +0200
committerIngo Molnar <mingo@elte.hu>2007-08-23 15:18:02 +0200
commitf8700df7c419781efb34696de7e7f49717f8ede7 (patch)
treec3b4c8e563e1caf5e144310817fc1ecdf812ae41 /include/asm-mips/mips-boards
parentefe567fc8281661524ffa75477a7c4ca9b466c63 (diff)
sched: fix broken SMT/MC optimizations
On a four package system with HT - HT load balancing optimizations were broken. For example, if two tasks end up running on two logical threads of one of the packages, scheduler is not able to pull one of the tasks to a completely idle package. In this scenario, for nice-0 tasks, imbalance calculated by scheduler will be 512 and find_busiest_queue() will return 0 (as each cpu's load is 1024 > imbalance and has only one task running). Similarly MC scheduler optimizations also get fixed with this patch. [ mingo@elte.hu: restored fair balancing by increasing the fuzz and adding it back to the power decision, without the /2 factor. ] Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-mips/mips-boards')
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