Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (28 commits)
  mm/hugetlb.c must #include <asm/io.h>
  video: Fix up hp6xx driver build regressions.
  sh: defconfig updates.
  sh: Kill off stray mach-rsk7203 reference.
  serial: sh-sci: Fix up SH7760/SH7780/SH7785 early printk regression.
  sh: Move out individual boards without mach groups.
  sh: Make sure AT_SYSINFO_EHDR is exposed to userspace in asm/auxvec.h.
  sh: Allow SH-3 and SH-5 to use common headers.
  sh: Provide common CPU headers, prune the SH-2 and SH-2A directories.
  sh/maple: clean maple bus code
  sh: More header path fixups for mach dir refactoring.
  sh: Move out the solution engine headers to arch/sh/include/mach-se/
  sh: I2C fix for AP325RXA and Migo-R
  sh: Shuffle the board directories in to mach groups.
  sh: dma-sh: Fix up dreamcast dma.h mach path.
  sh: Switch KBUILD_DEFCONFIG to shx3_defconfig.
  sh: Add ARCH_DEFCONFIG entries for sh and sh64.
  sh: Fix compile error of Solution Engine
  sh: Proper __put_user_asm() size mismatch fix.
  sh: Stub in a dummy ENTRY_OFFSET for uImage offset calculation.
  ...

1 files changed, 0 insertions, 63 deletions

diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h
deleted file mode 100644
index 9ea8eb27b18..00000000000
--- a/include/asm-sh/cpu-sh4/mmu_context.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * include/asm-sh/cpu-sh4/mmu_context.h
- *
- * Copyright (C) 1999 Niibe Yutaka
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#ifndef __ASM_CPU_SH4_MMU_CONTEXT_H
-#define __ASM_CPU_SH4_MMU_CONTEXT_H
-
-#define MMU_PTEH	0xFF000000	/* Page table entry register HIGH */
-#define MMU_PTEL	0xFF000004	/* Page table entry register LOW */
-#define MMU_TTB		0xFF000008	/* Translation table base register */
-#define MMU_TEA		0xFF00000C	/* TLB Exception Address */
-#define MMU_PTEA	0xFF000034	/* Page table entry assistance register */
-
-#define MMUCR		0xFF000010	/* MMU Control Register */
-
-#define MMU_ITLB_ADDRESS_ARRAY	0xF2000000
-#define MMU_UTLB_ADDRESS_ARRAY	0xF6000000
-#define MMU_PAGE_ASSOC_BIT	0x80
-
-#define MMUCR_TI		(1<<2)
-
-#ifdef CONFIG_X2TLB
-#define MMUCR_ME		(1 << 7)
-#else
-#define MMUCR_ME		(0)
-#endif
-
-#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
-#define MMUCR_SE		(1 << 4)
-#else
-#define MMUCR_SE		(0)
-#endif
-
-#ifdef CONFIG_SH_STORE_QUEUES
-#define MMUCR_SQMD		(1 << 9)
-#else
-#define MMUCR_SQMD		(0)
-#endif
-
-#define MMU_NTLB_ENTRIES	64
-#define MMU_CONTROL_INIT	(0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
-
-#define MMU_ITLB_DATA_ARRAY	0xF3000000
-#define MMU_UTLB_DATA_ARRAY	0xF7000000
-
-#define MMU_UTLB_ENTRIES	   64
-#define MMU_U_ENTRY_SHIFT	    8
-#define MMU_UTLB_VALID		0x100
-#define MMU_ITLB_ENTRIES	    4
-#define MMU_I_ENTRY_SHIFT	    8
-#define MMU_ITLB_VALID		0x100
-
-#define TRA	0xff000020
-#define EXPEVT	0xff000024
-#define INTEVT	0xff000028
-
-#endif /* __ASM_CPU_SH4_MMU_CONTEXT_H */
-