diff options
Diffstat (limited to 'arch/arm/plat-s3c/include/plat')
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/adc.h | 29 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/clock.h | 72 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/cpu-freq.h | 94 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/cpu.h | 69 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/devs.h | 49 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/regs-irqtype.h | 21 | ||||
| -rw-r--r-- | arch/arm/plat-s3c/include/plat/uncompress.h | 28 |
7 files changed, 362 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h new file mode 100644 index 00000000000..43df2a404b0 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/adc.h @@ -0,0 +1,29 @@ +/* arch/arm/plat-s3c/include/plat/adc.h + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simnte.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX ADC driver information + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_ADC_H +#define __ASM_PLAT_ADC_H __FILE__ + +struct s3c_adc_client; + +extern int s3c_adc_start(struct s3c_adc_client *client, + unsigned int channel, unsigned int nr_samples); + +extern struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, + void (*select)(unsigned selected), + void (*conv)(unsigned d0, unsigned d1), + unsigned int is_ts); + +extern void s3c_adc_release(struct s3c_adc_client *client); + +#endif /* __ASM_PLAT_ADC_H */ diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-s3c/include/plat/clock.h new file mode 100644 index 00000000000..d871609738f --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/clock.h @@ -0,0 +1,72 @@ +/* linux/arch/arm/plat-s3c/include/plat/clock.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * http://www.simtec.co.uk/products/SWLINUX/ + * Written by Ben Dooks, <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/spinlock.h> + +struct clk { + struct list_head list; + struct module *owner; + struct clk *parent; + const char *name; + int id; + int usage; + unsigned long rate; + unsigned long ctrlbit; + + int (*enable)(struct clk *, int enable); + int (*set_rate)(struct clk *c, unsigned long rate); + unsigned long (*get_rate)(struct clk *c); + unsigned long (*round_rate)(struct clk *c, unsigned long rate); + int (*set_parent)(struct clk *c, struct clk *parent); +}; + +/* other clocks which may be registered by board support */ + +extern struct clk s3c24xx_dclk0; +extern struct clk s3c24xx_dclk1; +extern struct clk s3c24xx_clkout0; +extern struct clk s3c24xx_clkout1; +extern struct clk s3c24xx_uclk; + +extern struct clk clk_usb_bus; + +/* core clock support */ + +extern struct clk clk_f; +extern struct clk clk_h; +extern struct clk clk_p; +extern struct clk clk_mpll; +extern struct clk clk_upll; +extern struct clk clk_xtal; + +/* exports for arch/arm/mach-s3c2410 + * + * Please DO NOT use these outside of arch/arm/mach-s3c2410 +*/ + +extern spinlock_t clocks_lock; + +extern int s3c2410_clkcon_enable(struct clk *clk, int enable); + +extern int s3c24xx_register_clock(struct clk *clk); +extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); + +extern int s3c24xx_register_baseclocks(unsigned long xtal); + +extern void s3c24xx_setup_clocks(unsigned long fclk, + unsigned long hclk, + unsigned long pclk); + +extern void s3c2410_setup_clocks(void); +extern void s3c2412_setup_clocks(void); +extern void s3c244x_setup_clocks(void); +extern void s3c2443_setup_clocks(void); + diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h new file mode 100644 index 00000000000..c86a13307e9 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h @@ -0,0 +1,94 @@ +/* arch/arm/plat-s3c/include/plat/cpu-freq.h + * + * Copyright (c) 2006,2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C CPU frequency scaling support - driver and board + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/cpufreq.h> + +struct s3c_cpufreq_info; +struct s3c_cpufreq_board; +struct s3c_iotimings; + +struct s3c_freq { + unsigned long fclk; + unsigned long armclk; + unsigned long hclk_tns; /* in 10ths of ns */ + unsigned long hclk; + unsigned long pclk; +}; + +/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the + * notification can use this information that is not provided by just + * having the core frequency alone. + */ + +struct s3c_cpufreq_freqs { + struct cpufreq_freqs freqs; + struct s3c_freq old; + struct s3c_freq new; +}; + +#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) + +struct s3c_clkdivs { + int p_divisor; /* fclk / pclk */ + int h_divisor; /* fclk / hclk */ + int arm_divisor; /* not all cpus have this. */ + unsigned char dvs; /* using dvs mode to arm. */ +}; + +#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) + +struct s3c_pllval { + unsigned long freq; + unsigned long pll_reg; +}; + +struct s3c_cpufreq_config { + struct s3c_freq freq; + struct s3c_pllval pll; + struct s3c_clkdivs divs; + struct s3c_cpufreq_info *info; /* for core, not drivers */ + struct s3c_cpufreq_board *board; +}; + +/* s3c_cpufreq_board + * + * per-board configuraton information, such as memory refresh and + * how to initialise IO timings. + */ +struct s3c_cpufreq_board { + unsigned int refresh; /* refresh period in ns */ + unsigned int auto_io:1; /* automatically init io timings. */ + unsigned int need_io:1; /* set if needs io timing support. */ + + /* any non-zero field in here is taken as an upper limit. */ + struct s3c_freq max; /* frequency limits */ +}; + +/* Things depending on frequency scaling. */ +#ifdef CONFIG_CPU_FREQ_S3C +#define __init_or_cpufreq +#else +#define __init_or_cpufreq __init +#endif + +/* Board functions */ + +#ifdef CONFIG_CPU_FREQ_S3C +extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board); +#else + +static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) +{ + return 0; +} +#endif /* CONFIG_CPU_FREQ_S3C */ diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h new file mode 100644 index 00000000000..011157ea871 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/cpu.h @@ -0,0 +1,69 @@ +/* linux/arch/arm/plat-s3c/include/plat/cpu.h + * + * Copyright (c) 2004-2005 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for S3C24XX CPU support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/* todo - fix when rmk changes iodescs to use `void __iomem *` */ + +#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } + +#ifndef MHZ +#define MHZ (1000*1000) +#endif + +#define print_mhz(m) ((m) / MHZ), (((m) / 1000) % 1000) + +/* forward declaration */ +struct s3c24xx_uart_resources; +struct platform_device; +struct s3c2410_uartcfg; +struct map_desc; + +/* per-cpu initialisation function table. */ + +struct cpu_table { + unsigned long idcode; + unsigned long idmask; + void (*map_io)(void); + void (*init_uarts)(struct s3c2410_uartcfg *cfg, int no); + void (*init_clocks)(int xtal); + int (*init)(void); + const char *name; +}; + +extern void s3c_init_cpu(unsigned long idcode, + struct cpu_table *cpus, unsigned int cputab_size); + +/* core initialisation functions */ + +extern void s3c24xx_init_irq(void); + +extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); + +extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); + +extern void s3c24xx_init_clocks(int xtal); + +extern void s3c24xx_init_uartdevs(char *name, + struct s3c24xx_uart_resources *res, + struct s3c2410_uartcfg *cfg, int no); + +/* timer for 2410/2440 */ + +struct sys_timer; +extern struct sys_timer s3c24xx_timer; + +/* system device classes */ + +extern struct sysdev_class s3c2410_sysclass; +extern struct sysdev_class s3c2412_sysclass; +extern struct sysdev_class s3c2440_sysclass; +extern struct sysdev_class s3c2442_sysclass; +extern struct sysdev_class s3c2443_sysclass; diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h new file mode 100644 index 00000000000..badaac9d64a --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/devs.h @@ -0,0 +1,49 @@ +/* linux/include/asm-arm/plat-s3c24xx/devs.h + * + * Copyright (c) 2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * Header file for s3c2410 standard platform devices + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ +#include <linux/platform_device.h> + +struct s3c24xx_uart_resources { + struct resource *resources; + unsigned long nr_resources; +}; + +extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; + +extern struct platform_device *s3c24xx_uart_devs[]; +extern struct platform_device *s3c24xx_uart_src[]; + +extern struct platform_device s3c_device_timer[]; + +extern struct platform_device s3c_device_usb; +extern struct platform_device s3c_device_lcd; +extern struct platform_device s3c_device_wdt; +extern struct platform_device s3c_device_i2c; +extern struct platform_device s3c_device_iis; +extern struct platform_device s3c_device_rtc; +extern struct platform_device s3c_device_adc; +extern struct platform_device s3c_device_sdi; +extern struct platform_device s3c_device_hsmmc; + +extern struct platform_device s3c_device_spi0; +extern struct platform_device s3c_device_spi1; + +extern struct platform_device s3c_device_nand; + +extern struct platform_device s3c_device_usbgadget; + +/* s3c2440 specific devices */ + +#ifdef CONFIG_CPU_S3C2440 + +extern struct platform_device s3c_device_camif; + +#endif diff --git a/arch/arm/plat-s3c/include/plat/regs-irqtype.h b/arch/arm/plat-s3c/include/plat/regs-irqtype.h new file mode 100644 index 00000000000..c63cd3fc5ad --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/regs-irqtype.h @@ -0,0 +1,21 @@ +/* arch/arm/plat-s3c/include/plat/regs-irqtype.h + * + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C - IRQ detection types. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* values for S3C2410_EXTINT0/1/2 and other cpus in the series, including + * the S3C64XX +*/ +#define S3C2410_EXTINT_LOWLEV (0x00) +#define S3C2410_EXTINT_HILEV (0x01) +#define S3C2410_EXTINT_FALLEDGE (0x02) +#define S3C2410_EXTINT_RISEEDGE (0x04) +#define S3C2410_EXTINT_BOTHEDGE (0x06) diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index 8a8a927292e..2c39a309aeb 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -139,6 +139,28 @@ static void arch_decomp_error(const char *x) static void error(char *err); +#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO +static inline void arch_enable_uart_fifo(void) +{ + u32 fifocon = uart_rd(S3C2410_UFCON); + + if (!(fifocon & S3C2410_UFCON_FIFOMODE)) { + fifocon |= S3C2410_UFCON_RESETBOTH; + uart_wr(S3C2410_UFCON, fifocon); + + /* wait for fifo reset to complete */ + while (1) { + fifocon = uart_rd(S3C2410_UFCON); + if (!(fifocon & S3C2410_UFCON_RESETBOTH)) + break; + } + } +} +#else +#define arch_enable_uart_fifo() do { } while(0) +#endif + + static void arch_decomp_setup(void) { @@ -149,6 +171,12 @@ arch_decomp_setup(void) arch_detect_cpu(); arch_decomp_wdog_start(); + + /* Enable the UART FIFOs if they where not enabled and our + * configuration says we should turn them on. + */ + + arch_enable_uart_fifo(); } |