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-rw-r--r--arch/mips/kernel/smtc.c2
-rw-r--r--arch/mips/kernel/time.c5
2 files changed, 3 insertions, 4 deletions
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index 5b17a3d6ae4..604bcc5cb7c 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -577,7 +577,7 @@ void smtc_init_secondary(void)
{
/*
* Start timer on secondary VPEs if necessary.
- * mips_timer_setup should already have been invoked by init/main
+ * plat_timer_setup has already have been invoked by init/main
* on "boot" TC. Like per_cpu_trap_init() hack, this assumes that
* SMTC init code assigns TCs consdecutively and in ascending order
* to across available VPEs.
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 2393c11d5a2..170cb67f4ed 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -566,14 +566,13 @@ asmlinkage void ll_local_timer_interrupt(int irq, struct pt_regs *regs)
* 2) setup xtime based on rtc_mips_get_time().
* 3) choose a appropriate gettimeoffset routine.
* 4) calculate a couple of cached variables for later usage
- * 5) board_timer_setup() -
+ * 5) plat_timer_setup() -
* a) (optional) over-write any choices made above by time_init().
* b) machine specific code should setup the timer irqaction.
* c) enable the timer interrupt
*/
void (*board_time_init)(void);
-void (*board_timer_setup)(struct irqaction *irq);
unsigned int mips_hpt_frequency;
@@ -718,7 +717,7 @@ void __init time_init(void)
* to be NULL function so that we are sure the high-level code
* is not invoked accidentally.
*/
- board_timer_setup(&timer_irqaction);
+ plat_timer_setup(&timer_irqaction);
}
#define FEBRUARY 2