diff options
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/linux32.c | 10 | ||||
| -rw-r--r-- | arch/mips/kernel/r4k_switch.S | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/scall32-o32.S | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/scall64-64.S | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/scall64-n32.S | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/scall64-o32.S | 6 | ||||
| -rw-r--r-- | arch/mips/kernel/smp.c | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/smtc-asm.S | 3 | ||||
| -rw-r--r-- | arch/mips/kernel/smtc.c | 4 | ||||
| -rw-r--r-- | arch/mips/kernel/traps.c | 27 |
10 files changed, 50 insertions, 20 deletions
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index 37849edd064..06e04da211d 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c @@ -556,6 +556,16 @@ asmlinkage long sys32_sync_file_range(int fd, int __pad, flags); } +asmlinkage long sys32_fadvise64_64(int fd, int __pad, + unsigned long a2, unsigned long a3, + unsigned long a4, unsigned long a5, + int flags) +{ + return sys_fadvise64_64(fd, + merge_64(a2, a3), merge_64(a4, a5), + flags); +} + save_static_function(sys32_clone); __attribute_used__ noinline static int _sys32_clone(nabi_no_regargs struct pt_regs regs) diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S index cc566cf1224..06729596812 100644 --- a/arch/mips/kernel/r4k_switch.S +++ b/arch/mips/kernel/r4k_switch.S @@ -174,7 +174,7 @@ LEAF(_init_fpu) or t0, t1 mtc0 t0, CP0_STATUS #endif /* CONFIG_MIPS_MT_SMTC */ - fpu_enable_hazard + enable_fpu_hazard li t1, FPU_DEFAULT ctc1 t1, fcr31 diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 0c9a9ff8cd2..ae985d1fcca 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S @@ -657,7 +657,11 @@ einval: li v0, -EINVAL sys sys_getcpu 3 sys sys_epoll_pwait 6 sys sys_ioprio_set 3 - sys sys_ioprio_get 2 + sys sys_ioprio_get 2 /* 4315 */ + sys sys_utimensat 4 + sys sys_signalfd 3 + sys sys_timerfd 4 + sys sys_eventfd 1 .endm /* We pre-compute the number of _instruction_ bytes needed to diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index 23f3b118f71..7bcd5a1a85f 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S @@ -473,4 +473,8 @@ sys_call_table: PTR sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get + PTR sys_utimensat /* 5275 */ + PTR sys_signalfd + PTR sys_timerfd + PTR sys_eventfd .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 6eac2833742..532a2f3b42f 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S @@ -299,7 +299,7 @@ EXPORT(sysn32_call_table) PTR sys_ni_syscall /* res. for afs_syscall */ PTR sys_ni_syscall /* res. for security */ PTR sys_gettid - PTR sys32_readahead + PTR sys_readahead PTR sys_setxattr /* 6180 */ PTR sys_lsetxattr PTR sys_fsetxattr @@ -399,4 +399,8 @@ EXPORT(sysn32_call_table) PTR compat_sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get + PTR compat_sys_utimensat + PTR compat_sys_signalfd /* 5280 */ + PTR compat_sys_timerfd + PTR sys_eventfd .size sysn32_call_table,.-sysn32_call_table diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index 7e74b412a78..6bbe0f4ed8b 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -459,7 +459,7 @@ sys_call_table: PTR sys_remap_file_pages PTR sys_set_tid_address PTR sys_restart_syscall - PTR sys_fadvise64_64 + PTR sys32_fadvise64_64 PTR compat_sys_statfs64 /* 4255 */ PTR compat_sys_fstatfs64 PTR compat_sys_timer_create @@ -521,4 +521,8 @@ sys_call_table: PTR compat_sys_epoll_pwait PTR sys_ioprio_set PTR sys_ioprio_get /* 4315 */ + PTR compat_sys_utimensat + PTR compat_sys_signalfd + PTR compat_sys_timerfd + PTR sys_eventfd .size sys_call_table,.-sys_call_table diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index c46e479c992..67edfa7ed93 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -68,7 +68,7 @@ extern ATTRIB_NORET void cpu_idle(void); * First C code run on the secondary CPUs after being started up by * the master. */ -asmlinkage void start_secondary(void) +asmlinkage __cpuinit void start_secondary(void) { unsigned int cpu; diff --git a/arch/mips/kernel/smtc-asm.S b/arch/mips/kernel/smtc-asm.S index 921207c4a83..20938a4cb52 100644 --- a/arch/mips/kernel/smtc-asm.S +++ b/arch/mips/kernel/smtc-asm.S @@ -121,10 +121,7 @@ LEAF(self_ipi) subu t1,sp,PT_SIZE sw ra,PT_EPC(t1) sw a0,PT_PADSLOT4(t1) - LONG_L s0, TI_REGS($28) - LONG_S sp, TI_REGS($28) la t2,ipi_decode - LONG_S s0, TI_REGS($28) sw t2,PT_PADSLOT5(t1) /* Save pre-disable value of TCStatus */ sw t0,PT_TCSTATUS(t1) diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index b361edb83dc..21eb5993a19 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -611,12 +611,12 @@ void smtc_cpus_done(void) int setup_irq_smtc(unsigned int irq, struct irqaction * new, unsigned long hwmask) { +#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG unsigned int vpe = current_cpu_data.vpe_id; - irq_hwmask[irq] = hwmask; -#ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG vpemask[vpe][irq - MIPSCPU_INT_BASE] = 1; #endif + irq_hwmask[irq] = hwmask; return setup_irq(irq, new); } diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 200de027f35..a7a17eb9bfc 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -11,6 +11,7 @@ * Copyright (C) 2000, 01 MIPS Technologies, Inc. * Copyright (C) 2002, 2003, 2004, 2005 Maciej W. Rozycki */ +#include <linux/bug.h> #include <linux/init.h> #include <linux/mm.h> #include <linux/module.h> @@ -927,12 +928,6 @@ asmlinkage void do_reserved(struct pt_regs *regs) (regs->cp0_cause & 0x7f) >> 2); } -static asmlinkage void do_default_vi(void) -{ - show_regs(get_irq_regs()); - panic("Caught unexpected vectored interrupt."); -} - /* * Some MIPS CPUs can enable/disable for cache parity detection, but do * it different ways. @@ -1128,6 +1123,12 @@ void mips_srs_free(int set) clear_bit(set, &sr->sr_allocated); } +static asmlinkage void do_default_vi(void) +{ + show_regs(get_irq_regs()); + panic("Caught unexpected vectored interrupt."); +} + static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) { unsigned long handler; @@ -1190,8 +1191,8 @@ static void *set_vi_srs_handler(int n, vi_handler_t addr, int srs) memcpy (b, &except_vec_vi, handler_len); #ifdef CONFIG_MIPS_MT_SMTC - if (n > 7) - printk("Vector index %d exceeds SMTC maximum\n", n); + BUG_ON(n > 7); /* Vector index %d exceeds SMTC maximum. */ + w = (u32 *)(b + mori_offset); *w = (*w & 0xffff0000) | (0x100 << n); #endif /* CONFIG_MIPS_MT_SMTC */ @@ -1383,6 +1384,13 @@ void __init per_cpu_trap_init(void) cpu_cache_init(); tlb_init(); #ifdef CONFIG_MIPS_MT_SMTC + } else if (!secondaryTC) { + /* + * First TC in non-boot VPE must do subset of tlb_init() + * for MMU countrol registers. + */ + write_c0_pagemask(PM_DEFAULT_MASK); + write_c0_wired(0); } #endif /* CONFIG_MIPS_MT_SMTC */ } @@ -1531,8 +1539,7 @@ void __init trap_init(void) if (cpu_has_mipsmt) set_except_vector(25, handle_mt); - if (cpu_has_dsp) - set_except_vector(26, handle_dsp); + set_except_vector(26, handle_dsp); if (cpu_has_vce) /* Special exception: R4[04]00 uses also the divec space. */ |