| Age | Commit message (Collapse) | Author |
|---|
|
In accordance with the newly formalized 32-bit boot protocol, set
%ebx == %ebp == %edi == 0 in order to support future extensions to the
protocol.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
The 386 and 486 needs a jump immediately after setting %cr0 in order
to serialize the pipeline.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
|
|
Follow the sh change.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-lockdep
* 'v2.6.24-rc1-lockdep' of git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-lockdep:
lockdep: fix a typo in the __lock_acquire comment
sched: fix unconditional irq lock
lockdep: fixup irq tracing
|
|
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh64-2.6:
sh64: Update defconfigs.
sh64: fix dma_cache_sync() compilation
sh64: Move DMA macros from pci.h to scatterlist.h.
|
|
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (24 commits)
sh: Update r7785rp defconfig.
sh: mach-type updates.
sh: Fix up r7780rp highlander CF access size.
sh: Terminate .eh_frame in VDSO with a 4-byte 0.
sh: Correct SUBARCH matching.
sh: Decouple 4k and soft/hardirq stacks.
sh: Fix optimized __copy_user() movca.l usage.
sh: Clean up SR.RB Kconfig mess.
sh: Kill off dead ipr_irq_demux().
sh: Make SH7750 oprofile compile again.
sh: Provide a __read_mostly section wrapper.
sh: linker script tidying.
sh: Move zero page param defs somewhere sensible.
sh: Use generic SMP_CACHE_BYTES/L1_CACHE_ALIGN.
sh: Kill off legacy embedded ramdisk section.
sh: Fix up early mem cmdline parsing.
sh: Enable USBF on MS7722SE.
sh: Add resource of USBF for SH7722.
maple: Fix maple bus compiler warning
sh: fix zImage build with >=binutils-2.18
...
|
|
The Jazz machines have to use the PIT timer for dyntick and highresolution
kernels. This may break because currently just like i386 used to do MIPS
uses two separate spinlocks in the actual PIT code and the PC speaker
code. So switch to do it the same that x86 currently does PIT locking.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
|
|
Fix ISA irq acknowledge.
Make r4030 clockevent code look like other mips clockevent code.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Register A20R clockevent.
Remove PIT timer setup because it doesn't work
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
arch/mips/au1000/pb1200/irqmap.c:101: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result
And while at it a few coding style cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
arch/mips/au1000/pb1200/board_setup.c:71: warning: unused variable 'pin_func'
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static. It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup. It is just a placeholder.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Found by Giuseppe Sacco <giuseppe@eppesuigoccas.homedns.org>.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
|
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds in the x3proto and magicpanelr2 mach types, plugs in
highlander and rts7751r2d groups, and also hooks up the r2d
subtypes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
R7780RP can't do byte-sized accesses to CF, so needs to do word
sized access with low-byte masking. This same problem exists
on older versions of the R2D, with the same workaround having
been implemented in 43f4b8c7578b928892b6f01d374346ae14e5eb70
there. Follow that change for the highlander boards.
This does not impact R7780MP or SH7785 based Highlander modules.
If you're unfortunate enough to be stuck with an R7780RP, this
patch is for you!
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
It's assumed that .eh_frame is terminated with 4-byte 0 in shared
libraries and executable. It seems to be the case for VDSOs too.
Without this terminator, I saw failures when unwinding from VDSO,
though I don't know how other architectures handle this issue.
For the normal libs, crtendS.o gives this terminator. We can use
such terminating objects. Or we can add a 4-byte 0 with modifying
the linker script like as the patch below.
Signed-off-by: Kaz Kojima <kkojima@rr.iij4u.or.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
While using separate IRQ stacks can cut down on stack consumption,
many users can also use 4k stacks directly without the additional
need of separate stacks for soft and hardirqs.
With this split, we support the same rationale for 4KSTACKS as
m68knommu, with the IRQSTACKS abstraction as per ppc64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
movca.l is restricted to SH-4 and up only, though compilers that
are unable to support ISA tuning (especially older versions of
binutils) will happily compile in the bogus opcode on older parts.
Conditionalize it to fix SH-3 regressions noted by Kristoffer.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
|
|
Re-order the EMAC interrupts in the walnut.dts file so that they are mapped
correctly.
Signed-off-by: Steve Falco <sfalco at harris.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
mmu_mapin_ram() loops over total_lowmem to setup page tables. However, if
total_lowmem is less that 16M, the subtraction rolls over and results in
a number just under 4G (because total_lowmem is an unsigned value).
This patch rejigs the loop from countup to countdown to eliminate the
bug.
Special thanks to Magnus Hjorth who wrote the original patch to fix this
bug. This patch improves on his by making the loop code simpler (which
also eliminates the possibility of another rollover at the high end)
and also applies the change to arch/powerpc.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
The 44x family has an interesting "feature" which is a virtually
tagged instruction cache (yuck !). So far, we haven't dealt with
it properly, which means we've been mostly lucky or people didn't
report the problems, unless people have been running custom patches
in their distro...
This is an attempt at fixing it properly. I chose to do it by
setting a global flag whenever we change a PTE that was previously
marked executable, and flush the entire instruction cache upon
return to user space when that happens.
This is a bit heavy handed, but it's hard to do more fine grained
flushes as the icbi instruction, on those processor, for some very
strange reasons (since the cache is virtually mapped) still requires
a valid TLB entry for reading in the target address space, which
isn't something I want to deal with.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
On 4xx CPUs, the current implementation of flush_tlb_page() uses
a low level _tlbie() assembly function that only works for the
current PID. Thus, invalidations caused by, for example, a COW
fault triggered by get_user_pages() from a different context will
not work properly, causing among other things, gdb breakpoints
to fail.
This patch adds a "pid" argument to _tlbie() on 4xx processors,
and uses it to flush entries in the right context. FSL BookE
also gets the argument but it seems they don't need it (their
tlbivax form ignores the PID when invalidating according to the
document I have).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Don't allocate hose2 when when hose1 can't be allocated and free hose1 when
hose2 can't be allocated.
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
PowerPC 440EP(x) 440GR(x) processors have the same PVR values, since
they have identical cores. However, FPU is not supported on GR(x) and
enabling APU instruction broadcast in the CCR0 register (to enable FPU)
may cause unpredictable results. There's no safe way to detect FPU
support at runtime. This patch provides a workarund for the issue.
We use a POWER6 "logical PVR approach". First, we identify all EP(x)
and GR(x) processors as GR(x) ones (which is safe). Then we check
the device tree cpu path. If we have a EP(x) processor entry,
we call identify_cpu again with PVR | 0x8. This bit is always 0
in the real PVR. This way we enable FPU only for 440EP(x).
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Add the 'set -e' command to the wrapper script so that if any command
fails then the script will automatically exit
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Allow wrapper script to print verbose progress when the V is set in the
environment.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
We can't export verify_compat_iovec when CONFIG_NET is
disabled, and consequently the Solaris compat module
should also depend upon CONFIG_NET.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
When CONFIG_BUG is turned off, the standard trick of:
switch (x) {
case X:
...
case Y:
...
default:
BUG();
};
to mark impossible cases does not work because BUG() evalutes
to nothing and thus GCC just sees a fallthrough code path.
Add an explicit KERN_ERR log message and a do_exit() to trap
this case.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
It is unused since we went to an I-cache flush that solely used
the 'flush' instruction, and it's presence breaks the build
when PAGE_SIZE is 512KB.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
We're using '&' instead of '&&'.
Noticed by Roel Kluin.
Signed-off-by: David S. Miller <davem@davemloft.net>
|
