From 58e6e78119da2bdade9f6f588155f0320072b76b Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Thu, 3 Jan 2008 07:33:31 -0500 Subject: hwmon: (w83627ehf) Be more careful when changing VID input level The VID input level change has been reported to cause trouble. Be more careful in this respect: * Only change the level on the W83627EHF/EHG. The W83627DHG is more complex in this respect. * Don't change the level if the VID pins are in output mode. * Only set the level to TTL if VRM 9.x is used. Signed-off-by: Jean Delvare Signed-off-by: Mark M. Hoffman --- drivers/hwmon/w83627ehf.c | 36 ++++++++++++++++++++++-------------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index b15c6a998b7..d5aa25ce5db 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c @@ -1276,23 +1276,31 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) data->vrm = vid_which_vrm(); superio_enter(sio_data->sioreg); - /* Set VID input sensibility if needed. In theory the BIOS should - have set it, but in practice it's not always the case. */ - en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10); - if ((en_vrm10 & 0x08) && data->vrm != 100) { - dev_warn(dev, "Setting VID input voltage to TTL\n"); - superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, - en_vrm10 & ~0x08); - } else if (!(en_vrm10 & 0x08) && data->vrm == 100) { - dev_warn(dev, "Setting VID input voltage to VRM10\n"); - superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, - en_vrm10 | 0x08); - } /* Read VID value */ superio_select(sio_data->sioreg, W83627EHF_LD_HWM); - if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) + if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) { + /* Set VID input sensibility if needed. In theory the BIOS + should have set it, but in practice it's not always the + case. We only do it for the W83627EHF/EHG because the + W83627DHG is more complex in this respect. */ + if (sio_data->kind == w83627ehf) { + en_vrm10 = superio_inb(sio_data->sioreg, + SIO_REG_EN_VRM10); + if ((en_vrm10 & 0x08) && data->vrm == 90) { + dev_warn(dev, "Setting VID input voltage to " + "TTL\n"); + superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, + en_vrm10 & ~0x08); + } else if (!(en_vrm10 & 0x08) && data->vrm == 100) { + dev_warn(dev, "Setting VID input voltage to " + "VRM10\n"); + superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10, + en_vrm10 | 0x08); + } + } + data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f; - else { + } else { dev_info(dev, "VID pins in output mode, CPU VID not " "available\n"); data->vid = 0x3f; -- cgit v1.2.3