From b33d51877726b066699b9ee40b5f512c77bdca38 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 15 Nov 2007 21:15:47 +0800 Subject: Blackfin arch: fix double fault definition for BF561 core A and core B VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf561/defBF561.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/asm-blackfin/mach-bf561/defBF561.h b/include/asm-blackfin/mach-bf561/defBF561.h index 66f19960844..c3c0eb13c81 100644 --- a/include/asm-blackfin/mach-bf561/defBF561.h +++ b/include/asm-blackfin/mach-bf561/defBF561.h @@ -881,8 +881,8 @@ #define SYSTEM_RESET 0x0007 /* Initiates a system software reset */ #define DOUBLE_FAULT_A 0x0008 /* Core A Double Fault Causes Reset */ #define DOUBLE_FAULT_B 0x0010 /* Core B Double Fault Causes Reset */ -#define SWRST_DBL_FAULT_B 0x0800 /* SWRST Core B Double Fault */ -#define SWRST_DBL_FAULT_A 0x1000 /* SWRST Core A Double Fault */ +#define SWRST_DBL_FAULT_A 0x0800 /* SWRST Core A Double Fault */ +#define SWRST_DBL_FAULT_B 0x1000 /* SWRST Core B Double Fault */ #define SWRST_WDT_B 0x2000 /* SWRST Watchdog B */ #define SWRST_WDT_A 0x4000 /* SWRST Watchdog A */ #define SWRST_OCCURRED 0x8000 /* SWRST Status */ -- cgit v1.2.3