From a2302b45d8ab41a55e84c39a6c6f813586ad8493 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 10 Mar 2010 19:10:28 +0100 Subject: ARM: 5985/2: ARM: Fix Samsung build after "ARM: Eliminate decompressor -Dstatic= PIC hack" Commit 5de813b6 (ARM: Eliminate decompressor -Dstatic= PIC hack) among other things changed the declared type of the error() function to an extern, conflicting with the forward declartion in the Samsung plat/uncompress.h which appears to have been relying on the static being defined away, causing build failures since error() ends up with a GOT relocation but the linker script discards all GOT relocated data and functions: arch/arm/boot/compressed/decompress.o: In function `gunzip': /home/broonie/git/linux-2.6/arch/arm/boot/compressed/../../../../lib/decompress_ +inflate.c:68: undefined reference to `error' and so on. Fix this by moving the declaration into uncompress/misc.c where it is shared with the rest of the code, correcting the definition as we go. Signed-off-by: Mark Brown Signed-off-by: Russell King --- arch/arm/boot/compressed/misc.c | 1 + arch/arm/plat-samsung/include/plat/uncompress.h | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c index d32bc71c1f7..d2b2ef41cd4 100644 --- a/arch/arm/boot/compressed/misc.c +++ b/arch/arm/boot/compressed/misc.c @@ -33,6 +33,7 @@ unsigned int __machine_arch_type; #else static void putstr(const char *ptr); +extern void error(char *x); #include diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h index e87ce8ffbbc..7d6ed7263d5 100644 --- a/arch/arm/plat-samsung/include/plat/uncompress.h +++ b/arch/arm/plat-samsung/include/plat/uncompress.h @@ -140,8 +140,6 @@ static void arch_decomp_error(const char *x) #define arch_error arch_decomp_error #endif -static void error(char *err); - #ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO static inline void arch_enable_uart_fifo(void) { -- cgit v1.2.3 From 438ff39d7813515d3aac20f53b5b95aaa58b38f9 Mon Sep 17 00:00:00 2001 From: Rob Alley Date: Thu, 11 Mar 2010 02:15:04 +0100 Subject: ARM: 5986/1: at91sam9g20-ek: Correct braces in I2C registration code The change introduced in patch 5596/1 used incorrect bracing which resulted in the AT24 EEPROM no longer being registered. This patch corrects the bracing and allows both the WM8731 audio device and AT24 EEPROM device to be registered. Signed-off-by: Rob Alley Signed-off-by: Russell King --- arch/arm/mach-at91/board-sam9g20ek.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-at91/board-sam9g20ek.c b/arch/arm/mach-at91/board-sam9g20ek.c index 29cf8317748..c11fd47aec5 100644 --- a/arch/arm/mach-at91/board-sam9g20ek.c +++ b/arch/arm/mach-at91/board-sam9g20ek.c @@ -271,10 +271,12 @@ static void __init ek_add_device_buttons(void) {} static struct i2c_board_info __initdata ek_i2c_devices[] = { - { - I2C_BOARD_INFO("24c512", 0x50), - I2C_BOARD_INFO("wm8731", 0x1b), - }, + { + I2C_BOARD_INFO("24c512", 0x50) + }, + { + I2C_BOARD_INFO("wm8731", 0x1b) + }, }; -- cgit v1.2.3 From bb35579b45bcb0b74167a2165d3ea973f640bf00 Mon Sep 17 00:00:00 2001 From: Mikael Pettersson Date: Thu, 11 Mar 2010 12:28:31 +0100 Subject: ARM: 5987/1: fix warning in kernel/elfcore.c from ARM's elf.h 2.6.34-rc1 added kernel/elfcore.c which includes . On ARM, this results in: In file included from include/linux/elf.h:7, from kernel/elfcore.c:1: /tmp/linux-2.6.34-rc1/arch/arm/include/asm/elf.h:101: warning: 'struct task_struct' declared inside parameter list /tmp/linux-2.6.34-rc1/arch/arm/include/asm/elf.h:101: warning: its scope is only this definition or declaration, which is probably not what you want Including seems a bit heavyweight, so this patch just adds a tentative declaration of struct task_struct in . Signed-off-by: Mikael Pettersson Signed-off-by: Russell King --- arch/arm/include/asm/elf.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h index a399bb5730f..bff056489cc 100644 --- a/arch/arm/include/asm/elf.h +++ b/arch/arm/include/asm/elf.h @@ -98,6 +98,7 @@ extern int elf_check_arch(const struct elf32_hdr *); extern int arm_elf_read_implies_exec(const struct elf32_hdr *, int); #define elf_read_implies_exec(ex,stk) arm_elf_read_implies_exec(&(ex), stk) +struct task_struct; int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs); #define ELF_CORE_COPY_TASK_REGS dump_task_regs -- cgit v1.2.3 From a91ed072d6135926c296a42b0b46de35e6347845 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 12 Mar 2010 06:19:25 +0100 Subject: ARM: 5988/1: pgprot_dmacoherent() for non-mmu builds Commit 26a26d329688ab018e068b412b03d43d7c299f0a ("dma-mapping: switch ARMv7 DMA mappings to retain 'memory' attribute") added a new macro, pgprot_dmacoherent(), to correctly map DMA memory. The non-mmu pgtable support code also needs to implement this macro, otherwise when compiling you get: CC arch/arm/mm/dma-mapping.o arch/arm/mm/dma-mapping.c: In function 'dma_alloc_coherent': arch/arm/mm/dma-mapping.c:320: error: implicit declaration of function 'pgprot_dmacoherent' arch/arm/mm/dma-mapping.c:320: error: 'pgprot_kernel' undeclared (first use in this function) arch/arm/mm/dma-mapping.c:320: error: (Each undeclared identifier is reported only once arch/arm/mm/dma-mapping.c:320: error: for each function it appears in.) Signed-off-by: Greg Ungerer Signed-off-by: Russell King --- arch/arm/include/asm/pgtable-nommu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/include/asm/pgtable-nommu.h b/arch/arm/include/asm/pgtable-nommu.h index 013cfcdc483..ffc0e85775b 100644 --- a/arch/arm/include/asm/pgtable-nommu.h +++ b/arch/arm/include/asm/pgtable-nommu.h @@ -67,6 +67,7 @@ static inline int pte_file(pte_t pte) { return 0; } */ #define pgprot_noncached(prot) __pgprot(0) #define pgprot_writecombine(prot) __pgprot(0) +#define pgprot_dmacoherent(prot) __pgprot(0) /* -- cgit v1.2.3 From ddee87f208b6229d2910dd5930c87089dc56c87e Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 25 Feb 2010 15:04:14 +0100 Subject: ARM: 5959/1: ARM: perf-events: request PMU interrupts with IRQF_NOBALANCING If IRQ balancing is used on a multicore ARM system, PMU interrupt lines may be relocated onto CPUs other than the one causing the counter overflow. This can result in misattribution of events to the wrong core and, in the case that the CPU handling the interrupt has not experience counter overflow, the interrupt can be disabled because the handler returns IRQ_NONE. This patch adds the IRQF_NOBALANCING flag to the request_irq call in perf_events.c. Acked-by: Jamie Iles Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/perf_event.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index c54ceb3d1f9..b44d15948b5 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -332,7 +332,8 @@ armpmu_reserve_hardware(void) for (i = 0; i < pmu_irqs->num_irqs; ++i) { err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, - IRQF_DISABLED, "armpmu", NULL); + IRQF_DISABLED | IRQF_NOBALANCING, + "armpmu", NULL); if (err) { pr_warning("unable to request IRQ%d for ARM " "perf counters\n", pmu_irqs->irqs[i]); -- cgit v1.2.3 From d10fca9f39238b07cc670b441d2b423de30359d2 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 26 Feb 2010 10:46:15 +0100 Subject: ARM: 5960/1: ARM: perf-events: fix v7 event selection mask The event selection mask for ARMv7 cores [ARMV7_EVTSEL_MASK] is incorrectly set to 0x7f. This means that the top bit of an event ID is ignored, so counting branch misses (id=0x10) and ISBs (id=0x90) give the same results. This patch sets the event selection mask to the correct value of 0xff. Signed-off-by: Jean Pihet Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/perf_event.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index b44d15948b5..c45a155a73d 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -1625,7 +1625,7 @@ enum armv7_counters { /* * EVTSEL: Event selection reg */ -#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */ +#define ARMV7_EVTSEL_MASK 0xff /* Mask for writable bits */ /* * SELECT: Counter selection reg -- cgit v1.2.3 From 1027247f6eb727db6c600b9eb02796f0766ae704 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 12 Feb 2010 14:36:24 +0000 Subject: ARM: Add L2 cache handling to smp boot support The page table and secondary data which we're asking the secondary CPU to make use of has to hit RAM to ensure that the secondary CPU can see it since it may not be taking part in coherency or cache searches at this point. Acked-by: Santosh Shilimkar Signed-off-by: Russell King --- arch/arm/kernel/smp.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 57162af53dc..577543f3857 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -99,6 +99,7 @@ int __cpuinit __cpu_up(unsigned int cpu) *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); flush_pmd_entry(pmd); + outer_clean_range(__pa(pmd), __pa(pmd + 1)); /* * We need to tell the secondary core where to find @@ -106,7 +107,8 @@ int __cpuinit __cpu_up(unsigned int cpu) */ secondary_data.stack = task_stack_page(idle) + THREAD_START_SP; secondary_data.pgdir = virt_to_phys(pgd); - wmb(); + __cpuc_flush_dcache_area(&secondary_data, sizeof(secondary_data)); + outer_clean_range(__pa(&secondary_data), __pa(&secondary_data + 1)); /* * Now bring the CPU into our world. -- cgit v1.2.3 From 3f17522ce461a31e7ced6311b28fcf5b8a763316 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 12 Feb 2010 14:32:01 +0000 Subject: Video: ARM CLCD: Better fix for swapped IENB and CNTL registers On PL111, as found on Realview and other platforms, these registers are always arranged as CNTL then IENB. On PL110, these registers are IENB then CNTL, except on Versatile platforms. Re-arrange the handling of these register swaps so that PL111 always gets it right without resorting to ifdefs, leaving the only case needing special handling being PL110 on Versatile. Fill out amba/clcd.h with the PL110/PL111 register definition differences in case someone tries to use the PL110 specific definitions on PL111. Signed-off-by: Russell King --- drivers/video/amba-clcd.c | 31 ++++++++++++++++++++++++------- include/linux/amba/clcd.h | 33 +++++++++++++++++---------------- 2 files changed, 41 insertions(+), 23 deletions(-) diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index a21efcd10b7..afe21e6eb54 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c @@ -65,16 +65,16 @@ static void clcdfb_disable(struct clcd_fb *fb) if (fb->board->disable) fb->board->disable(fb); - val = readl(fb->regs + CLCD_CNTL); + val = readl(fb->regs + fb->off_cntl); if (val & CNTL_LCDPWR) { val &= ~CNTL_LCDPWR; - writel(val, fb->regs + CLCD_CNTL); + writel(val, fb->regs + fb->off_cntl); clcdfb_sleep(20); } if (val & CNTL_LCDEN) { val &= ~CNTL_LCDEN; - writel(val, fb->regs + CLCD_CNTL); + writel(val, fb->regs + fb->off_cntl); } /* @@ -94,7 +94,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) * Bring up by first enabling.. */ cntl |= CNTL_LCDEN; - writel(cntl, fb->regs + CLCD_CNTL); + writel(cntl, fb->regs + fb->off_cntl); clcdfb_sleep(20); @@ -102,7 +102,7 @@ static void clcdfb_enable(struct clcd_fb *fb, u32 cntl) * and now apply power. */ cntl |= CNTL_LCDPWR; - writel(cntl, fb->regs + CLCD_CNTL); + writel(cntl, fb->regs + fb->off_cntl); /* * finally, enable the interface. @@ -233,7 +233,7 @@ static int clcdfb_set_par(struct fb_info *info) readl(fb->regs + CLCD_TIM0), readl(fb->regs + CLCD_TIM1), readl(fb->regs + CLCD_TIM2), readl(fb->regs + CLCD_TIM3), readl(fb->regs + CLCD_UBAS), readl(fb->regs + CLCD_LBAS), - readl(fb->regs + CLCD_IENB), readl(fb->regs + CLCD_CNTL)); + readl(fb->regs + fb->off_ienb), readl(fb->regs + fb->off_cntl)); #endif return 0; @@ -345,6 +345,23 @@ static int clcdfb_register(struct clcd_fb *fb) { int ret; + /* + * ARM PL111 always has IENB at 0x1c; it's only PL110 + * which is reversed on some platforms. + */ + if (amba_manf(fb->dev) == 0x41 && amba_part(fb->dev) == 0x111) { + fb->off_ienb = CLCD_PL111_IENB; + fb->off_cntl = CLCD_PL111_CNTL; + } else { +#ifdef CONFIG_ARCH_VERSATILE + fb->off_ienb = CLCD_PL111_IENB; + fb->off_cntl = CLCD_PL111_CNTL; +#else + fb->off_ienb = CLCD_PL110_IENB; + fb->off_cntl = CLCD_PL110_CNTL; +#endif + } + fb->clk = clk_get(&fb->dev->dev, NULL); if (IS_ERR(fb->clk)) { ret = PTR_ERR(fb->clk); @@ -416,7 +433,7 @@ static int clcdfb_register(struct clcd_fb *fb) /* * Ensure interrupts are disabled. */ - writel(0, fb->regs + CLCD_IENB); + writel(0, fb->regs + fb->off_ienb); fb_set_var(&fb->fb, &fb->fb.var); diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h index 29c0448265c..ca16c3801a1 100644 --- a/include/linux/amba/clcd.h +++ b/include/linux/amba/clcd.h @@ -21,22 +21,21 @@ #define CLCD_UBAS 0x00000010 #define CLCD_LBAS 0x00000014 -#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) -#define CLCD_IENB 0x00000018 -#define CLCD_CNTL 0x0000001c -#else -/* - * Someone rearranged these two registers on the Versatile - * platform... - */ -#define CLCD_IENB 0x0000001c -#define CLCD_CNTL 0x00000018 -#endif - -#define CLCD_STAT 0x00000020 -#define CLCD_INTR 0x00000024 -#define CLCD_UCUR 0x00000028 -#define CLCD_LCUR 0x0000002C +#define CLCD_PL110_IENB 0x00000018 +#define CLCD_PL110_CNTL 0x0000001c +#define CLCD_PL110_STAT 0x00000020 +#define CLCD_PL110_INTR 0x00000024 +#define CLCD_PL110_UCUR 0x00000028 +#define CLCD_PL110_LCUR 0x0000002C + +#define CLCD_PL111_CNTL 0x00000018 +#define CLCD_PL111_IENB 0x0000001c +#define CLCD_PL111_RIS 0x00000020 +#define CLCD_PL111_MIS 0x00000024 +#define CLCD_PL111_ICR 0x00000028 +#define CLCD_PL111_UCUR 0x0000002c +#define CLCD_PL111_LCUR 0x00000030 + #define CLCD_PALL 0x00000200 #define CLCD_PALETTE 0x00000200 @@ -147,6 +146,8 @@ struct clcd_fb { struct clcd_board *board; void *board_data; void __iomem *regs; + u16 off_ienb; + u16 off_cntl; u32 clcd_cntl; u32 cmap[16]; }; -- cgit v1.2.3 From 03fb256df9c960b10c0e01b7e92d2f31433675fe Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Tue, 16 Feb 2010 10:48:15 +0000 Subject: ARM: mach-shmobile: G3EVM KEYSC platform data This patch adds KEYSC platform data for the G3EVM board. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/board-g3evm.c | 55 +++++++++++++++++++++++++++++++++++ arch/arm/mach-shmobile/clock-sh7367.c | 7 +++++ 2 files changed, 62 insertions(+) diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index f36c9a94d32..9d326893a21 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c @@ -29,6 +29,8 @@ #include #include #include +#include +#include #include #include #include @@ -127,9 +129,47 @@ static struct platform_device usb_host_device = { .resource = usb_host_resources, }; +/* KEYSC */ +static struct sh_keysc_info keysc_info = { + .mode = SH_KEYSC_MODE_5, + .scan_timing = 3, + .delay = 100, + .keycodes = { + KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, KEY_G, + KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, KEY_M, KEY_N, + KEY_O, KEY_P, KEY_Q, KEY_R, KEY_S, KEY_T, KEY_U, + KEY_V, KEY_W, KEY_X, KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, + KEY_WAKEUP, KEY_COFFEE, KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, + KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, + }, +}; + +static struct resource keysc_resources[] = { + [0] = { + .name = "KEYSC", + .start = 0xe61b0000, + .end = 0xe61b000f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 79, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device keysc_device = { + .name = "sh_keysc", + .num_resources = ARRAY_SIZE(keysc_resources), + .resource = keysc_resources, + .dev = { + .platform_data = &keysc_info, + }, +}; + static struct platform_device *g3evm_devices[] __initdata = { &nor_flash_device, &usb_host_device, + &keysc_device, }; static struct map_desc g3evm_io_desc[] __initdata = { @@ -196,6 +236,21 @@ static void __init g3evm_init(void) __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ + /* KEYSC @ CN7 */ + gpio_request(GPIO_FN_PORT42_KEYOUT0, NULL); + gpio_request(GPIO_FN_PORT43_KEYOUT1, NULL); + gpio_request(GPIO_FN_PORT44_KEYOUT2, NULL); + gpio_request(GPIO_FN_PORT45_KEYOUT3, NULL); + gpio_request(GPIO_FN_PORT46_KEYOUT4, NULL); + gpio_request(GPIO_FN_PORT47_KEYOUT5, NULL); + gpio_request(GPIO_FN_PORT48_KEYIN0_PU, NULL); + gpio_request(GPIO_FN_PORT49_KEYIN1_PU, NULL); + gpio_request(GPIO_FN_PORT50_KEYIN2_PU, NULL); + gpio_request(GPIO_FN_PORT55_KEYIN3_PU, NULL); + gpio_request(GPIO_FN_PORT56_KEYIN4_PU, NULL); + gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL); + gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL); + sh7367_add_standard_devices(); platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c index 58bd54e1113..bb940c6e4e6 100644 --- a/arch/arm/mach-shmobile/clock-sh7367.c +++ b/arch/arm/mach-shmobile/clock-sh7367.c @@ -75,6 +75,11 @@ static struct clk usb0_clk = { .name = "usb0", }; +/* a static keysc0 clk for now - enough to get sh_keysc working */ +static struct clk keysc0_clk = { + .name = "keysc0", +}; + static struct clk_lookup lookups[] = { { .clk = &peripheral_clk, @@ -82,6 +87,8 @@ static struct clk_lookup lookups[] = { .clk = &r_clk, }, { .clk = &usb0_clk, + }, { + .clk = &keysc0_clk, } }; -- cgit v1.2.3 From 143f3b833f98271341379d813cb72deb1657a380 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 19 Feb 2010 09:54:06 +0000 Subject: ARM: mach-shmobile: G3EVM FLCTL platform data This patch adds FLCTL platform data for the G3EVM board. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/board-g3evm.c | 67 ++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/arch/arm/mach-shmobile/board-g3evm.c b/arch/arm/mach-shmobile/board-g3evm.c index 9d326893a21..9247503296c 100644 --- a/arch/arm/mach-shmobile/board-g3evm.c +++ b/arch/arm/mach-shmobile/board-g3evm.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -166,10 +167,53 @@ static struct platform_device keysc_device = { }, }; +static struct mtd_partition nand_partition_info[] = { + { + .name = "system", + .offset = 0, + .size = 64 * 1024 * 1024, + }, + { + .name = "userdata", + .offset = MTDPART_OFS_APPEND, + .size = 128 * 1024 * 1024, + }, + { + .name = "cache", + .offset = MTDPART_OFS_APPEND, + .size = 64 * 1024 * 1024, + }, +}; + +static struct resource nand_flash_resources[] = { + [0] = { + .start = 0xe6a30000, + .end = 0xe6a3009b, + .flags = IORESOURCE_MEM, + } +}; + +static struct sh_flctl_platform_data nand_flash_data = { + .parts = nand_partition_info, + .nr_parts = ARRAY_SIZE(nand_partition_info), + .flcmncr_val = QTSEL_E | FCKSEL_E | TYPESEL_SET | NANWF_E + | SHBUSSEL | SEL_16BIT, +}; + +static struct platform_device nand_flash_device = { + .name = "sh_flctl", + .resource = nand_flash_resources, + .num_resources = ARRAY_SIZE(nand_flash_resources), + .dev = { + .platform_data = &nand_flash_data, + }, +}; + static struct platform_device *g3evm_devices[] __initdata = { &nor_flash_device, &usb_host_device, &keysc_device, + &nand_flash_device, }; static struct map_desc g3evm_io_desc[] __initdata = { @@ -251,6 +295,29 @@ static void __init g3evm_init(void) gpio_request(GPIO_FN_PORT57_KEYIN5_PU, NULL); gpio_request(GPIO_FN_PORT58_KEYIN6_PU, NULL); + /* FLCTL */ + gpio_request(GPIO_FN_FCE0, NULL); + gpio_request(GPIO_FN_D0_ED0_NAF0, NULL); + gpio_request(GPIO_FN_D1_ED1_NAF1, NULL); + gpio_request(GPIO_FN_D2_ED2_NAF2, NULL); + gpio_request(GPIO_FN_D3_ED3_NAF3, NULL); + gpio_request(GPIO_FN_D4_ED4_NAF4, NULL); + gpio_request(GPIO_FN_D5_ED5_NAF5, NULL); + gpio_request(GPIO_FN_D6_ED6_NAF6, NULL); + gpio_request(GPIO_FN_D7_ED7_NAF7, NULL); + gpio_request(GPIO_FN_D8_ED8_NAF8, NULL); + gpio_request(GPIO_FN_D9_ED9_NAF9, NULL); + gpio_request(GPIO_FN_D10_ED10_NAF10, NULL); + gpio_request(GPIO_FN_D11_ED11_NAF11, NULL); + gpio_request(GPIO_FN_D12_ED12_NAF12, NULL); + gpio_request(GPIO_FN_D13_ED13_NAF13, NULL); + gpio_request(GPIO_FN_D14_ED14_NAF14, NULL); + gpio_request(GPIO_FN_D15_ED15_NAF15, NULL); + gpio_request(GPIO_FN_WE0_XWR0_FWE, NULL); + gpio_request(GPIO_FN_FRB, NULL); + /* FOE, FCDE, FSC on dedicated pins */ + __raw_writel(__raw_readl(0xe6158048) & ~(1 << 15), 0xe6158048); + sh7367_add_standard_devices(); platform_add_devices(g3evm_devices, ARRAY_SIZE(g3evm_devices)); -- cgit v1.2.3 From 3e862c05ca1bf5bd4cb703bc257d180a4583bc41 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 19 Feb 2010 10:01:22 +0000 Subject: mtd: enable sh_flctl on SH-Mobile ARM Update the Kconfig entry for the sh_flctl driver to enable build on SH-Mobile ARM platforms. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- drivers/mtd/nand/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 1157d5679e6..42e5ea49e97 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -457,7 +457,7 @@ config MTD_NAND_NOMADIK config MTD_NAND_SH_FLCTL tristate "Support for NAND on Renesas SuperH FLCTL" - depends on MTD_NAND && SUPERH + depends on MTD_NAND && (SUPERH || ARCH_SHMOBILE) help Several Renesas SuperH CPU has FLCTL. This option enables support for NAND Flash using FLCTL. -- cgit v1.2.3 From 6676a1701b0b135dacbb7cfeef48004315300df0 Mon Sep 17 00:00:00 2001 From: NISHIMOTO Hiroki Date: Tue, 23 Feb 2010 10:55:10 +0000 Subject: ARM: mach-shmobile: G4EVM KEYSC platform data This patch adds KEYSC platform data for the G4EVM board. Signed-off-by: NISHIMOTO Hiroki Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/board-g4evm.c | 57 ++++++++++++++++++++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm/mach-shmobile/board-g4evm.c b/arch/arm/mach-shmobile/board-g4evm.c index 5acd623f93e..10673a90be5 100644 --- a/arch/arm/mach-shmobile/board-g4evm.c +++ b/arch/arm/mach-shmobile/board-g4evm.c @@ -28,6 +28,8 @@ #include #include #include +#include +#include #include #include #include @@ -128,9 +130,49 @@ static struct platform_device usb_host_device = { .resource = usb_host_resources, }; +/* KEYSC */ +static struct sh_keysc_info keysc_info = { + .mode = SH_KEYSC_MODE_5, + .scan_timing = 3, + .delay = 100, + .keycodes = { + KEY_A, KEY_B, KEY_C, KEY_D, KEY_E, KEY_F, + KEY_G, KEY_H, KEY_I, KEY_J, KEY_K, KEY_L, + KEY_M, KEY_N, KEY_U, KEY_P, KEY_Q, KEY_R, + KEY_S, KEY_T, KEY_U, KEY_V, KEY_W, KEY_X, + KEY_Y, KEY_Z, KEY_HOME, KEY_SLEEP, KEY_WAKEUP, KEY_COFFEE, + KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, + KEY_6, KEY_7, KEY_8, KEY_9, KEY_STOP, KEY_COMPUTER, + }, +}; + +static struct resource keysc_resources[] = { + [0] = { + .name = "KEYSC", + .start = 0xe61b0000, + .end = 0xe61b000f, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 79, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device keysc_device = { + .name = "sh_keysc", + .id = 0, /* keysc0 clock */ + .num_resources = ARRAY_SIZE(keysc_resources), + .resource = keysc_resources, + .dev = { + .platform_data = &keysc_info, + }, +}; + static struct platform_device *g4evm_devices[] __initdata = { &nor_flash_device, &usb_host_device, + &keysc_device, }; static struct map_desc g4evm_io_desc[] __initdata = { @@ -196,6 +238,21 @@ static void __init g4evm_init(void) __raw_writew(0x6010, 0xe60581c6); /* CGPOSR */ __raw_writew(0x8a0a, 0xe605810c); /* USBCR2 */ + /* KEYSC @ CN31 */ + gpio_request(GPIO_FN_PORT60_KEYOUT5, NULL); + gpio_request(GPIO_FN_PORT61_KEYOUT4, NULL); + gpio_request(GPIO_FN_PORT62_KEYOUT3, NULL); + gpio_request(GPIO_FN_PORT63_KEYOUT2, NULL); + gpio_request(GPIO_FN_PORT64_KEYOUT1, NULL); + gpio_request(GPIO_FN_PORT65_KEYOUT0, NULL); + gpio_request(GPIO_FN_PORT66_KEYIN0_PU, NULL); + gpio_request(GPIO_FN_PORT67_KEYIN1_PU, NULL); + gpio_request(GPIO_FN_PORT68_KEYIN2_PU, NULL); + gpio_request(GPIO_FN_PORT69_KEYIN3_PU, NULL); + gpio_request(GPIO_FN_PORT70_KEYIN4_PU, NULL); + gpio_request(GPIO_FN_PORT71_KEYIN5_PU, NULL); + gpio_request(GPIO_FN_PORT72_KEYIN6_PU, NULL); + sh7377_add_standard_devices(); platform_add_devices(g4evm_devices, ARRAY_SIZE(g4evm_devices)); -- cgit v1.2.3 From 9615b37c5c8fed963811c100053d495c412880fb Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 10 Mar 2010 05:13:12 +0000 Subject: ARM: mach-shmobile: sh7367 SDHI vector merge Merge the SDHI vectors for sh7367 using the recently merged INTC force_enable/disable feature. With this in place SDHI hotplug is supported using the drivers sh_mobile_sdhi and tmio_mmc. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/intc-sh7367.c | 46 ++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-shmobile/intc-sh7367.c b/arch/arm/mach-shmobile/intc-sh7367.c index 6a547b47aab..5ff70cadfc3 100644 --- a/arch/arm/mach-shmobile/intc-sh7367.c +++ b/arch/arm/mach-shmobile/intc-sh7367.c @@ -27,6 +27,8 @@ enum { UNUSED_INTCA = 0, + ENABLED, + DISABLED, /* interrupt sources INTCA */ IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, @@ -46,8 +48,8 @@ enum { MSIOF2, MSIOF1, SCIFA4, SCIFA5, SCIFB, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, - SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, - SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3, + SDHI0, + SDHI1, MSU_MSU, MSU_MSU2, IREM, SIU, @@ -59,7 +61,7 @@ enum { TTI20, MISTY, DDM, - SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3, + SDHI2, RWDT0, RWDT1, DMAC_1_DEI0, DMAC_1_DEI1, DMAC_1_DEI2, DMAC_1_DEI3, DMAC_2_DEI4, DMAC_2_DEI5, DMAC_2_DADERR, @@ -70,7 +72,7 @@ enum { /* interrupt groups INTCA */ DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, - ETM11, ARM11, USBHS, FLCTL, IIC1, SDHI0, SDHI1, SDHI2, + ETM11, ARM11, USBHS, FLCTL, IIC1 }; static struct intc_vect intca_vectors[] = { @@ -105,10 +107,10 @@ static struct intc_vect intca_vectors[] = { INTC_VECT(SCIFB, 0x0d60), INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), - INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), - INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), - INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), - INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0), + INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), + INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), + INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), + INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), INTC_VECT(IREM, 0x0f60), INTC_VECT(SIU, 0x0fa0), @@ -122,8 +124,8 @@ static struct intc_vect intca_vectors[] = { INTC_VECT(TTI20, 0x1100), INTC_VECT(MISTY, 0x1120), INTC_VECT(DDM, 0x1140), - INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220), - INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260), + INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220), + INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260), INTC_VECT(RWDT0, 0x1280), INTC_VECT(RWDT1, 0x12a0), INTC_VECT(DMAC_1_DEI0, 0x2000), INTC_VECT(DMAC_1_DEI1, 0x2020), INTC_VECT(DMAC_1_DEI2, 0x2040), INTC_VECT(DMAC_1_DEI3, 0x2060), @@ -158,12 +160,6 @@ static struct intc_group intca_groups[] __initdata = { INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), - INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1, - SDHI0_SDHI0I2, SDHI0_SDHI0I3), - INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1, - SDHI1_SDHI1I2, SDHI1_SDHI1I3), - INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1, - SDHI2_SDHI2I2, SDHI2_SDHI2I3), }; static struct intc_mask_reg intca_mask_registers[] = { @@ -193,10 +189,10 @@ static struct intc_mask_reg intca_mask_registers[] = { { SCIFB, SCIFA5, SCIFA4, MSIOF1, 0, 0, MSIOF2, 0 } }, { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, + { DISABLED, DISABLED, ENABLED, ENABLED, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, + { DISABLED, DISABLED, ENABLED, ENABLED, TTI20, USBDMAC_USHDMI, SPU, SIU } }, { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, @@ -211,7 +207,7 @@ static struct intc_mask_reg intca_mask_registers[] = { { 0, 0, TPU0, TPU1, TPU2, TPU3, TPU4, 0 } }, { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ - { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0, + { DISABLED, DISABLED, ENABLED, ENABLED, MISTY, CMT3, RWDT1, RWDT0 } }, }; @@ -258,10 +254,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = { { IRQ8A, IRQ9A, IRQ10A, IRQ11A, IRQ12A, IRQ13A, IRQ14A, IRQ15A } }, }; -static DECLARE_INTC_DESC_ACK(intca_desc, "sh7367-intca", - intca_vectors, intca_groups, - intca_mask_registers, intca_prio_registers, - intca_sense_registers, intca_ack_registers); +static struct intc_desc intca_desc __initdata = { + .name = "sh7367-intca", + .force_enable = ENABLED, + .force_disable = DISABLED, + .hw = INTC_HW_DESC(intca_vectors, intca_groups, + intca_mask_registers, intca_prio_registers, + intca_sense_registers, intca_ack_registers), +}; void __init sh7367_init_irq(void) { -- cgit v1.2.3 From c148abfc2d807b2734e7ecd0e00c71ef7d4b7f42 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 10 Mar 2010 05:15:16 +0000 Subject: ARM: mach-shmobile: sh7377 SDHI vector merge Merge the SDHI vectors for sh7377 using the recently merged INTC force_enable/disable feature. With this in place SDHI hotplug is supported using the drivers sh_mobile_sdhi and tmio_mmc. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/intc-sh7377.c | 36 +++++++++++++++++++----------------- 1 file changed, 19 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-shmobile/intc-sh7377.c b/arch/arm/mach-shmobile/intc-sh7377.c index 125021cfba5..5c781e2d189 100644 --- a/arch/arm/mach-shmobile/intc-sh7377.c +++ b/arch/arm/mach-shmobile/intc-sh7377.c @@ -27,6 +27,8 @@ enum { UNUSED_INTCA = 0, + ENABLED, + DISABLED, /* interrupt sources INTCA */ IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, @@ -49,8 +51,8 @@ enum { MSIOF2, MSIOF1, SCIFA4, SCIFA5, SCIFB, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, - SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, - SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, SDHI1_SDHI1I3, + SDHI0, + SDHI1, MSU_MSU, MSU_MSU2, IRREM, MSUG, @@ -84,7 +86,7 @@ enum { /* interrupt groups INTCA */ DMAC_1, DMAC_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, - AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, SDHI0, SDHI1, + AP_ARM1, AP_ARM2, USBHS, SPU2, FLCTL, IIC1, ICUSB, ICUDMC }; @@ -128,10 +130,10 @@ static struct intc_vect intca_vectors[] = { INTC_VECT(SCIFB, 0x0d60), INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), - INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), - INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), - INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), - INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), INTC_VECT(SDHI1_SDHI1I3, 0x0ee0), + INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), + INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), + INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), + INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(SDHI1, 0x0ee0), INTC_VECT(MSU_MSU, 0x0f20), INTC_VECT(MSU_MSU2, 0x0f40), INTC_VECT(IRREM, 0x0f60), INTC_VECT(MSUG, 0x0fa0), @@ -195,10 +197,6 @@ static struct intc_group intca_groups[] __initdata = { INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), - INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1, - SDHI0_SDHI0I2, SDHI0_SDHI0I3), - INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1, - SDHI1_SDHI1I2, SDHI1_SDHI1I3), INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), INTC_GROUP(ICUSB, ICUSB_ICUSB0, ICUSB_ICUSB1), INTC_GROUP(ICUDMC, ICUDMC_ICUDMC1, ICUDMC_ICUDMC2), @@ -236,10 +234,10 @@ static struct intc_mask_reg intca_mask_registers[] = { { SCIFB, SCIFA5, SCIFA4, MSIOF1, 0, 0, MSIOF2, 0 } }, { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, + { DISABLED, DISABLED, ENABLED, ENABLED, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { SDHI1_SDHI1I3, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, + { DISABLED, DISABLED, ENABLED, ENABLED, TTI20, USBDMAC_USHDMI, 0, MSUG } }, { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, @@ -339,10 +337,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = { { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, }; -static DECLARE_INTC_DESC_ACK(intca_desc, "sh7377-intca", - intca_vectors, intca_groups, - intca_mask_registers, intca_prio_registers, - intca_sense_registers, intca_ack_registers); +static struct intc_desc intca_desc __initdata = { + .name = "sh7377-intca", + .force_enable = ENABLED, + .force_disable = DISABLED, + .hw = INTC_HW_DESC(intca_vectors, intca_groups, + intca_mask_registers, intca_prio_registers, + intca_sense_registers, intca_ack_registers), +}; void __init sh7377_init_irq(void) { -- cgit v1.2.3 From c57a31abf0b469b9cab6810f4e1895bb7ef1c482 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 10 Mar 2010 05:17:24 +0000 Subject: ARM: mach-shmobile: sh7372 SDHI vector merge Merge the SDHI vectors for sh7372 using the recently merged INTC force_enable/disable feature. With this in place SDHI hotplug is supported using the drivers sh_mobile_sdhi and tmio_mmc. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/intc-sh7372.c | 46 ++++++++++++++++++------------------ 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c index c57a923f97a..3ce9d9bd589 100644 --- a/arch/arm/mach-shmobile/intc-sh7372.c +++ b/arch/arm/mach-shmobile/intc-sh7372.c @@ -27,6 +27,8 @@ enum { UNUSED_INTCA = 0, + ENABLED, + DISABLED, /* interrupt sources INTCA */ IRQ0A, IRQ1A, IRQ2A, IRQ3A, IRQ4A, IRQ5A, IRQ6A, IRQ7A, @@ -47,14 +49,14 @@ enum { MSIOF2, MSIOF1, SCIFA4, SCIFA5, SCIFB, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, - SDHI0_SDHI0I0, SDHI0_SDHI0I1, SDHI0_SDHI0I2, SDHI0_SDHI0I3, - SDHI1_SDHI1I0, SDHI1_SDHI1I1, SDHI1_SDHI1I2, + SDHI0, + SDHI1, IRREM, IRDA, TPU0, TTI20, DDM, - SDHI2_SDHI2I0, SDHI2_SDHI2I1, SDHI2_SDHI2I2, SDHI2_SDHI2I3, + SDHI2, RWDT0, DMAC1_1_DEI0, DMAC1_1_DEI1, DMAC1_1_DEI2, DMAC1_1_DEI3, DMAC1_2_DEI4, DMAC1_2_DEI5, DMAC1_2_DADERR, @@ -82,7 +84,7 @@ enum { /* interrupt groups INTCA */ DMAC1_1, DMAC1_2, DMAC2_1, DMAC2_2, DMAC3_1, DMAC3_2, SHWYSTAT, - AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1, SDHI0, SDHI1, SDHI2 + AP_ARM1, AP_ARM2, SPU2, FLCTL, IIC1 }; static struct intc_vect intca_vectors[] __initdata = { @@ -123,17 +125,17 @@ static struct intc_vect intca_vectors[] __initdata = { INTC_VECT(SCIFB, 0x0d60), INTC_VECT(FLCTL_FLSTEI, 0x0d80), INTC_VECT(FLCTL_FLTENDI, 0x0da0), INTC_VECT(FLCTL_FLTREQ0I, 0x0dc0), INTC_VECT(FLCTL_FLTREQ1I, 0x0de0), - INTC_VECT(SDHI0_SDHI0I0, 0x0e00), INTC_VECT(SDHI0_SDHI0I1, 0x0e20), - INTC_VECT(SDHI0_SDHI0I2, 0x0e40), INTC_VECT(SDHI0_SDHI0I3, 0x0e60), - INTC_VECT(SDHI1_SDHI1I0, 0x0e80), INTC_VECT(SDHI1_SDHI1I1, 0x0ea0), - INTC_VECT(SDHI1_SDHI1I2, 0x0ec0), + INTC_VECT(SDHI0, 0x0e00), INTC_VECT(SDHI0, 0x0e20), + INTC_VECT(SDHI0, 0x0e40), INTC_VECT(SDHI0, 0x0e60), + INTC_VECT(SDHI1, 0x0e80), INTC_VECT(SDHI1, 0x0ea0), + INTC_VECT(SDHI1, 0x0ec0), INTC_VECT(IRREM, 0x0f60), INTC_VECT(IRDA, 0x0480), INTC_VECT(TPU0, 0x04a0), INTC_VECT(TTI20, 0x1100), INTC_VECT(DDM, 0x1140), - INTC_VECT(SDHI2_SDHI2I0, 0x1200), INTC_VECT(SDHI2_SDHI2I1, 0x1220), - INTC_VECT(SDHI2_SDHI2I2, 0x1240), INTC_VECT(SDHI2_SDHI2I3, 0x1260), + INTC_VECT(SDHI2, 0x1200), INTC_VECT(SDHI2, 0x1220), + INTC_VECT(SDHI2, 0x1240), INTC_VECT(SDHI2, 0x1260), INTC_VECT(RWDT0, 0x1280), INTC_VECT(DMAC1_1_DEI0, 0x2000), INTC_VECT(DMAC1_1_DEI1, 0x2020), INTC_VECT(DMAC1_1_DEI2, 0x2040), INTC_VECT(DMAC1_1_DEI3, 0x2060), @@ -193,12 +195,6 @@ static struct intc_group intca_groups[] __initdata = { INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), INTC_GROUP(IIC1, IIC1_ALI1, IIC1_TACKI1, IIC1_WAITI1, IIC1_DTEI1), - INTC_GROUP(SDHI0, SDHI0_SDHI0I0, SDHI0_SDHI0I1, - SDHI0_SDHI0I2, SDHI0_SDHI0I3), - INTC_GROUP(SDHI1, SDHI1_SDHI1I0, SDHI1_SDHI1I1, - SDHI1_SDHI1I2), - INTC_GROUP(SDHI2, SDHI2_SDHI2I0, SDHI2_SDHI2I1, - SDHI2_SDHI2I2, SDHI2_SDHI2I3), INTC_GROUP(SHWYSTAT, SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM), }; @@ -234,10 +230,10 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { { SCIFB, SCIFA5, SCIFA4, MSIOF1, 0, 0, MSIOF2, 0 } }, { 0xe694009c, 0xe69400dc, 8, /* IMR7A / IMCR7A */ - { SDHI0_SDHI0I3, SDHI0_SDHI0I2, SDHI0_SDHI0I1, SDHI0_SDHI0I0, + { DISABLED, DISABLED, ENABLED, ENABLED, FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLTENDI, FLCTL_FLSTEI } }, { 0xe69400a0, 0xe69400e0, 8, /* IMR8A / IMCR8A */ - { 0, SDHI1_SDHI1I2, SDHI1_SDHI1I1, SDHI1_SDHI1I0, + { 0, DISABLED, ENABLED, ENABLED, TTI20, USBHSDMAC0_USHDMI, 0, 0 } }, { 0xe69400a4, 0xe69400e4, 8, /* IMR9A / IMCR9A */ { CMT1_CMT13, CMT1_CMT12, CMT1_CMT11, CMT1_CMT10, @@ -252,7 +248,7 @@ static struct intc_mask_reg intca_mask_registers[] __initdata = { { 0, 0, TPU0, 0, 0, 0, 0, 0 } }, { 0xe69400b4, 0xe69400f4, 8, /* IMR13A / IMCR13A */ - { SDHI2_SDHI2I3, SDHI2_SDHI2I2, SDHI2_SDHI2I1, SDHI2_SDHI2I0, + { DISABLED, DISABLED, ENABLED, ENABLED, 0, CMT3, 0, RWDT0 } }, { 0xe6950080, 0xe69500c0, 8, /* IMR0A3 / IMCR0A3 */ { SHWYSTAT_RT, SHWYSTAT_HS, SHWYSTAT_COM, 0, @@ -358,10 +354,14 @@ static struct intc_mask_reg intca_ack_registers[] __initdata = { { IRQ24A, IRQ25A, IRQ26A, IRQ27A, IRQ28A, IRQ29A, IRQ30A, IRQ31A } }, }; -static DECLARE_INTC_DESC_ACK(intca_desc, "sh7372-intca", - intca_vectors, intca_groups, - intca_mask_registers, intca_prio_registers, - intca_sense_registers, intca_ack_registers); +static struct intc_desc intca_desc __initdata = { + .name = "sh7372-intca", + .force_enable = ENABLED, + .force_disable = DISABLED, + .hw = INTC_HW_DESC(intca_vectors, intca_groups, + intca_mask_registers, intca_prio_registers, + intca_sense_registers, intca_ack_registers), +}; void __init sh7372_init_irq(void) { -- cgit v1.2.3 From 3a14d0397732b6aaa541348b5a8e8f639ecd02b7 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 10 Mar 2010 09:26:44 +0000 Subject: ARM: mach-shmobile: ap4evb SDHI0 platform data V2 Add SDHI0 platform data for the AP4EVB board V2. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- arch/arm/mach-shmobile/board-ap4evb.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index a0463d92644..1c2ec96ce26 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -206,10 +206,32 @@ static struct platform_device keysc_device = { }, }; +/* SDHI0 */ +static struct resource sdhi0_resources[] = { + [0] = { + .name = "SDHI0", + .start = 0xe6850000, + .end = 0xe68501ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 96, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sdhi0_device = { + .name = "sh_mobile_sdhi", + .num_resources = ARRAY_SIZE(sdhi0_resources), + .resource = sdhi0_resources, + .id = 0, +}; + static struct platform_device *ap4evb_devices[] __initdata = { &nor_flash_device, &smc911x_device, &keysc_device, + &sdhi0_device, }; static struct map_desc ap4evb_io_desc[] __initdata = { @@ -286,6 +308,16 @@ static void __init ap4evb_init(void) gpio_request(GPIO_FN_KEYIN3_133, NULL); gpio_request(GPIO_FN_KEYIN4, NULL); + /* SDHI0 */ + gpio_request(GPIO_FN_SDHICD0, NULL); + gpio_request(GPIO_FN_SDHIWP0, NULL); + gpio_request(GPIO_FN_SDHICMD0, NULL); + gpio_request(GPIO_FN_SDHICLK0, NULL); + gpio_request(GPIO_FN_SDHID0_3, NULL); + gpio_request(GPIO_FN_SDHID0_2, NULL); + gpio_request(GPIO_FN_SDHID0_1, NULL); + gpio_request(GPIO_FN_SDHID0_0, NULL); + sh7372_add_standard_devices(); platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices)); -- cgit v1.2.3 From 7278a22143b003e9af7b9ca1b5f1c40ae4b55d98 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Wed, 10 Mar 2010 11:33:10 +0000 Subject: video: enable sh_mobile_lcdc on SH-Mobile ARM This patch enables the sh_mobile_lcdc driver on SH-Mobile ARM. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- drivers/video/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index dabe804ba57..4be9b4832c5 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1881,7 +1881,7 @@ config FB_W100 config FB_SH_MOBILE_LCDC tristate "SuperH Mobile LCDC framebuffer support" - depends on FB && SUPERH && HAVE_CLK + depends on FB && (SUPERH || ARCH_SHMOBILE) && HAVE_CLK select FB_SYS_FILLRECT select FB_SYS_COPYAREA select FB_SYS_IMAGEBLIT -- cgit v1.2.3 From b89ebadc3421f8ff85030768ec14144794984877 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 15 Mar 2010 14:29:22 +0000 Subject: ARM: Add final piece to fix XIP decompressor in read-only memory This defines STATIC_RW_DATA, which prevents the read/write malloc management data being declared with a static attribute. Signed-off-by: Russell King --- arch/arm/boot/compressed/decompress.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/compressed/decompress.c b/arch/arm/boot/compressed/decompress.c index 0da382f3315..9c097073ce4 100644 --- a/arch/arm/boot/compressed/decompress.c +++ b/arch/arm/boot/compressed/decompress.c @@ -11,6 +11,7 @@ extern unsigned long free_mem_end_ptr; extern void error(char *); #define STATIC static +#define STATIC_RW_DATA /* non-static please */ #define ARCH_HAS_DECOMP_WDOG -- cgit v1.2.3 From 75216859d96f66856a0ee78c2de5b02115ff65f3 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 15 Mar 2010 15:14:50 +0100 Subject: ARM: 5990/1: ARM: use __armv5tej_mmu_cache_flush for V5TEJ instead of __armv4_mmu_cache_flush This got broken with commit 0e056f20 Signed-off-by: Sascha Hauer Signed-off-by: Russell King --- arch/arm/boot/compressed/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 535a91daaa5..0f23009170a 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -742,7 +742,7 @@ proc_types: .word 0x000f0000 W(b) __armv4_mmu_cache_on W(b) __armv4_mmu_cache_off - W(b) __armv4_mmu_cache_flush + W(b) __armv5tej_mmu_cache_flush .word 0x0007b000 @ ARMv6 .word 0x000ff000 -- cgit v1.2.3 From 5d8614cc5d6c5c02b7995ed97303481d4e3a8cc7 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Fri, 12 Mar 2010 11:03:58 +0100 Subject: ARM: 5989/1: ARM: KGDB: add support for SMP platforms To support SMP platforms, KGDB requires the architecture backend to implement the kgdb_roundup_cpus function. This patch, taken against 2.6.33, implements the function for ARM based on the MIPS port. Cc: Jason Wessel Cc: Jean-Michel Hautbois Cc: KGDB Mailing List Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/kgdb.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index ba8ccfede96..a5b846b9895 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -9,6 +9,7 @@ * Authors: George Davis * Deepak Saxena */ +#include #include #include @@ -158,6 +159,18 @@ static struct undef_hook kgdb_compiled_brkpt_hook = { .fn = kgdb_compiled_brk_fn }; +static void kgdb_call_nmi_hook(void *ignored) +{ + kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); +} + +void kgdb_roundup_cpus(unsigned long flags) +{ + local_irq_enable(); + smp_call_function(kgdb_call_nmi_hook, NULL, 0); + local_irq_disable(); +} + /** * kgdb_arch_init - Perform any architecture specific initalization. * -- cgit v1.2.3 From 8e4971f2fb2380ce66196136e113d04196b80fcd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Anders=20Grafstr=C3=B6m?= Date: Mon, 15 Mar 2010 16:04:14 +0100 Subject: ARM: 5991/1: Fix regression in restore_user_regs macro MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ARMv5T and earlier require that a ldm {}^ instruction is not followed by an instruction that accesses banked registers. This patch restores the nop that was lost in commit b86040a59feb255a8193173caa4d5199464433d5. Signed-off-by: Anders Grafström Signed-off-by: Russell King --- arch/arm/kernel/entry-header.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 7e9ed1eea40..d93f976fb38 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -102,6 +102,8 @@ .else ldmdb sp, {r0 - lr}^ @ get calling r0 - lr .endif + mov r0, r0 @ ARMv5T and earlier require a nop + @ after ldm {}^ add sp, sp, #S_FRAME_SIZE - S_PC movs pc, lr @ return & move spsr_svc into cpsr .endm -- cgit v1.2.3 From ccf50e2341c4174d5579315e184ea312081acec6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 15 Mar 2010 19:03:06 +0000 Subject: ARM: Fix sorting of platform group config options and includes ... and document the sorting criteria to help future additions. Signed-off-by: Russell King --- arch/arm/Kconfig | 81 +++++++++++++++++++++++++++++++------------------------- 1 file changed, 45 insertions(+), 36 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cadfe2ee66a..c5408bf1bf4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -218,6 +218,10 @@ config MMU Select if you want MMU-based virtualised addressing space support by paged memory management. If unsure, say 'Y'. +# +# The "ARM system type" choice list is ordered alphabetically by option +# text. Please add new entries in the option alphabetic order. +# choice prompt "ARM system type" default ARCH_VERSATILE @@ -274,6 +278,18 @@ config ARCH_AT91 This enables support for systems based on the Atmel AT91RM9200, AT91SAM9 and AT91CAP9 processors. +config ARCH_BCMRING + bool "Broadcom BCMRING" + depends on MMU + select CPU_V6 + select ARM_AMBA + select COMMON_CLKDEV + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select ARCH_WANT_OPTIONAL_GPIOLIB + help + Support for Broadcom's BCMRing platform. + config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x-based" select CPU_ARM720T @@ -359,20 +375,6 @@ config ARCH_H720X help This enables support for systems based on the Hynix HMS720x -config ARCH_NOMADIK - bool "STMicroelectronics Nomadik" - select ARM_AMBA - select ARM_VIC - select CPU_ARM926T - select HAVE_CLK - select COMMON_CLKDEV - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB - help - Support for the Nomadik platform by ST-Ericsson - config ARCH_IOP13XX bool "IOP13xx-based" depends on MMU @@ -747,6 +749,30 @@ config ARCH_U300 help Support for ST-Ericsson U300 series mobile platforms. +config ARCH_U8500 + bool "ST-Ericsson U8500 Series" + select CPU_V7 + select ARM_AMBA + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select COMMON_CLKDEV + help + Support for ST-Ericsson's Ux500 architecture + +config ARCH_NOMADIK + bool "STMicroelectronics Nomadik" + select ARM_AMBA + select ARM_VIC + select CPU_ARM926T + select HAVE_CLK + select COMMON_CLKDEV + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + select GENERIC_GPIO + select ARCH_REQUIRE_GPIOLIB + help + Support for the Nomadik platform by ST-Ericsson + config ARCH_DAVINCI bool "TI DaVinci" select CPU_ARM926T @@ -775,30 +801,13 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). -config ARCH_BCMRING - bool "Broadcom BCMRING" - depends on MMU - select CPU_V6 - select ARM_AMBA - select COMMON_CLKDEV - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB - help - Support for Broadcom's BCMRing platform. - -config ARCH_U8500 - bool "ST-Ericsson U8500 Series" - select CPU_V7 - select ARM_AMBA - select GENERIC_TIME - select GENERIC_CLOCKEVENTS - select COMMON_CLKDEV - help - Support for ST-Ericsson's Ux500 architecture - endchoice +# +# This is sorted alphabetically by mach-* pathname. However, plat-* +# Kconfigs may be included either alphabetically (according to the +# plat- suffix) or along side the corresponding mach-* source. +# source "arch/arm/mach-aaec2000/Kconfig" source "arch/arm/mach-at91/Kconfig" -- cgit v1.2.3 From 0d5e6f7ae8609b944c08e8a2f63f7d169c548134 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 15 Mar 2010 22:04:24 +0000 Subject: ARM: Fix RiscPC decompressor build errors arch/arm/boot/compressed/decompress.o: In function `do_decompress': decompress.c:(.text+0x26e8): undefined reference to `error' decompress.c:(.text+0x2760): undefined reference to `error' decompress.c:(.text+0x27d8): undefined reference to `error' decompress.c:(.text+0x2824): undefined reference to `error' decompress.c:(.text+0x28f0): undefined reference to `error' Signed-off-by: Russell King --- arch/arm/mach-rpc/include/mach/uncompress.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-rpc/include/mach/uncompress.h b/arch/arm/mach-rpc/include/mach/uncompress.h index d5862368c4f..8c9e2c7161c 100644 --- a/arch/arm/mach-rpc/include/mach/uncompress.h +++ b/arch/arm/mach-rpc/include/mach/uncompress.h @@ -109,8 +109,6 @@ static inline void flush(void) { } -static void error(char *x); - /* * Setup for decompression */ -- cgit v1.2.3