From 02e0c5d5c2e00374b6808a42f8eea4ea9baaa216 Mon Sep 17 00:00:00 2001 From: Rudolf Marek Date: Thu, 23 Mar 2006 16:48:09 +0100 Subject: [PATCH] i2c-piix4: Add ATI IXP200/300/400 support This patch adds the ATI IXP southbridges support to i2c-piix4, as it turned out those chips are compatible with it. Signed-off-by: Rudolf Marek Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-piix4 | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index a1c8f581afe..6e6c905143a 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -6,6 +6,8 @@ Supported adapters: Datasheet: Publicly available at the Intel website * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges Datasheet: Only available via NDA from ServerWorks + * ATI IXP southbridges IXP200, IXP300, IXP400 + Datasheet: Not publicly available * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge Datasheet: Publicly available at the SMSC website http://www.smsc.com -- cgit v1.2.3 From 54aaa1ca1022d95d854315743241bb6bf59f531f Mon Sep 17 00:00:00 2001 From: Rudolf Marek Date: Tue, 25 Apr 2006 13:06:41 +0200 Subject: [PATCH] I2C: i2c-piix4: Remove the fix_hstcfg parameter This patch removes the fix_hstcfg option from the driver and related SMBus Interrupt Select register magic because now we know what are valid values for this register. This patch updates the documentation and adds new IRQ mode check so we are sure not to miss any new "unusual" value. The PCI quirk for users of fix_hstcfg was not developed because the chipset lacks of subsystem ID registers and DMI is stated "To be filled". Impact to existing systems is minimal because the problem showed up on motherboards like 10 years back. On the other hand users of newer Serverworks and HT1000 systems won't be misleaded by the message suggesting to try the fix_hstcfg any more. Signed-off-by: Rudolf Marek Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-piix4 | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index 6e6c905143a..10957bee7f6 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -23,8 +23,6 @@ Module Parameters Forcibly enable the PIIX4. DANGEROUS! * force_addr: int Forcibly enable the PIIX4 at the given address. EXTREMELY DANGEROUS! -* fix_hstcfg: int - Fix config register. Needed on some boards (Force CPCI735). Description @@ -68,7 +66,19 @@ this driver on those mainboards. The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are identical to the PIIX4 in I2C/SMBus support. -A few OSB4 southbridges are known to be misconfigured by the BIOS. In this -case, you have you use the fix_hstcfg module parameter. Do not use it -unless you know you have to, because in some cases it also breaks -configuration on southbridges that don't need it. +If you own Force CPCI735 motherboard or other OSB4 based systems you may need +to change the SMBus Interrupt Select register so the SMBus controller uses +the SMI mode. + +1) Use lspci command and locate the PCI device with the SMBus controller: + 00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f) + The line may vary for different chipsets. Please consult the driver source + for all possible PCI ids (and lspci -n to match them). Lets assume the + device is located at 00:0f.0. +2) Now you just need to change the value in 0xD2 register. Get it first with + command: lspci -xxx -s 00:0f.0 + If the value is 0x3 then you need to change it to 0x1 + setpci -s 00:0f.0 d2.b=1 + +Please note that you don't need to do that in all cases, just when the SMBus is +not working properly. -- cgit v1.2.3 From 7aadb8f943f6f8fb48962099cfba05ad0518b0ac Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 25 Apr 2006 13:29:26 +0200 Subject: [PATCH] I2C: i2c-piix4: Fix typo in documentation Fix i2c-piix4 documentation typo. Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-piix4 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index 10957bee7f6..a706ae6a1b4 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -63,7 +63,7 @@ The PIIX4E is just an new version of the PIIX4; it is supported as well. The PIIX/PIIX3 does not implement an SMBus or I2C bus, so you can't use this driver on those mainboards. -The ServerWorks Southbridges, the Intel 440MX, and the Victory766 are +The ServerWorks Southbridges, the Intel 440MX, and the Victory66 are identical to the PIIX4 in I2C/SMBus support. If you own Force CPCI735 motherboard or other OSB4 based systems you may need -- cgit v1.2.3 From f9ba6c04ef1dcf16f7179b7883e9751baaac218e Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 25 Apr 2006 13:37:25 +0200 Subject: [PATCH] I2C: i2c-piix4: Document the IBM problem more clearly Properly document on which systems the i2c-piix4 SMBus driver will refuse to load. Hopefully this will make it clearer for users, which were often wondering why their destop or server systems were detected as laptops. Closes bug #6429. Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-piix4 | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index a706ae6a1b4..92147633323 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 @@ -82,3 +82,17 @@ the SMI mode. Please note that you don't need to do that in all cases, just when the SMBus is not working properly. + + +Hardware-specific issues +------------------------ + +This driver will refuse to load on IBM systems with an Intel PIIX4 SMBus. +Some of these machines have an RFID EEPROM (24RF08) connected to the SMBus, +which can easily get corrupted due to a state machine bug. These are mostly +Thinkpad laptops, but desktop systems may also be affected. We have no list +of all affected systems, so the only safe solution was to prevent access to +the SMBus on all IBM systems (detected using DMI data.) + +For additional information, read: +http://www2.lm-sensors.nu/~lm78/cvs/lm_sensors2/README.thinkpad -- cgit v1.2.3 From 5c7ae65899a4c5b05b6277f856018d1eeeb98907 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Tue, 25 Apr 2006 14:18:16 +0200 Subject: [PATCH] I2C: i2c-nforce2: Add support for the nForce4 MCP51 and MCP55 Add support for the new nForce4 MCP51 (also known as nForce 410 or 430) and nForce4 MCP55 to the i2c-nforce2 driver. Some code changes were required because the base I/O address registers have changed in these versions. Standard BARs are now being used, while the original nForce2 chips used non-standard ones. Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-nforce2 | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-nforce2 b/Documentation/i2c/busses/i2c-nforce2 index d751282d9b2..cd49c428a3a 100644 --- a/Documentation/i2c/busses/i2c-nforce2 +++ b/Documentation/i2c/busses/i2c-nforce2 @@ -7,6 +7,8 @@ Supported adapters: * nForce3 250Gb MCP 10de:00E4 * nForce4 MCP 10de:0052 * nForce4 MCP-04 10de:0034 + * nForce4 MCP51 10de:0264 + * nForce4 MCP55 10de:0368 Datasheet: not publically available, but seems to be similar to the AMD-8111 SMBus 2.0 adapter. -- cgit v1.2.3 From 18f98b1e3147afdb51e545cc6ff2b016c7d088a7 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Sun, 4 Jun 2006 20:01:08 +0200 Subject: [PATCH] i2c: New bus driver for the OpenCores I2C controller The following patch adds support for the OpenCores I2C controller IP core (See http://www.opencores.org/projects.cgi/web/i2c/overview). Signed-off-by: Peter Korsgaard Signed-off-by: Andrew Morton Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-ocores | 51 +++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/i2c/busses/i2c-ocores (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-ocores b/Documentation/i2c/busses/i2c-ocores new file mode 100644 index 00000000000..cfcebb10d14 --- /dev/null +++ b/Documentation/i2c/busses/i2c-ocores @@ -0,0 +1,51 @@ +Kernel driver i2c-ocores + +Supported adapters: + * OpenCores.org I2C controller by Richard Herveille (see datasheet link) + Datasheet: http://www.opencores.org/projects.cgi/web/i2c/overview + +Author: Peter Korsgaard + +Description +----------- + +i2c-ocores is an i2c bus driver for the OpenCores.org I2C controller +IP core by Richard Herveille. + +Usage +----- + +i2c-ocores uses the platform bus, so you need to provide a struct +platform_device with the base address and interrupt number. The +dev.platform_data of the device should also point to a struct +ocores_i2c_platform_data (see linux/i2c-ocores.h) describing the +distance between registers and the input clock speed. + +E.G. something like: + +static struct resource ocores_resources[] = { + [0] = { + .start = MYI2C_BASEADDR, + .end = MYI2C_BASEADDR + 8, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = MYI2C_IRQ, + .end = MYI2C_IRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct ocores_i2c_platform_data myi2c_data = { + .regstep = 2, /* two bytes between registers */ + .clock_khz = 50000, /* input clock of 50MHz */ +}; + +static struct platform_device myi2c = { + .name = "ocores-i2c", + .dev = { + .platform_data = &myi2c_data, + }, + .num_resources = ARRAY_SIZE(ocores_resources), + .resource = ocores_resources, +}; -- cgit v1.2.3 From 62aaa288ab0425b058fd337c5135a32e8c1aeace Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Mon, 12 Jun 2006 21:48:08 +0200 Subject: [PATCH] scx200_acb: Documentation update Documentation update for the scx200_acb driver. Hopefully this will help future users. References: [lm-sensors] Support of i2c-nscacb (April, May 2005) http://lists.lm-sensors.org/pipermail/lm-sensors/2005-April/011756.html http://lists.lm-sensors.org/pipermail/lm-sensors/2005-May/012043.html [lm-sensors] making a geode i2c slave driver (April 2006) http://lists.lm-sensors.org/pipermail/lm-sensors/2006-April/015998.html Kernel bug #6445 http://bugzilla.kernel.org/show_bug.cgi?id=6445 Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/scx200_acb | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/scx200_acb b/Documentation/i2c/busses/scx200_acb index f50e69981ec..7c07883d4df 100644 --- a/Documentation/i2c/busses/scx200_acb +++ b/Documentation/i2c/busses/scx200_acb @@ -2,14 +2,31 @@ Kernel driver scx200_acb Author: Christer Weinigel +The driver supersedes the older, never merged driver named i2c-nscacb. + Module Parameters ----------------- -* base: int +* base: up to 4 ints Base addresses for the ACCESS.bus controllers on SCx200 and SC1100 devices + By default the driver uses two base addresses 0x820 and 0x840. + If you want only one base address, specify the second as 0 so as to + override this default. + Description ----------- Enable the use of the ACCESS.bus controller on the Geode SCx200 and SC1100 processors and the CS5535 and CS5536 Geode companion devices. + +Device-specific notes +--------------------- + +The SC1100 WRAP boards are known to use base addresses 0x810 and 0x820. +If the scx200_acb driver is built into the kernel, add the following +parameter to your boot command line: + scx200_acb.base=0x810,0x820 +If the scx200_acb driver is built as a module, add the following line to +the file /etc/modprobe.conf instead: + options scx200_acb base=0x810,0x820 -- cgit v1.2.3 From d8db8f98562c1e358e42503bb920f75f15a5c6d2 Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Mon, 12 Jun 2006 21:50:11 +0200 Subject: [PATCH] i2c-i801: Remove force_addr parameter i2c-i801: Remove force_addr parameter Remove the force_addr module parameter. It doesn't appear to ever have been needed, and PCI resources shouldn't be arbitrarily changed anyway. Signed-off-by: Jean Delvare Signed-off-by: Greg Kroah-Hartman --- Documentation/i2c/busses/i2c-i801 | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'Documentation/i2c') diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index fd4b2712d57..e46c2345824 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -21,8 +21,7 @@ Authors: Module Parameters ----------------- -* force_addr: int - Forcibly enable the ICH at the given address. EXTREMELY DANGEROUS! +None. Description -- cgit v1.2.3