From 5587931c30dcf778cf7071d1cbac8ea584706dd8 Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Tue, 16 Jun 2009 20:05:57 +0900 Subject: [ARM] Add old Feroceon support to compressed/head.S This patch supports the cache handling for some old Feroceon cores for which the CPU ID is like 0x41159260. This is a complement to commit ab6d15d50637fc25ee941710b23fed09ceb28db3. Signed-off-by: Joonyoung Shim Signed-off-by: Nicolas Pitre --- arch/arm/boot/compressed/head.S | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 01d49be3b2c..4515728c534 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S @@ -674,6 +674,15 @@ proc_types: b __armv4_mmu_cache_off b __armv5tej_mmu_cache_flush +#ifdef CONFIG_CPU_FEROCEON_OLD_ID + /* this conflicts with the standard ARMv5TE entry */ + .long 0x41009260 @ Old Feroceon + .long 0xff00fff0 + b __armv4_mmu_cache_on + b __armv4_mmu_cache_off + b __armv5tej_mmu_cache_flush +#endif + .word 0x66015261 @ FA526 .word 0xff01fff1 b __fa526_cache_on -- cgit v1.2.3