From df666b9c510fd27fd3b1afd9ddfa1eaa62ce12b3 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Wed, 22 Feb 2006 21:23:35 +0000 Subject: [ARM] 3325/2: GPIO function to control multi-drive (open collector) capability Patch from Andrew Victor This patch adds the at91_set_multi_drive() function to enable/disable the multi-drive (open collector) pin capability on the AT91RM9200 processor. This is necessary to fix the UDC (USB Gadget) driver for the AT91RM9200 board as it will not allow the board reset line to be pulled low if the pullup is not driven as an open collector output as the boards are wired to the USB connector on both the DK/EK. This version of the patch updates it to 2.6.16-rc4. Orignal patch by Jeff Warren. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/gpio.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/mach-at91rm9200/gpio.c') diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 2fd2ef583e4..a9f718bf8ba 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -159,6 +159,23 @@ int __init_or_module at91_set_deglitch(unsigned pin, int is_on) } EXPORT_SYMBOL(at91_set_deglitch); +/* + * enable/disable the multi-driver; This is only valid for output and + * allows the output pin to run as an open collector output. + */ +int __init_or_module at91_set_multi_drive(unsigned pin, int is_on) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio) + return -EINVAL; + + __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR)); + return 0; +} +EXPORT_SYMBOL(at91_set_multi_drive); + /*--------------------------------------------------------------------------*/ -- cgit v1.2.3 From abbea7187296a7fb316a55f2319438c2bf881f0a Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Fri, 24 Feb 2006 22:27:50 +0000 Subject: [ARM] 3348/1: Disable GPIO interrupts Patch from Andrew Victor disable_irq() lazily disables the interrupt, so the IRQ is only disabled once the interrupt occurs again. The GPIO interrupt handler therefore must first check disable_depth to see if the IRQ needs to be disabled. Orignal patch by Bill Gatliff. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91rm9200/gpio.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-at91rm9200/gpio.c') diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index a9f718bf8ba..0e396feec46 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c @@ -274,8 +274,18 @@ static void gpio_irq_handler(unsigned irq, struct irqdesc *desc, struct pt_regs gpio = &irq_desc[pin]; while (isr) { - if (isr & 1) - gpio->handle(pin, gpio, regs); + if (isr & 1) { + if (unlikely(gpio->disable_depth)) { + /* + * The core ARM interrupt handler lazily disables IRQs so + * another IRQ must be generated before it actually gets + * here to be disabled on the GPIO controller. + */ + gpio_irq_mask(pin); + } + else + gpio->handle(pin, gpio, regs); + } pin++; gpio++; isr >>= 1; -- cgit v1.2.3