From 59d3a193f1ec1639db447aa1ceb39cd1811fb36e Mon Sep 17 00:00:00 2001 From: Paulius Zaleckas Date: Thu, 26 Mar 2009 10:06:08 +0200 Subject: ARM: Add Gemini architecture v3 Adds support for Cortina Systems Gemini family CPUs: http://www.cortina-systems.com/products/category/18 v3: - fixed __io(a) to be defined as __typesafe_io(a) v2: - #include -> - remove asm/system.h include - revorked mm.c to use named initializers - removed "empty" dma.h - updated copyrights Signed-off-by: Paulius Zaleckas --- arch/arm/mach-gemini/devices.c | 92 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 arch/arm/mach-gemini/devices.c (limited to 'arch/arm/mach-gemini/devices.c') diff --git a/arch/arm/mach-gemini/devices.c b/arch/arm/mach-gemini/devices.c new file mode 100644 index 00000000000..6b525253d02 --- /dev/null +++ b/arch/arm/mach-gemini/devices.c @@ -0,0 +1,92 @@ +/* + * Common devices definition for Gemini + * + * Copyright (C) 2008-2009 Paulius Zaleckas + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +static struct plat_serial8250_port serial_platform_data[] = { + { + .membase = (void *)IO_ADDRESS(GEMINI_UART_BASE), + .mapbase = GEMINI_UART_BASE, + .irq = IRQ_UART, + .uartclk = UART_CLK, + .regshift = 2, + .iotype = UPIO_MEM, + .type = PORT_16550A, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_FIXED_TYPE, + }, + {}, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +int platform_register_uart(void) +{ + return platform_device_register(&serial_device); +} + +static struct resource flash_resource = { + .start = GEMINI_FLASH_BASE, + .flags = IORESOURCE_MEM, +}; + +static struct physmap_flash_data pflash_platform_data = {}; + +static struct platform_device pflash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &pflash_platform_data, + }, + .resource = &flash_resource, + .num_resources = 1, +}; + +int platform_register_pflash(unsigned int size, struct mtd_partition *parts, + unsigned int nr_parts) +{ + unsigned int reg; + + reg = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_STATUS); + + if ((reg & FLASH_TYPE_MASK) != FLASH_TYPE_PARALLEL) + return -ENXIO; + + if (reg & FLASH_WIDTH_16BIT) + pflash_platform_data.width = 2; + else + pflash_platform_data.width = 1; + + /* enable parallel flash pins and disable others */ + reg = __raw_readl(IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL); + reg &= ~PFLASH_PADS_DISABLE; + reg |= SFLASH_PADS_DISABLE | NAND_PADS_DISABLE; + __raw_writel(reg, IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_MISC_CTRL); + + flash_resource.end = flash_resource.start + size - 1; + + pflash_platform_data.parts = parts; + pflash_platform_data.nr_parts = nr_parts; + + return platform_device_register(&pflash_device); +} -- cgit v1.2.3