From c6e58ebb373666eba007e3793789e06a4655df61 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 9 Sep 2006 21:24:13 +0100 Subject: [ARM] 3783/1: S3C2412: fix IRQ_EINT0 to IRQ_EINT3 handling Patch from Ben Dooks The IRQ_EINT0 through IRQ_EINT3 handling has changed on the S3C2412 from the previous SoCs in the range, and thus we need to add code to handle this. The changes come about due to these IRQs being displayed in two different registers, and needing to be acked and masked in both. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-s3c2410/Makefile') diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 273e05f2b8d..0eadec91621 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -28,6 +28,7 @@ obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o # S3C2412 support obj-$(CONFIG_CPU_S3C2412) += s3c2412.o +obj-$(CONFIG_CPU_S3C2412) += s3c2412-irq.o obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o # -- cgit v1.2.3