From c362aecdb51ecb364d427a9b947fd2dfbd4cb86a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 09:51:51 +0100 Subject: [ARM] 4442/1: OSIRIS: Fix CPLD register definitions Fix the CPLD register definitions to correctly mirror the documentation Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2440/mach-osiris.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-s3c2440') diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c index 4d6c7a574c1..4525bb0f851 100644 --- a/arch/arm/mach-s3c2440/mach-osiris.c +++ b/arch/arm/mach-s3c2440/mach-osiris.c @@ -65,6 +65,11 @@ static struct map_desc osiris_iodesc[] __initdata = { /* CPLD control registers */ { + .virtual = (u32)OSIRIS_VA_CTRL0, + .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0), + .length = SZ_16K, + .type = MT_DEVICE, + }, { .virtual = (u32)OSIRIS_VA_CTRL1, .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1), .length = SZ_16K, @@ -74,6 +79,11 @@ static struct map_desc osiris_iodesc[] __initdata = { .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2), .length = SZ_16K, .type = MT_DEVICE, + }, { + .virtual = (u32)OSIRIS_VA_IDREG, + .pfn = __phys_to_pfn(OSIRIS_PA_IDREG), + .length = SZ_16K, + .type = MT_DEVICE, }, }; @@ -195,13 +205,13 @@ static void osiris_nand_select(struct s3c2410_nand_set *set, int slot) pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n", slot, set, set->nr_map); - tmp = __raw_readb(OSIRIS_VA_CTRL1); - tmp &= ~OSIRIS_CTRL1_NANDSEL; + tmp = __raw_readb(OSIRIS_VA_CTRL0); + tmp &= ~OSIRIS_CTRL0_NANDSEL; tmp |= slot; - pr_debug("osiris_nand: ctrl1 now %02x\n", tmp); + pr_debug("osiris_nand: ctrl0 now %02x\n", tmp); - __raw_writeb(tmp, OSIRIS_VA_CTRL1); + __raw_writeb(tmp, OSIRIS_VA_CTRL0); } static struct s3c2410_platform_nand osiris_nand_info = { -- cgit v1.2.3