From 48d7927bdf071d05cf5d15b816cf06b0937cb84f Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Fri, 18 Apr 2008 22:43:07 +0100 Subject: Add a prefetch abort handler This patch adds a prefetch abort handler similar to the data abort one and renames the latter for consistency. Initial implementation by Paul Brook with some renaming by Catalin Marinas. Signed-off-by: Paul Brook Signed-off-by: Catalin Marinas --- arch/arm/mm/proc-v6.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mm/proc-v6.S') diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index eb42e5b9486..2162a692d99 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -240,6 +240,7 @@ ENTRY(v6_processor_functions) .word cpu_v6_dcache_clean_area .word cpu_v6_switch_mm .word cpu_v6_set_pte_ext + .word pabort_noifar .size v6_processor_functions, . - v6_processor_functions .type cpu_arch_name, #object -- cgit v1.2.3 From b7b0ba942f7b18de678cd081902aad8a0b6581c6 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Fri, 18 Apr 2008 22:43:08 +0100 Subject: RealView: Move the SCU initialisation out of __v6_setup This patch moves the SCU initialisation from __v6_setup to the smp_prepare_cpus() function as it relies on platform-specific settings. Changes to get_core_count() are mainly for allowing cleaner code with the upcoming PB11MPCore patches. Signed-off-by: Catalin Marinas --- arch/arm/mm/proc-v6.S | 14 -------------- 1 file changed, 14 deletions(-) (limited to 'arch/arm/mm/proc-v6.S') diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 2162a692d99..bf760ea2f78 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -17,10 +17,6 @@ #include #include -#ifdef CONFIG_SMP -#include -#endif - #include "proc-macros.S" #define D_CACHE_LINE_SIZE 32 @@ -187,19 +183,9 @@ cpu_v6_name: */ __v6_setup: #ifdef CONFIG_SMP - /* Set up the SCU on core 0 only */ - mrc p15, 0, r0, c0, c0, 5 @ CPU core number - ands r0, r0, #15 - ldreq r0, =SCU_BASE - ldreq r5, [r0, #SCU_CTRL] - orreq r5, r5, #1 - streq r5, [r0, #SCU_CTRL] - -#ifndef CONFIG_CPU_DCACHE_DISABLE mrc p15, 0, r0, c1, c0, 1 @ Enable SMP/nAMP mode orr r0, r0, #0x20 mcr p15, 0, r0, c1, c0, 1 -#endif #endif mov r0, #0 -- cgit v1.2.3