From da0916539d20f257dfa46784357300e49d6bfd00 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 6 Sep 2008 17:19:08 +0100 Subject: [ARM] Convert set_pte_ext implementions to macros There are actually only four separate implementations of set_pte_ext. Use assembler macros to insert code for these into the proc-*.S files. Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 30 +++++------------------------- 1 file changed, 5 insertions(+), 25 deletions(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 2dd85273976..8d7512f9cba 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -433,20 +433,7 @@ ENTRY(cpu_xscale_switch_mm) */ .align 5 ENTRY(cpu_xscale_set_pte_ext) - str r1, [r0], #-2048 @ linux version - - bic r2, r1, #0xff0 - orr r2, r2, #PTE_TYPE_EXT @ extended page - - eor r3, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY - - tst r3, #L_PTE_USER @ User? - orrne r2, r2, #PTE_EXT_AP_URO_SRW @ yes -> user r/o, system r/w - - tst r3, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? - orreq r2, r2, #PTE_EXT_AP_UNO_SRW @ yes -> user n/a, system r/w - @ combined with user -> user r/w - + xscale_set_pte_ext_prologue @ @ Handle the X bit. We want to set this bit for the minicache @ (U = E = B = W = 0, C = 1) or when write allocate is enabled, @@ -456,11 +443,10 @@ ENTRY(cpu_xscale_set_pte_ext) @ @ X = (C & ~W & ~B) | (C & W & B & write_allocate) @ - eor ip, r1, #L_PTE_CACHEABLE - tst ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE + and ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE + teq ip, #L_PTE_CACHEABLE #if PTE_CACHE_WRITE_ALLOCATE - eorne ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE - tstne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE + teqne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE #endif orreq r2, r2, #PTE_EXT_TEX(1) @@ -474,13 +460,7 @@ ENTRY(cpu_xscale_set_pte_ext) teq ip, #L_PTE_USER | L_PTE_CACHEABLE biceq r2, r2, #PTE_BUFFERABLE - tst r3, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? - movne r2, #0 @ no -> fault - - str r2, [r0] @ hardware version - mov ip, #0 - mcr p15, 0, r0, c7, c10, 1 @ Clean D cache line - mcr p15, 0, ip, c7, c10, 4 @ Drain Write (& Fill) Buffer + xscale_set_pte_ext_epilogue mov pc, lr -- cgit v1.2.3 From 9e8b5199a753a2583a8ef8360e6428304a242283 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 6 Sep 2008 20:47:54 +0100 Subject: [ARM] Convert Xscale and Xscale3 to use new memory types Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 52 +++++++++++++++++++++++++---------------------- 1 file changed, 28 insertions(+), 24 deletions(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 8d7512f9cba..6fa525364bb 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -406,8 +406,6 @@ ENTRY(cpu_xscale_dcache_clean_area) /* =============================== PageTable ============================== */ -#define PTE_CACHE_WRITE_ALLOCATE 0 - /* * cpu_xscale_switch_mm(pgd) * @@ -431,34 +429,40 @@ ENTRY(cpu_xscale_switch_mm) * * Errata 40: must set memory to write-through for user read-only pages. */ +cpu_xscale_mt_table: + .long 0x00 @ L_PTE_MT_UNCACHED + .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE + .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK + .long 0x00 @ L_PTE_MT_DEV_SHARED + .long 0x00 @ L_PTE_MT_DEV_SHARED2 + .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE + .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC + .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC2 + .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC + .long 0x00 @ unused + .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED + .long 0x00 @ L_PTE_MT_DEV_NONSHARED + .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_IXP2000 + .long 0x00 @ unused + .long 0x00 @ unused + .align 5 ENTRY(cpu_xscale_set_pte_ext) xscale_set_pte_ext_prologue - @ - @ Handle the X bit. We want to set this bit for the minicache - @ (U = E = B = W = 0, C = 1) or when write allocate is enabled, - @ and we have a writeable, cacheable region. If we ignore the - @ U and E bits, we can allow user space to use the minicache as - @ well. - @ - @ X = (C & ~W & ~B) | (C & W & B & write_allocate) - @ - and ip, r1, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE - teq ip, #L_PTE_CACHEABLE -#if PTE_CACHE_WRITE_ALLOCATE - teqne ip, #L_PTE_CACHEABLE | L_PTE_WRITE | L_PTE_BUFFERABLE -#endif - orreq r2, r2, #PTE_EXT_TEX(1) @ - @ Erratum 40: The B bit must be cleared for a user read-only - @ cacheable page. - @ - @ B = B & ~(U & C & ~W) + @ Erratum 40: must set memory to write-through for user read-only pages @ - and ip, r1, #L_PTE_USER | L_PTE_WRITE | L_PTE_CACHEABLE - teq ip, #L_PTE_USER | L_PTE_CACHEABLE - biceq r2, r2, #PTE_BUFFERABLE + and ip, r1, #(L_PTE_MT_MASK | L_PTE_USER | L_PTE_WRITE) & ~(4 << 2) + teq ip, #L_PTE_MT_WRITEBACK | L_PTE_USER + + moveq r1, #L_PTE_MT_WRITETHROUGH + and r1, r1, #L_PTE_MT_MASK + adr ip, cpu_xscale_mt_table + ldr ip, [ip, r1] + bic r2, r2, #0x0c + orr r2, r2, ip xscale_set_pte_ext_epilogue mov pc, lr -- cgit v1.2.3 From 639b0ae7f5bcd645862a9c3ea2d4321475c71d7a Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 6 Sep 2008 21:07:45 +0100 Subject: [ARM] Convert ARMv6 and ARMv7 to use new memory types Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 6fa525364bb..1e0c3bb1905 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -435,10 +435,10 @@ cpu_xscale_mt_table: .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK .long 0x00 @ L_PTE_MT_DEV_SHARED - .long 0x00 @ L_PTE_MT_DEV_SHARED2 + .long 0x00 @ unused .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC - .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC2 + .long 0x00 @ unused .long PTE_BUFFERABLE @ L_PTE_MT_DEV_WC .long 0x00 @ unused .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED -- cgit v1.2.3 From 40df2d1d8538865341a4cb9d4b7a375296517ad2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 7 Sep 2008 12:36:46 +0100 Subject: [ARM] Update Xscale and Xscale3 PTE mappings Use 'shared device' mappings for devices, and use the standard bit combinations for Xscale3. Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 1e0c3bb1905..534b4be86ae 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -434,7 +434,7 @@ cpu_xscale_mt_table: .long PTE_BUFFERABLE @ L_PTE_MT_BUFFERABLE .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK - .long 0x00 @ L_PTE_MT_DEV_SHARED + .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED .long 0x00 @ unused .long PTE_EXT_TEX(1) | PTE_CACHEABLE @ L_PTE_MT_MINICACHE .long PTE_EXT_TEX(1) | PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEALLOC -- cgit v1.2.3 From db5b7169474882fabbd811a4cf5c1bae3157e677 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 7 Sep 2008 12:42:51 +0100 Subject: [ARM] Remove MT_DEVICE_IXP2000 and associated definitions As of the previous commit, MT_DEVICE_IXP2000 encodes to the same PTE bit encoding as MT_DEVICE, so it's now redundant. Convert MT_DEVICE_IXP2000 to use MT_DEVICE instead, and remove its aliases. Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 534b4be86ae..01adbd9462f 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -443,7 +443,7 @@ cpu_xscale_mt_table: .long 0x00 @ unused .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_DEV_CACHED .long 0x00 @ L_PTE_MT_DEV_NONSHARED - .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_IXP2000 + .long 0x00 @ unused .long 0x00 @ unused .long 0x00 @ unused -- cgit v1.2.3 From 5ec9407dd1196daaf12b427b351e2cd62d2a16a7 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 7 Sep 2008 19:15:31 +0100 Subject: [ARM] Don't include asm/elf.h in asm code asm code really wants asm/hwcap.h, so include that instead. Signed-off-by: Russell King --- arch/arm/mm/proc-xscale.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mm/proc-xscale.S') diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 01adbd9462f..0cce37b9393 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -23,7 +23,7 @@ #include #include #include -#include +#include #include #include #include -- cgit v1.2.3