From c197cec5fae7968a7154ee999f0a1b07938d1528 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 18 Jul 2009 10:12:25 +0100 Subject: ARM: S3C: Update hwmon device definition and name Change the hwmon device name to something more generic as this should be functional for both the s3c24xx and s3c64xx archs. Since it has yet to have a driver, it is pretty safe to change as there are no extant users. Also add the necessary entry in devs.h which seems to have been missed out at somepoint. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/devs.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 2e170827e0b..1989ca1bb2b 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h @@ -46,6 +46,8 @@ extern struct platform_device s3c_device_hsmmc2; extern struct platform_device s3c_device_spi0; extern struct platform_device s3c_device_spi1; +extern struct platform_device s3c_device_hwmon; + extern struct platform_device s3c_device_nand; extern struct platform_device s3c_device_usbgadget; -- cgit v1.2.3 From e170adcb406504b8acd35554c69830c11916be1f Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 18 Jul 2009 10:12:27 +0100 Subject: ARM: S3C: Add ADC synchronous read call. To add HWMON support, we need a synchronous read() call that blocks until completion. Add the client that is being service to the select and convert callbacks to make the code easier. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/adc.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h index d847bd476b6..5f3b1cd53b9 100644 --- a/arch/arm/plat-s3c/include/plat/adc.h +++ b/arch/arm/plat-s3c/include/plat/adc.h @@ -19,10 +19,14 @@ struct s3c_adc_client; extern int s3c_adc_start(struct s3c_adc_client *client, unsigned int channel, unsigned int nr_samples); +extern int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch); + extern struct s3c_adc_client * s3c_adc_register(struct platform_device *pdev, - void (*select)(unsigned selected), - void (*conv)(unsigned d0, unsigned d1, + void (*select)(struct s3c_adc_client *client, + unsigned selected), + void (*conv)(struct s3c_adc_client *client, + unsigned d0, unsigned d1, unsigned *samples_left), unsigned int is_ts); -- cgit v1.2.3 From bff78650a2b0ed42b8fb134b6a9b387e00027d67 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 18 Jul 2009 10:12:28 +0100 Subject: ARM: HWMON: S3C24XX series ADC driver Add support for the ADC controller on the S3C series of processors to drivers/hwmon for use with hardware monitoring systems. Signed-off-by: Ben Dooks Acked-by: Jean Delvare Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/hwmon.h | 41 ++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 arch/arm/plat-s3c/include/plat/hwmon.h (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/hwmon.h b/arch/arm/plat-s3c/include/plat/hwmon.h new file mode 100644 index 00000000000..1ba88ea0aa3 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/hwmon.h @@ -0,0 +1,41 @@ +/* linux/arch/arm/plat-s3c/include/plat/hwmon.h + * + * Copyright 2005 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C - HWMon interface for ADC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_ADC_HWMON_H +#define __ASM_ARCH_ADC_HWMON_H __FILE__ + +/** + * s3c_hwmon_chcfg - channel configuration + * @name: The name to give this channel. + * @mult: Multiply the ADC value read by this. + * @div: Divide the value from the ADC by this. + * + * The value read from the ADC is converted to a value that + * hwmon expects (mV) by result = (value_read * @mult) / @div. + */ +struct s3c_hwmon_chcfg { + const char *name; + unsigned int mult; + unsigned int div; +}; + +/** + * s3c_hwmon_pdata - HWMON platform data + * @in: One configuration for each possible channel used. + */ +struct s3c_hwmon_pdata { + struct s3c_hwmon_chcfg *in[8]; +}; + +#endif /* __ASM_ARCH_ADC_HWMON_H */ + -- cgit v1.2.3 From ea5fe9aedf512d20b75b7dcfd54ab99ae5c0934b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 30 Jul 2009 23:23:22 +0100 Subject: ARM: S3C: CPUFREQ: Documentation for cpufreq header Update arch/arm/plat-s3c/include/plat/cpu-freq.h to include kerneldoc style documentation. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/cpu-freq.h | 91 +++++++++++++++++++++++++++---- 1 file changed, 81 insertions(+), 10 deletions(-) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h index c86a13307e9..0ba7670fd07 100644 --- a/arch/arm/plat-s3c/include/plat/cpu-freq.h +++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h @@ -17,6 +17,21 @@ struct s3c_cpufreq_info; struct s3c_cpufreq_board; struct s3c_iotimings; +/** + * struct s3c_freq - frequency information (mainly for core drivers) + * @fclk: The FCLK frequency in Hz. + * @armclk: The ARMCLK frequency in Hz. + * @hclk_tns: HCLK cycle time in 10ths of nano-seconds. + * @hclk: The HCLK frequency in Hz. + * @pclk: The PCLK frequency in Hz. + * + * This contains the frequency information about the current configuration + * mainly for the core drivers to ensure we do not end up passing about + * a large number of parameters. + * + * The @hclk_tns field is a useful cache for the parts of the drivers that + * need to calculate IO timings and suchlike. + */ struct s3c_freq { unsigned long fclk; unsigned long armclk; @@ -25,33 +40,75 @@ struct s3c_freq { unsigned long pclk; }; -/* wrapper 'struct cpufreq_freqs' so that any drivers receiving the +/** + * struct s3c_cpufreq_freqs - s3c cpufreq notification information. + * @freqs: The cpufreq setting information. + * @old: The old clock settings. + * @new: The new clock settings. + * @pll_changing: Set if the PLL is changing. + * + * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the * notification can use this information that is not provided by just * having the core frequency alone. + * + * The pll_changing flag is used to indicate if the PLL itself is + * being set during this change. This is important as the clocks + * will temporarily be set to the XTAL clock during this time, so + * drivers may want to close down their output during this time. + * + * Note, this is not being used by any current drivers and therefore + * may be removed in the future. */ - struct s3c_cpufreq_freqs { struct cpufreq_freqs freqs; struct s3c_freq old; struct s3c_freq new; + + unsigned int pll_changing:1; }; #define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) +/** + * struct s3c_clkdivs - clock divisor information + * @p_divisor: Divisor from FCLK to PCLK. + * @h_divisor: Divisor from FCLK to HCLK. + * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs). + * @dvs: Non-zero if using DVS mode for ARMCLK. + * + * Divisor settings for the core clocks. + */ struct s3c_clkdivs { - int p_divisor; /* fclk / pclk */ - int h_divisor; /* fclk / hclk */ - int arm_divisor; /* not all cpus have this. */ - unsigned char dvs; /* using dvs mode to arm. */ + int p_divisor; + int h_divisor; + int arm_divisor; + unsigned char dvs; }; #define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) +/** + * struct s3c_pllval - PLL value entry. + * @freq: The frequency for this entry in Hz. + * @pll_reg: The PLL register setting for this PLL value. + */ struct s3c_pllval { unsigned long freq; unsigned long pll_reg; }; +/** + * struct s3c_cpufreq_config - current cpu frequency configuration + * @freq: The current settings for the core clocks. + * @pll: The PLL table entry for the current PLL settings. + * @divs: The divisor settings for the core clocks. + * @info: The current core driver information. + * @board: The information for the board we are running on. + * + * This is for the core drivers that need to know information about + * the current settings and values. It should not be needed by any + * device drivers. +*/ struct s3c_cpufreq_config { struct s3c_freq freq; struct s3c_pllval pll; @@ -60,13 +117,27 @@ struct s3c_cpufreq_config { struct s3c_cpufreq_board *board; }; -/* s3c_cpufreq_board +/** + * struct s3c_cpufreq_board - per-board cpu frequency informatin + * @refresh: The SDRAM refresh period in nanoseconds. + * @auto_io: Set if the IO timing settings should be generated from the + * initialisation time hardware registers. + * @need_io: Set if the board has external IO on any of the chipselect + * lines that will require the hardware timing registers to be + * updated on a clock change. + * @max: The maxium frequency limits for the system. Any field that + * is left at zero will use the CPU's settings. + * + * This contains the board specific settings that affect how the CPU + * drivers chose settings. These include the memory refresh and IO + * timing information. * - * per-board configuraton information, such as memory refresh and - * how to initialise IO timings. + * Registration depends on the driver being used, the ARMCLK only + * implementation does not currently need this but the older style + * driver requires this to be available. */ struct s3c_cpufreq_board { - unsigned int refresh; /* refresh period in ns */ + unsigned int refresh; unsigned int auto_io:1; /* automatically init io timings. */ unsigned int need_io:1; /* set if needs io timing support. */ -- cgit v1.2.3 From d6fc87d3f7d236892e4d0003a07cd2b5171e5e27 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 30 Jul 2009 23:23:23 +0100 Subject: ARM: S3C: CPUFREQ: Move struct s3c_cpufreq_config to cpu-freq-core.h Move the structure s3c_cpufreq_config from cpu-freq.h to the less advertised cpu-freq-core.h as it is not needed by anything outside the core drivers. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/cpu-freq.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/cpu-freq.h b/arch/arm/plat-s3c/include/plat/cpu-freq.h index 0ba7670fd07..7b982b7f28c 100644 --- a/arch/arm/plat-s3c/include/plat/cpu-freq.h +++ b/arch/arm/plat-s3c/include/plat/cpu-freq.h @@ -97,26 +97,6 @@ struct s3c_pllval { unsigned long pll_reg; }; -/** - * struct s3c_cpufreq_config - current cpu frequency configuration - * @freq: The current settings for the core clocks. - * @pll: The PLL table entry for the current PLL settings. - * @divs: The divisor settings for the core clocks. - * @info: The current core driver information. - * @board: The information for the board we are running on. - * - * This is for the core drivers that need to know information about - * the current settings and values. It should not be needed by any - * device drivers. -*/ -struct s3c_cpufreq_config { - struct s3c_freq freq; - struct s3c_pllval pll; - struct s3c_clkdivs divs; - struct s3c_cpufreq_info *info; /* for core, not drivers */ - struct s3c_cpufreq_board *board; -}; - /** * struct s3c_cpufreq_board - per-board cpu frequency informatin * @refresh: The SDRAM refresh period in nanoseconds. -- cgit v1.2.3 From e13cf03eaae3792442c401860910d40f33c89a33 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 30 Jul 2009 23:23:35 +0100 Subject: ARM: S3C: Update CPU register mapping practices. Currently map-base.h defines the main virtual address mappings made for all the support S3C SoC series, but does not then define any base for per-cpu mappings to be made from. Add S3C_ADDR_CPU() macro to define an virtual address as an offset from the last of the core mappings. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/map-base.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/map-base.h b/arch/arm/plat-s3c/include/plat/map-base.h index b84289d32a5..250be311c85 100644 --- a/arch/arm/plat-s3c/include/plat/map-base.h +++ b/arch/arm/plat-s3c/include/plat/map-base.h @@ -32,9 +32,15 @@ #define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ #define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ -#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */ +#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */ #define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ #define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ +/* This is used for the CPU specific mappings that may be needed, so that + * they do not need to directly used S3C_ADDR() and thus make it easier to + * modify the space for mapping. + */ +#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x)) + #endif /* __ASM_PLAT_MAP_H */ -- cgit v1.2.3 From f0176794b6abc2e5239c07a58cf11b6f43d0f185 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 30 Jul 2009 23:23:38 +0100 Subject: ARM: S3C2410: Add S3C2410A sysdev. Add a sysdev S3C2410A sysdev to allow the differentiation of the S3C2410A from the S3C2410. This is needed for the CPUFREQ code to enable the extra features and update cpu specific information. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index be541cbba07..fbc3d498e02 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h @@ -65,6 +65,7 @@ extern struct sys_timer s3c24xx_timer; /* system device classes */ extern struct sysdev_class s3c2410_sysclass; +extern struct sysdev_class s3c2410a_sysclass; extern struct sysdev_class s3c2412_sysclass; extern struct sysdev_class s3c2440_sysclass; extern struct sysdev_class s3c2442_sysclass; -- cgit v1.2.3 From d91e9a7ab93e09e5a0fbed73f3a6a330f14620a4 Mon Sep 17 00:00:00 2001 From: Mark Brown Date: Wed, 5 Aug 2009 18:29:57 +0100 Subject: ARM: S3C24XX: Add platform device for AC97 controller Move the definition of the "generic" IRQ in the process. Signed-off-by: Mark Brown Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/devs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 2e170827e0b..2e6599411c2 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h @@ -56,5 +56,6 @@ extern struct platform_device s3c_device_usb_hsotg; #ifdef CONFIG_CPU_S3C2440 extern struct platform_device s3c_device_camif; +extern struct platform_device s3c_device_ac97; #endif -- cgit v1.2.3 From 0914b93f4f36d1a0233bd64da9a35e37e72304ec Mon Sep 17 00:00:00 2001 From: Joonyoung Shim Date: Tue, 18 Aug 2009 21:56:19 +0900 Subject: ASoC: Fix data format configuration for S3C64XX IISv2 The data format configuration for S3C64xx IISv2 was hardcoded for IISMOD register. This patch changes to the defined values it. And instead of bits 9 and 10 of IISMOD we should clear bits 13 and 14. Signed-off-by: Joonyoung Shim Signed-off-by: Mark Brown --- arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h index 0fad7571030..07659dad174 100644 --- a/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h +++ b/arch/arm/plat-s3c/include/plat/regs-s3c2412-iis.h @@ -33,6 +33,11 @@ #define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) #define S3C2412_IISCON_IIS_ACTIVE (1 << 0) +#define S3C64XX_IISMOD_BLC_16BIT (0 << 13) +#define S3C64XX_IISMOD_BLC_8BIT (1 << 13) +#define S3C64XX_IISMOD_BLC_24BIT (2 << 13) +#define S3C64XX_IISMOD_BLC_MASK (3 << 13) + #define S3C64XX_IISMOD_IMS_PCLK (0 << 10) #define S3C64XX_IISMOD_IMS_SYSMUX (1 << 10) -- cgit v1.2.3 From 14412acde5b57450b8afb3d4b03132419b6abebf Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 20 Aug 2009 22:50:40 +0100 Subject: ASoC: S3C24XX: Add audio core and tlv320aic23 for Simtec boards Add core support for the range of S3C24XX Simtec boards with TLV320AIC23 CODECs on them. Since there are also boards with similar IIS routing the AMP and the configuration code is placed in a core file for re-use with other CODEC bindings. Signed-off-by: Ben Dooks Signed-off-by: Mark Brown --- arch/arm/plat-s3c/include/plat/audio-simtec.h | 37 +++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 arch/arm/plat-s3c/include/plat/audio-simtec.h (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/audio-simtec.h b/arch/arm/plat-s3c/include/plat/audio-simtec.h new file mode 100644 index 00000000000..0f440b9168d --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/audio-simtec.h @@ -0,0 +1,37 @@ +/* arch/arm/plat-s3c/include/plat/audio-simtec.h + * + * Copyright 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Simtec Audio support. +*/ + +/** + * struct s3c24xx_audio_simtec_pdata - platform data for simtec audio + * @use_mpllin: Select codec clock from MPLLin + * @output_cdclk: Need to output CDCLK to the codec + * @have_mic: Set if we have a MIC socket + * @have_lout: Set if we have a LineOut socket + * @amp_gpio: GPIO pin to enable the AMP + * @amp_gain: Option GPIO to control AMP gain + */ +struct s3c24xx_audio_simtec_pdata { + unsigned int use_mpllin:1; + unsigned int output_cdclk:1; + + unsigned int have_mic:1; + unsigned int have_lout:1; + + int amp_gpio; + int amp_gain[2]; + + void (*startup)(void); +}; + +extern int simtec_audio_add(const char *codec_name, + struct s3c24xx_audio_simtec_pdata *pdata); -- cgit v1.2.3 From 57a23ec79475bb06294532c6d02fa33d7d87323c Mon Sep 17 00:00:00 2001 From: Holger Freyther Date: Wed, 19 Nov 2008 17:10:51 +0000 Subject: mtd: s3c2410_nand: Add config option to disable hw ecc at runtime This patch adds a flag to the s3c2410_nand platform data, which configures whether hardware ecc is used for that chip. Currently hardware ecc is used if it was compiled into the kernel. But if you want to build a kernel which runs on multiple devices you might have a configuration where you have devices which require hw ecc as well as devices which want software ecc. Signed-off-by: Lars-Peter Clausen --- arch/arm/plat-s3c/include/plat/nand.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/nand.h b/arch/arm/plat-s3c/include/plat/nand.h index 18f958801e6..723ab032059 100644 --- a/arch/arm/plat-s3c/include/plat/nand.h +++ b/arch/arm/plat-s3c/include/plat/nand.h @@ -47,6 +47,7 @@ struct s3c2410_platform_nand { int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */ unsigned int ignore_unset_ecc:1; + unsigned int software_ecc:1; /* force software ecc at runtime */ int nr_sets; struct s3c2410_nand_set *sets; -- cgit v1.2.3 From aa5f3d60c3934508819b0acf9aaef061ff3db4a6 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 5 Nov 2009 23:04:42 +0100 Subject: S3C: Allow to completly disable low-level messages In some cases it is desirable to completly disable low-level messages. For example if you have no uart available for a serial console. With this patch it is possible to disable low-level messages by setting CONFIG_S3C_LOWLEVEL_UART_PORT to less then zero. Signed-off-by: Lars-Peter Clausen --- arch/arm/plat-s3c/include/plat/uncompress.h | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/uncompress.h b/arch/arm/plat-s3c/include/plat/uncompress.h index dc66a477f62..8e02073e307 100644 --- a/arch/arm/plat-s3c/include/plat/uncompress.h +++ b/arch/arm/plat-s3c/include/plat/uncompress.h @@ -37,6 +37,8 @@ static void arch_detect_cpu(void); /* how many bytes we allow into the FIFO at a time in FIFO mode */ #define FIFO_MAX (14) +#if CONFIG_S3C_LOWLEVEL_UART_PORT >= 0 + #define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT) static __inline__ void @@ -86,10 +88,6 @@ static void putc(int ch) uart_wr(S3C2410_UTXH, ch); } -static inline void flush(void) -{ -} - #define __raw_writel(d, ad) \ do { \ *((volatile unsigned int __force *)(ad)) = (d); \ @@ -163,6 +161,19 @@ static inline void arch_enable_uart_fifo(void) #define arch_enable_uart_fifo() do { } while(0) #endif +#else +static inline void putc(int ch) +{ +} + +#define arch_enable_uart_fifo() do { } while(0) +#define arch_decomp_wdog_start() +#define arch_decomp_wdog() +#endif + +static inline void flush(void) +{ +} static void arch_decomp_setup(void) -- cgit v1.2.3 From 7f90a049d8ddcb6c485e2a6889cb3b5d4a5be1c0 Mon Sep 17 00:00:00 2001 From: Nelson Castillo Date: Sat, 24 Oct 2009 03:04:40 -0500 Subject: Add s3c2410ts Add the ts and the relevant files. Signed-off-by: Nelson Castillo --- arch/arm/plat-s3c/include/plat/devs.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-s3c/include') diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 0f540ea1e99..50d50a2f086 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h @@ -53,6 +53,8 @@ extern struct platform_device s3c_device_nand; extern struct platform_device s3c_device_usbgadget; extern struct platform_device s3c_device_usb_hsotg; +extern struct platform_device s3c_device_ts; + /* s3c2440 specific devices */ #ifdef CONFIG_CPU_S3C2440 -- cgit v1.2.3