From 9bc1aaeac0118611c30edf84995ebad5adfd6822 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:35 +0100 Subject: [ARM] S3C24XX: Split timer pending code out Split the timer pending code out to a seperate per-machine header so that when compiling for mach-s3c2410 or mach-s3c24a0 we can use the right timer code without having to #ifdef the timer driver. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/time.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch/arm/plat-s3c/time.c') diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-s3c/time.c index c6861a05a29..d35e149f4eb 100644 --- a/arch/arm/plat-s3c/time.c +++ b/arch/arm/plat-s3c/time.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -91,12 +92,9 @@ static inline unsigned long timer_ticks_to_usec(unsigned long ticks) * IRQs are disabled before entering here from do_gettimeofday() */ -#define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0)) - static unsigned long s3c2410_gettimeoffset (void) { unsigned long tdone; - unsigned long irqpend; unsigned long tval; /* work out how many ticks have gone since last timer interrupt */ @@ -106,8 +104,7 @@ static unsigned long s3c2410_gettimeoffset (void) /* check to see if there is an interrupt pending */ - irqpend = __raw_readl(S3C2410_SRCPND); - if (irqpend & SRCPND_TIMER4) { + if (s3c24xx_ostimer_pending()) { /* re-read the timer, and try and fix up for the missed * interrupt. Note, the interrupt may go off before the * timer has re-loaded from wrapping. -- cgit v1.2.3 From c652d2ddb97ccdc4774e149ef998928263fd8886 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:07:01 +0100 Subject: [ARM] S3C: Add TICK_MAX for timer code Add TICK_MAX definition for the timer code as the S3C64XX series have 32bit capable PWM timers. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/time.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c/time.c') diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-s3c/time.c index d35e149f4eb..a581ff7ba66 100644 --- a/arch/arm/plat-s3c/time.c +++ b/arch/arm/plat-s3c/time.c @@ -44,6 +44,10 @@ static unsigned long timer_startval; static unsigned long timer_usec_ticks; +#ifndef TICK_MAX +#define TICK_MAX (0xffff) +#endif + #define TIMER_USEC_SHIFT 16 /* we use the shifted arithmetic to work out the ratio of timer ticks @@ -156,7 +160,7 @@ static void s3c2410_timer_setup (void) unsigned long tcfg1; unsigned long tcfg0; - tcnt = 0xffff; /* default value for tcnt */ + tcnt = TICK_MAX; /* default value for tcnt */ /* read the current timer configuration bits */ @@ -217,7 +221,7 @@ static void s3c2410_timer_setup (void) tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks); /* check to see if timer is within 16bit range... */ - if (tcnt > 0xffff) { + if (tcnt > TICK_MAX) { panic("setup_timer: HZ is too small, cannot configure timer!"); return; } -- cgit v1.2.3 From 9d325f23416d1525401d43442bafca2bb254ab74 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 21 Nov 2008 10:36:05 +0000 Subject: [ARM] S3C: Update time initialisation to fix S3C64XX time problems The S3C64XX timer is running at the wrong rate due to the assumptions made in the timer initialisation about the way the pwm dividers work. This means that time on the S3C64XX runs twice as fast as it should. Fix the problem by moving to using the clk framework to setup the pwm timer clock muxes, as the pwm-clock code has all the necessary knowledge of how the timer clock inputs are routed. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/time.c | 66 +++++++++++++++++++++++++++++++++--------------- 1 file changed, 45 insertions(+), 21 deletions(-) (limited to 'arch/arm/plat-s3c/time.c') diff --git a/arch/arm/plat-s3c/time.c b/arch/arm/plat-s3c/time.c index a581ff7ba66..3b27b29da47 100644 --- a/arch/arm/plat-s3c/time.c +++ b/arch/arm/plat-s3c/time.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -147,6 +148,10 @@ static struct irqaction s3c2410_timer_irq = { machine_is_anubis() || \ machine_is_osiris()) +static struct clk *tin; +static struct clk *tdiv; +static struct clk *timerclk; + /* * Set up timer interrupt, and return the current time in seconds. * @@ -162,12 +167,6 @@ static void s3c2410_timer_setup (void) tcnt = TICK_MAX; /* default value for tcnt */ - /* read the current timer configuration bits */ - - tcon = __raw_readl(S3C2410_TCON); - tcfg1 = __raw_readl(S3C2410_TCFG1); - tcfg0 = __raw_readl(S3C2410_TCFG0); - /* configure the system for whichever machine is in use */ if (use_tclk1_12()) { @@ -175,11 +174,13 @@ static void s3c2410_timer_setup (void) timer_usec_ticks = timer_mask_usec_ticks(1, 12000000); tcnt = 12000000 / HZ; + tcfg1 = __raw_readl(S3C2410_TCFG1); tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1; + __raw_writel(tcfg1, S3C2410_TCFG1); } else { unsigned long pclk; - struct clk *clk; + struct clk *tscaler; /* for the h1940 (and others), we use the pclk from the core * to generate the timer values. since values around 50 to @@ -190,29 +191,25 @@ static void s3c2410_timer_setup (void) * (8.45 ticks per usec) */ - /* this is used as default if no other timer can be found */ - - clk = clk_get(NULL, "timers"); - if (IS_ERR(clk)) - panic("failed to get clock for system timer"); - - clk_enable(clk); - - pclk = clk_get_rate(clk); + pclk = clk_get_rate(timerclk); /* configure clock tick */ timer_usec_ticks = timer_mask_usec_ticks(6, pclk); - tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; - tcfg1 |= S3C2410_TCFG1_MUX4_DIV2; + tscaler = clk_get_parent(tdiv); - tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; - tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT; + clk_set_rate(tscaler, pclk / 3); + clk_set_rate(tdiv, pclk / 6); + clk_set_parent(tin, tdiv); - tcnt = (pclk / 6) / HZ; + tcnt = clk_get_rate(tin) / HZ; } + tcon = __raw_readl(S3C2410_TCON); + tcfg0 = __raw_readl(S3C2410_TCFG0); + tcfg1 = __raw_readl(S3C2410_TCFG1); + /* timers reload after counting zero, so reduce the count by 1 */ tcnt--; @@ -248,8 +245,35 @@ static void s3c2410_timer_setup (void) __raw_writel(tcon, S3C2410_TCON); } +static void __init s3c2410_timer_resources(void) +{ + struct platform_device tmpdev; + + tmpdev.dev.bus = &platform_bus_type; + tmpdev.id = 4; + + timerclk = clk_get(NULL, "timers"); + if (IS_ERR(timerclk)) + panic("failed to get clock for system timer"); + + clk_enable(timerclk); + + if (!use_tclk1_12()) { + tin = clk_get(&tmpdev.dev, "pwm-tin"); + if (IS_ERR(tin)) + panic("failed to get pwm-tin clock for system timer"); + + tdiv = clk_get(&tmpdev.dev, "pwm-tdiv"); + if (IS_ERR(tdiv)) + panic("failed to get pwm-tdiv clock for system timer"); + } + + clk_enable(tin); +} + static void __init s3c2410_timer_init(void) { + s3c2410_timer_resources(); s3c2410_timer_setup(); setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); } -- cgit v1.2.3