From c133c290118bfc99cd7a23b5a00b5252d2be90c8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:37 +0000 Subject: [ARM] S3C: Make common header Move the common information from the header into a new shareable header for re-use on the s3c64xx. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/dma.h | 127 +++++++++++++++++++++++++++++++++++ 1 file changed, 127 insertions(+) create mode 100644 arch/arm/plat-s3c/include/plat/dma.h (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/dma.h b/arch/arm/plat-s3c/include/plat/dma.h new file mode 100644 index 00000000000..34dba98f08e --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/dma.h @@ -0,0 +1,127 @@ +/* arch/arm/plat-s3c/include/plat/dma.h + * + * Copyright (C) 2003,2004,2006 Simtec Electronics + * Ben Dooks + * + * Samsung S3C DMA support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +enum s3c2410_dma_buffresult { + S3C2410_RES_OK, + S3C2410_RES_ERR, + S3C2410_RES_ABORT +}; + +enum s3c2410_dmasrc { + S3C2410_DMASRC_HW, /* source is memory */ + S3C2410_DMASRC_MEM /* source is hardware */ +}; + +/* enum s3c2410_chan_op + * + * operation codes passed to the DMA code by the user, and also used + * to inform the current channel owner of any changes to the system state +*/ + +enum s3c2410_chan_op { + S3C2410_DMAOP_START, + S3C2410_DMAOP_STOP, + S3C2410_DMAOP_PAUSE, + S3C2410_DMAOP_RESUME, + S3C2410_DMAOP_FLUSH, + S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ + S3C2410_DMAOP_STARTED, /* indicate channel started */ +}; + +struct s3c2410_dma_client { + char *name; +}; + +struct s3c2410_dma_chan; + +/* s3c2410_dma_cbfn_t + * + * buffer callback routine type +*/ + +typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, + void *buf, int size, + enum s3c2410_dma_buffresult result); + +typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, + enum s3c2410_chan_op ); + + + +/* s3c2410_dma_request + * + * request a dma channel exclusivley +*/ + +extern int s3c2410_dma_request(unsigned int channel, + struct s3c2410_dma_client *, void *dev); + + +/* s3c2410_dma_ctrl + * + * change the state of the dma channel +*/ + +extern int s3c2410_dma_ctrl(unsigned int channel, enum s3c2410_chan_op op); + +/* s3c2410_dma_setflags + * + * set the channel's flags to a given state +*/ + +extern int s3c2410_dma_setflags(unsigned int channel, + unsigned int flags); + +/* s3c2410_dma_free + * + * free the dma channel (will also abort any outstanding operations) +*/ + +extern int s3c2410_dma_free(unsigned int channel, struct s3c2410_dma_client *); + +/* s3c2410_dma_enqueue + * + * place the given buffer onto the queue of operations for the channel. + * The buffer must be allocated from dma coherent memory, or the Dcache/WB + * drained before the buffer is given to the DMA system. +*/ + +extern int s3c2410_dma_enqueue(unsigned int channel, void *id, + dma_addr_t data, int size); + +/* s3c2410_dma_config + * + * configure the dma channel +*/ + +extern int s3c2410_dma_config(unsigned int channel, int xferunit); + +/* s3c2410_dma_devconfig + * + * configure the device we're talking to +*/ + +extern int s3c2410_dma_devconfig(int channel, enum s3c2410_dmasrc source, + unsigned long devaddr); + +/* s3c2410_dma_getposition + * + * get the position that the dma transfer is currently at +*/ + +extern int s3c2410_dma_getposition(unsigned int channel, + dma_addr_t *src, dma_addr_t *dest); + +extern int s3c2410_dma_set_opfn(unsigned int, s3c2410_dma_opfn_t rtn); +extern int s3c2410_dma_set_buffdone_fn(unsigned int, s3c2410_dma_cbfn_t rtn); + + -- cgit v1.2.3 From 97c1b145231730e62dd71921ec653315a1da3aad Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 19 Mar 2009 15:02:39 +0000 Subject: [ARM] S3C: Move DMA channel management code to plat-s3c Change the name of S3C2410_DMA_CHANNELS to S3C_DMA_CHANNELS in the process. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Kconfig | 7 +++ arch/arm/plat-s3c/Makefile | 4 ++ arch/arm/plat-s3c/dma.c | 86 +++++++++++++++++++++++++++++++ arch/arm/plat-s3c/include/plat/dma-core.h | 22 ++++++++ 4 files changed, 119 insertions(+) create mode 100644 arch/arm/plat-s3c/dma.c create mode 100644 arch/arm/plat-s3c/include/plat/dma-core.h (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index de9383814e5..d4fc89fc5f4 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -150,6 +150,13 @@ config S3C_GPIO_CFG_S3C64XX Internal configuration to enable S3C64XX style GPIO configuration functions. +# DMA + +config S3C_DMA + bool + help + Internal configuration for S3C DMA core + # device definitions to compile in config S3C_DEV_HSMMC diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index 8d7815d25a5..e8b23fc8fba 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile @@ -18,6 +18,10 @@ obj-y += pwm-clock.o obj-y += gpio.o obj-y += gpio-config.o +# DMA support + +obj-$(CONFIG_S3C_DMA) += dma.o + # PM support obj-$(CONFIG_PM) += pm.o diff --git a/arch/arm/plat-s3c/dma.c b/arch/arm/plat-s3c/dma.c new file mode 100644 index 00000000000..c9db75c06af --- /dev/null +++ b/arch/arm/plat-s3c/dma.c @@ -0,0 +1,86 @@ +/* linux/arch/arm/plat-s3c/dma.c + * + * Copyright (c) 2003-2005,2006,2009 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C DMA core + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +struct s3c2410_dma_buf; + +#include +#include +#include + +#include +#include + +#include + +/* dma channel state information */ +struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; +struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; + +/* s3c_dma_lookup_channel + * + * change the dma channel number given into a real dma channel id +*/ + +struct s3c2410_dma_chan *s3c_dma_lookup_channel(unsigned int channel) +{ + if (channel & DMACH_LOW_LEVEL) + return &s3c2410_chans[channel & ~DMACH_LOW_LEVEL]; + else + return s3c_dma_chan_map[channel]; +} + +/* do we need to protect the settings of the fields from + * irq? +*/ + +int s3c2410_dma_set_opfn(unsigned int channel, s3c2410_dma_opfn_t rtn) +{ + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); + + if (chan == NULL) + return -EINVAL; + + pr_debug("%s: chan=%p, op rtn=%p\n", __func__, chan, rtn); + + chan->op_fn = rtn; + + return 0; +} +EXPORT_SYMBOL(s3c2410_dma_set_opfn); + +int s3c2410_dma_set_buffdone_fn(unsigned int channel, s3c2410_dma_cbfn_t rtn) +{ + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); + + if (chan == NULL) + return -EINVAL; + + pr_debug("%s: chan=%p, callback rtn=%p\n", __func__, chan, rtn); + + chan->callback_fn = rtn; + + return 0; +} +EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); + +int s3c2410_dma_setflags(unsigned int channel, unsigned int flags) +{ + struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); + + if (chan == NULL) + return -EINVAL; + + chan->flags = flags; + return 0; +} +EXPORT_SYMBOL(s3c2410_dma_setflags); diff --git a/arch/arm/plat-s3c/include/plat/dma-core.h b/arch/arm/plat-s3c/include/plat/dma-core.h new file mode 100644 index 00000000000..32ff2a92cb3 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/dma-core.h @@ -0,0 +1,22 @@ +/* arch/arm/plat-s3c/include/plat/dma.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * Samsung S3C DMA core support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +extern struct s3c2410_dma_chan *s3c_dma_lookup_channel(unsigned int channel); + +extern struct s3c2410_dma_chan *s3c_dma_chan_map[]; + +/* the currently allocated channel information */ +extern struct s3c2410_dma_chan s3c2410_chans[]; + + -- cgit v1.2.3 From eca8655ffa1ffb23c8f6f1485c1315a3087c8f38 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 6 Mar 2009 19:49:48 +0000 Subject: [ARM] S3C: Add common USB OHCI device definition Add common definition for USB OHCI platform device, add a Kconfig to selectively compile it and add update all the users. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Kconfig | 5 +++++ arch/arm/plat-s3c/Makefile | 1 + arch/arm/plat-s3c/dev-usb.c | 50 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 56 insertions(+) create mode 100644 arch/arm/plat-s3c/dev-usb.c (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index de9383814e5..042d34a6f81 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -172,4 +172,9 @@ config S3C_DEV_FB help Compile in platform device definition for framebuffer +config S3C_DEV_USB_HOST + bool + help + Compile in platform device definition for USB host. + endif diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index 8d7815d25a5..aa995a49e56 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile @@ -30,3 +30,4 @@ obj-$(CONFIG_S3C_DEV_HSMMC1) += dev-hsmmc1.o obj-y += dev-i2c0.o obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o +obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-s3c/dev-usb.c new file mode 100644 index 00000000000..a997d952816 --- /dev/null +++ b/arch/arm/plat-s3c/dev-usb.c @@ -0,0 +1,50 @@ +/* linux/arch/arm/plat-s3c/dev-usb.c + * + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C series device definition for USB host + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include + +#include +#include + +#include + + +static struct resource s3c_usb_resource[] = { + [0] = { + .start = S3C24XX_PA_USBHOST, + .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_USBH, + .end = IRQ_USBH, + .flags = IORESOURCE_IRQ, + } +}; + +static u64 s3c_device_usb_dmamask = 0xffffffffUL; + +struct platform_device s3c_device_usb = { + .name = "s3c2410-ohci", + .id = -1, + .num_resources = ARRAY_SIZE(s3c_usb_resource), + .resource = s3c_usb_resource, + .dev = { + .dma_mask = &s3c_device_usb_dmamask, + .coherent_dma_mask = 0xffffffffUL + } +}; + +EXPORT_SYMBOL(s3c_device_usb); -- cgit v1.2.3 From e6a2a9ce69400a8109e01030aec0d5e1e2bc73c2 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 6 Mar 2009 19:51:50 +0000 Subject: [ARM] S3C: Rename S3C24XX_PA_USBHOST to S3C_PA_USBHOST The USB host base address is available on both the S3C24XX and S3C64XX ranges. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/dev-usb.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/dev-usb.c b/arch/arm/plat-s3c/dev-usb.c index a997d952816..2ee85abed6d 100644 --- a/arch/arm/plat-s3c/dev-usb.c +++ b/arch/arm/plat-s3c/dev-usb.c @@ -23,8 +23,8 @@ static struct resource s3c_usb_resource[] = { [0] = { - .start = S3C24XX_PA_USBHOST, - .end = S3C24XX_PA_USBHOST + S3C24XX_SZ_USBHOST - 1, + .start = S3C_PA_USBHOST, + .end = S3C_PA_USBHOST + 0x100 - 1, .flags = IORESOURCE_MEM, }, [1] = { -- cgit v1.2.3 From 57699e9adf1b44f281d808609b47816804763bfa Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:23 +0000 Subject: [ARM] S3C: Add debug to UART save and a per-arch callback pre-restore Add a simple debug message on saving the UART state and add a per-arch pre-restore function to be used by the s3c64xx restore code to ensure the UARTs control registers do not go through any illegal state changes. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/pm.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index 061182ca66e..de4c4aa2246 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c @@ -83,6 +83,9 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) save->ufcon = __raw_readl(regs + S3C2410_UFCON); save->umcon = __raw_readl(regs + S3C2410_UMCON); save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); + + S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n", + uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); } static void s3c_pm_save_uarts(void) @@ -98,6 +101,8 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) { void __iomem *regs = S3C_VA_UARTx(uart); + s3c_pm_arch_update_uart(regs, save); + __raw_writel(save->ulcon, regs + S3C2410_ULCON); __raw_writel(save->ucon, regs + S3C2410_UCON); __raw_writel(save->ufcon, regs + S3C2410_UFCON); -- cgit v1.2.3 From 4b637dc231a96a151ea70c27d86b35c7891e2a7c Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:24 +0000 Subject: [ARM] S3C: PM save UART UDIVSLOT if doing PM Add the facility to save the UART UDIVSLOT register if the UART state is being saved over suspend. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/pm.h | 3 +++ arch/arm/plat-s3c/pm.c | 8 ++++++++ 2 files changed, 11 insertions(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-s3c/include/plat/pm.h index 3779775133a..5f8707e2a09 100644 --- a/arch/arm/plat-s3c/include/plat/pm.h +++ b/arch/arm/plat-s3c/include/plat/pm.h @@ -44,6 +44,8 @@ extern void (*pm_cpu_sleep)(void); extern unsigned long s3c_pm_flags; +extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ + /* from sleep.S */ extern int s3c_cpu_save(unsigned long *saveblk); @@ -88,6 +90,7 @@ struct pm_uart_save { u32 ufcon; u32 umcon; u32 ubrdiv; + u32 udivslot; }; /* helper functions to save/restore lists of registers. */ diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index de4c4aa2246..9957b539600 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c @@ -70,6 +70,8 @@ static inline void s3c_pm_debug_init(void) /* Save the UART configurations if we are configured for debug. */ +unsigned char pm_uart_udivslot; + #ifdef CONFIG_S3C2410_PM_DEBUG struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; @@ -84,6 +86,9 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) save->umcon = __raw_readl(regs + S3C2410_UMCON); save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); + if (pm_uart_udivslot) + save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); + S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n", uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); } @@ -108,6 +113,9 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) __raw_writel(save->ufcon, regs + S3C2410_UFCON); __raw_writel(save->umcon, regs + S3C2410_UMCON); __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV); + + if (pm_uart_udivslot) + __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); } static void s3c_pm_restore_uarts(void) -- cgit v1.2.3 From bd117bd161ea99826494983aef8c8e236ac129bd Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 10 Mar 2009 18:19:35 +0000 Subject: [ARM] S3C64XX: Initial support for PM (suspend to RAM) Add the initial support for the S3C64XX based systems to use suspend-to-RAM to sleep. Includes basic debugging for use with the SMDK6410 usign the LEDs on the baseboard. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Kconfig | 9 +++++++++ arch/arm/plat-s3c/include/plat/pm.h | 12 ++++++++++++ arch/arm/plat-s3c/pm.c | 6 ++++-- 3 files changed, 25 insertions(+), 2 deletions(-) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index 042d34a6f81..a4c5027421d 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -71,6 +71,15 @@ config S3C2410_PM_DEBUG Resume code. See for more information. +config S3C_PM_DEBUG_LED_SMDK + bool "SMDK LED suspend/resume debugging" + depends on PM && (MACH_SMDK6410) + help + Say Y here to enable the use of the SMDK LEDs on the baseboard + for debugging of the state of the suspend and resume process. + + Note, this currently only works for S3C64XX based SMDK boards. + config S3C2410_PM_CHECK bool "S3C2410 PM Suspend Memory CRC" depends on PM && CRC32 diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-s3c/include/plat/pm.h index 5f8707e2a09..7a797192fcf 100644 --- a/arch/arm/plat-s3c/include/plat/pm.h +++ b/arch/arm/plat-s3c/include/plat/pm.h @@ -127,6 +127,18 @@ extern void s3c_pm_dbg(const char *msg, ...); #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) #endif +#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK +/** + * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs + * @set: set bits for the state of the LEDs + * @clear: clear bits for the state of the LEDs. + */ +extern void s3c_pm_debug_smdkled(u32 set, u32 clear); + +#else +static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } +#endif /* CONFIG_S3C_PM_DEBUG_LED_SMDK */ + /* suspend memory checking */ #ifdef CONFIG_S3C2410_PM_CHECK diff --git a/arch/arm/plat-s3c/pm.c b/arch/arm/plat-s3c/pm.c index 9957b539600..8d97db2c7a0 100644 --- a/arch/arm/plat-s3c/pm.c +++ b/arch/arm/plat-s3c/pm.c @@ -21,11 +21,10 @@ #include #include +#include #include #include -#include -#include #include #include @@ -326,6 +325,9 @@ static int s3c_pm_enter(suspend_state_t state) S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); + /* LEDs should now be 1110 */ + s3c_pm_debug_smdkled(1 << 1, 0); + s3c_pm_check_restore(); /* ok, let's return from sleep */ -- cgit v1.2.3 From 0abfe9aab1867abd96b44a425ad27ce021891e4f Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:28 +0000 Subject: [ARM] S3C64XX: Add s3c6410_sysclass export Add definition for s3c6410_sysclass which was missing from arch/arm/plat-s3c/include/plat/cpu.h. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index e62ae0fcfe5..f878cf6673c 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h @@ -69,3 +69,4 @@ extern struct sysdev_class s3c2412_sysclass; extern struct sysdev_class s3c2440_sysclass; extern struct sysdev_class s3c2442_sysclass; extern struct sysdev_class s3c2443_sysclass; +extern struct sysdev_class s3c6410_sysclass; -- cgit v1.2.3 From 1deb507dc7612e6c81b7953e827d1c859c1d8c0b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:31 +0000 Subject: [ARM] S3C64XX: Add generic s3c64xx sys device. Add an s3c64xx_sysclass and device for items that currently want to bind to any s3c64xx processor. The first user of this will be parts of the s3c64xx suspend support which need to save device state over suspend/resume. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/cpu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/cpu.h b/arch/arm/plat-s3c/include/plat/cpu.h index f878cf6673c..be541cbba07 100644 --- a/arch/arm/plat-s3c/include/plat/cpu.h +++ b/arch/arm/plat-s3c/include/plat/cpu.h @@ -70,3 +70,5 @@ extern struct sysdev_class s3c2440_sysclass; extern struct sysdev_class s3c2442_sysclass; extern struct sysdev_class s3c2443_sysclass; extern struct sysdev_class s3c6410_sysclass; +extern struct sysdev_class s3c64xx_sysclass; + -- cgit v1.2.3 From 966bcc14386000e8b4dc7bbb426910bcb55a8588 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:32 +0000 Subject: [ARM] S3C64XX: Add IRQ PM code Add support for saving the state of the IRQ registers over suspend. This requires moving the S3C64XX UART registers into and adding irq-pm.c which saves the state of all the IRQ registers. The irq-pm.c saves all the IRQ registers, including the IRQ_EINT and IRQ_EINT_GROUP registers as it was easier than adding three different files. Also ensuring that all the registers are restored to the same state as before suspend is considered to be the best thing to do. Note, we do not suspend the VIC here, this is done by the VIC driver itself. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/regs-serial.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/regs-serial.h b/arch/arm/plat-s3c/include/plat/regs-serial.h index 487d7d2a7e1..66af75a5cdd 100644 --- a/arch/arm/plat-s3c/include/plat/regs-serial.h +++ b/arch/arm/plat-s3c/include/plat/regs-serial.h @@ -189,6 +189,11 @@ #define S3C2443_DIVSLOT (0x2C) +/* S3C64XX interrupt registers. */ +#define S3C64XX_UINTP 0x30 +#define S3C64XX_UINTSP 0x34 +#define S3C64XX_UINTM 0x38 + #ifndef __ASSEMBLY__ /* struct s3c24xx_uart_clksrc -- cgit v1.2.3 From d87964c46005ccb04754f6309df0fd8f67b08c6d Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:30 +0000 Subject: [ARM] S3C: GPIO PM core GPIOlib integration Move the GPIO suspend/resume support inline with the gpiolib support so that it will work with both the S3C24XX and S3C64XX series. The s3c_gpio_chip is extended to have a pm callback and a save block to keep the state of the GPIO over suspend, and the code from the s3c24xx implementation is added to a new common file. The suspend process now uses the list of registered chips to go through saving and restoring each one as appropriate, using the pm callback to select the appropriate routine depending on the type of control register present. This change also means that any additional GPIO added should not require changes to the PM. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Makefile | 1 + arch/arm/plat-s3c/gpio.c | 11 +- arch/arm/plat-s3c/include/plat/gpio-core.h | 30 +++ arch/arm/plat-s3c/pm-gpio.c | 380 +++++++++++++++++++++++++++++ 4 files changed, 421 insertions(+), 1 deletion(-) create mode 100644 arch/arm/plat-s3c/pm-gpio.c (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index aa995a49e56..bfc8f537db1 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile @@ -21,6 +21,7 @@ obj-y += gpio-config.o # PM support obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_PM) += pm-gpio.o obj-$(CONFIG_S3C2410_PM_CHECK) += pm-check.o # devices diff --git a/arch/arm/plat-s3c/gpio.c b/arch/arm/plat-s3c/gpio.c index d71dd6d9ce5..260fdc6ad68 100644 --- a/arch/arm/plat-s3c/gpio.c +++ b/arch/arm/plat-s3c/gpio.c @@ -16,7 +16,7 @@ #include #include -#include +#include #ifdef CONFIG_S3C_GPIO_TRACK struct s3c_gpio_chip *s3c_gpios[S3C_GPIO_END]; @@ -140,6 +140,15 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip) if (!gc->get) gc->get = s3c_gpiolib_get; +#ifdef CONFIG_PM + if (chip->pm != NULL) { + if (!chip->pm->save || !chip->pm->resume) + printk(KERN_ERR "gpio: %s has missing PM functions\n", + gc->label); + } else + printk(KERN_ERR "gpio: %s has no PM function\n", gc->label); +#endif + /* gpiochip_add() prints own failure message on error. */ ret = gpiochip_add(gc); if (ret >= 0) diff --git a/arch/arm/plat-s3c/include/plat/gpio-core.h b/arch/arm/plat-s3c/include/plat/gpio-core.h index 2fc60a580ac..32af612767a 100644 --- a/arch/arm/plat-s3c/include/plat/gpio-core.h +++ b/arch/arm/plat-s3c/include/plat/gpio-core.h @@ -20,6 +20,18 @@ * specific code. */ +struct s3c_gpio_chip; + +/** + * struct s3c_gpio_pm - power management (suspend/resume) information + * @save: Routine to save the state of the GPIO block + * @resume: Routine to resume the GPIO block. + */ +struct s3c_gpio_pm { + void (*save)(struct s3c_gpio_chip *chip); + void (*resume)(struct s3c_gpio_chip *chip); +}; + struct s3c_gpio_cfg; /** @@ -27,6 +39,7 @@ struct s3c_gpio_cfg; * @chip: The chip structure to be exported via gpiolib. * @base: The base pointer to the gpio configuration registers. * @config: special function and pull-resistor control information. + * @pm_save: Save information for suspend/resume support. * * This wrapper provides the necessary information for the Samsung * specific gpios being registered with gpiolib. @@ -34,7 +47,11 @@ struct s3c_gpio_cfg; struct s3c_gpio_chip { struct gpio_chip chip; struct s3c_gpio_cfg *config; + struct s3c_gpio_pm *pm; void __iomem *base; +#ifdef CONFIG_PM + u32 pm_save[4]; +#endif }; static inline struct s3c_gpio_chip *to_s3c_gpio(struct gpio_chip *gpc) @@ -75,3 +92,16 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int chip) static inline void s3c_gpiolib_track(struct s3c_gpio_chip *chip) { } #endif + +#ifdef CONFIG_PM +extern struct s3c_gpio_pm s3c_gpio_pm_1bit; +extern struct s3c_gpio_pm s3c_gpio_pm_2bit; +extern struct s3c_gpio_pm s3c_gpio_pm_4bit; +#define __gpio_pm(x) x +#else +#define s3c_gpio_pm_1bit NULL +#define s3c_gpio_pm_2bit NULL +#define s3c_gpio_pm_4bit NULL +#define __gpio_pm(x) NULL + +#endif /* CONFIG_PM */ diff --git a/arch/arm/plat-s3c/pm-gpio.c b/arch/arm/plat-s3c/pm-gpio.c new file mode 100644 index 00000000000..cfd326a8b69 --- /dev/null +++ b/arch/arm/plat-s3c/pm-gpio.c @@ -0,0 +1,380 @@ + +/* linux/arch/arm/plat-s3c/pm-gpio.c + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C series GPIO PM code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include + +#include +#include + +/* PM GPIO helpers */ + +#define OFFS_CON (0x00) +#define OFFS_DAT (0x04) +#define OFFS_UP (0x08) + +static void s3c_gpio_pm_1bit_save(struct s3c_gpio_chip *chip) +{ + chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); + chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); +} + +static void s3c_gpio_pm_1bit_resume(struct s3c_gpio_chip *chip) +{ + void __iomem *base = chip->base; + u32 old_gpcon = __raw_readl(base + OFFS_CON); + u32 old_gpdat = __raw_readl(base + OFFS_DAT); + u32 gps_gpcon = chip->pm_save[0]; + u32 gps_gpdat = chip->pm_save[1]; + u32 gpcon; + + /* GPACON only has one bit per control / data and no PULLUPs. + * GPACON[x] = 0 => Output, 1 => SFN */ + + /* first set all SFN bits to SFN */ + + gpcon = old_gpcon | gps_gpcon; + __raw_writel(gpcon, base + OFFS_CON); + + /* now set all the other bits */ + + __raw_writel(gps_gpdat, base + OFFS_DAT); + __raw_writel(gps_gpcon, base + OFFS_CON); + + S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n", + chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); +} + +struct s3c_gpio_pm s3c_gpio_pm_1bit = { + .save = s3c_gpio_pm_1bit_save, + .resume = s3c_gpio_pm_1bit_resume, +}; + +static void s3c_gpio_pm_2bit_save(struct s3c_gpio_chip *chip) +{ + chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); + chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); + chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP); +} + +/* Test whether the given masked+shifted bits of an GPIO configuration + * are one of the SFN (special function) modes. */ + +static inline int is_sfn(unsigned long con) +{ + return con >= 2; +} + +/* Test if the given masked+shifted GPIO configuration is an input */ + +static inline int is_in(unsigned long con) +{ + return con == 0; +} + +/* Test if the given masked+shifted GPIO configuration is an output */ + +static inline int is_out(unsigned long con) +{ + return con == 1; +} + +/** + * s3c_gpio_pm_2bit_resume() - restore the given GPIO bank + * @chip: The chip information to resume. + * + * Restore one of the GPIO banks that was saved during suspend. This is + * not as simple as once thought, due to the possibility of glitches + * from the order that the CON and DAT registers are set in. + * + * The three states the pin can be are {IN,OUT,SFN} which gives us 9 + * combinations of changes to check. Three of these, if the pin stays + * in the same configuration can be discounted. This leaves us with + * the following: + * + * { IN => OUT } Change DAT first + * { IN => SFN } Change CON first + * { OUT => SFN } Change CON first, so new data will not glitch + * { OUT => IN } Change CON first, so new data will not glitch + * { SFN => IN } Change CON first + * { SFN => OUT } Change DAT first, so new data will not glitch [1] + * + * We do not currently deal with the UP registers as these control + * weak resistors, so a small delay in change should not need to bring + * these into the calculations. + * + * [1] this assumes that writing to a pin DAT whilst in SFN will set the + * state for when it is next output. + */ +static void s3c_gpio_pm_2bit_resume(struct s3c_gpio_chip *chip) +{ + void __iomem *base = chip->base; + u32 old_gpcon = __raw_readl(base + OFFS_CON); + u32 old_gpdat = __raw_readl(base + OFFS_DAT); + u32 gps_gpcon = chip->pm_save[0]; + u32 gps_gpdat = chip->pm_save[1]; + u32 gpcon, old, new, mask; + u32 change_mask = 0x0; + int nr; + + /* restore GPIO pull-up settings */ + __raw_writel(chip->pm_save[2], base + OFFS_UP); + + /* Create a change_mask of all the items that need to have + * their CON value changed before their DAT value, so that + * we minimise the work between the two settings. + */ + + for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { + old = (old_gpcon & mask) >> nr; + new = (gps_gpcon & mask) >> nr; + + /* If there is no change, then skip */ + + if (old == new) + continue; + + /* If both are special function, then skip */ + + if (is_sfn(old) && is_sfn(new)) + continue; + + /* Change is IN => OUT, do not change now */ + + if (is_in(old) && is_out(new)) + continue; + + /* Change is SFN => OUT, do not change now */ + + if (is_sfn(old) && is_out(new)) + continue; + + /* We should now be at the case of IN=>SFN, + * OUT=>SFN, OUT=>IN, SFN=>IN. */ + + change_mask |= mask; + } + + + /* Write the new CON settings */ + + gpcon = old_gpcon & ~change_mask; + gpcon |= gps_gpcon & change_mask; + + __raw_writel(gpcon, base + OFFS_CON); + + /* Now change any items that require DAT,CON */ + + __raw_writel(gps_gpdat, base + OFFS_DAT); + __raw_writel(gps_gpcon, base + OFFS_CON); + + S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n", + chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); +} + +struct s3c_gpio_pm s3c_gpio_pm_2bit = { + .save = s3c_gpio_pm_2bit_save, + .resume = s3c_gpio_pm_2bit_resume, +}; + +#ifdef CONFIG_ARCH_S3C64XX +static void s3c_gpio_pm_4bit_save(struct s3c_gpio_chip *chip) +{ + chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); + chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); + chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP); + + if (chip->chip.ngpio > 8) + chip->pm_save[0] = __raw_readl(chip->base - 4); +} + +static u32 s3c_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon) +{ + u32 old, new, mask; + u32 change_mask = 0x0; + int nr; + + for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) { + old = (old_gpcon & mask) >> nr; + new = (gps_gpcon & mask) >> nr; + + /* If there is no change, then skip */ + + if (old == new) + continue; + + /* If both are special function, then skip */ + + if (is_sfn(old) && is_sfn(new)) + continue; + + /* Change is IN => OUT, do not change now */ + + if (is_in(old) && is_out(new)) + continue; + + /* Change is SFN => OUT, do not change now */ + + if (is_sfn(old) && is_out(new)) + continue; + + /* We should now be at the case of IN=>SFN, + * OUT=>SFN, OUT=>IN, SFN=>IN. */ + + change_mask |= mask; + } + + return change_mask; +} + +static void s3c_gpio_pm_4bit_con(struct s3c_gpio_chip *chip, int index) +{ + void __iomem *con = chip->base + (index * 4); + u32 old_gpcon = __raw_readl(con); + u32 gps_gpcon = chip->pm_save[index + 1]; + u32 gpcon, mask; + + mask = s3c_gpio_pm_4bit_mask(old_gpcon, gps_gpcon); + + gpcon = old_gpcon & ~mask; + gpcon |= gps_gpcon & mask; + + __raw_writel(gpcon, con); +} + +static void s3c_gpio_pm_4bit_resume(struct s3c_gpio_chip *chip) +{ + void __iomem *base = chip->base; + u32 old_gpcon[2]; + u32 old_gpdat = __raw_readl(base + OFFS_DAT); + u32 gps_gpdat = chip->pm_save[2]; + + /* First, modify the CON settings */ + + old_gpcon[0] = 0; + old_gpcon[1] = __raw_readl(base + OFFS_CON); + + s3c_gpio_pm_4bit_con(chip, 0); + if (chip->chip.ngpio > 8) { + old_gpcon[0] = __raw_readl(base - 4); + s3c_gpio_pm_4bit_con(chip, -1); + } + + /* Now change the configurations that require DAT,CON */ + + __raw_writel(chip->pm_save[2], base + OFFS_DAT); + __raw_writel(chip->pm_save[1], base + OFFS_CON); + if (chip->chip.ngpio > 8) + __raw_writel(chip->pm_save[0], base - 4); + + __raw_writel(chip->pm_save[2], base + OFFS_DAT); + __raw_writel(chip->pm_save[3], base + OFFS_UP); + + if (chip->chip.ngpio > 8) { + S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n", + chip->chip.label, old_gpcon[0], old_gpcon[1], + __raw_readl(base - 4), + __raw_readl(base + OFFS_CON), + old_gpdat, gps_gpdat); + } else + S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n", + chip->chip.label, old_gpcon[1], + __raw_readl(base + OFFS_CON), + old_gpdat, gps_gpdat); +} + +struct s3c_gpio_pm s3c_gpio_pm_4bit = { + .save = s3c_gpio_pm_4bit_save, + .resume = s3c_gpio_pm_4bit_resume, +}; +#endif /* CONFIG_ARCH_S3C64XX */ + +/** + * s3c_pm_save_gpio() - save gpio chip data for suspend + * @ourchip: The chip for suspend. + */ +static void s3c_pm_save_gpio(struct s3c_gpio_chip *ourchip) +{ + struct s3c_gpio_pm *pm = ourchip->pm; + + if (pm == NULL || pm->save == NULL) + S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); + else + pm->save(ourchip); +} + +/** + * s3c_pm_save_gpios() - Save the state of the GPIO banks. + * + * For all the GPIO banks, save the state of each one ready for going + * into a suspend mode. + */ +void s3c_pm_save_gpios(void) +{ + struct s3c_gpio_chip *ourchip; + unsigned int gpio_nr; + + for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { + ourchip = s3c_gpiolib_getchip(gpio_nr); + if (!ourchip) + continue; + + s3c_pm_save_gpio(ourchip); + + S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n", + ourchip->chip.label, + ourchip->pm_save[0], + ourchip->pm_save[1], + ourchip->pm_save[2], + ourchip->pm_save[3]); + + gpio_nr += ourchip->chip.ngpio; + gpio_nr += CONFIG_S3C_GPIO_SPACE; + } +} + +/** + * s3c_pm_resume_gpio() - restore gpio chip data after suspend + * @ourchip: The suspended chip. + */ +static void s3c_pm_resume_gpio(struct s3c_gpio_chip *ourchip) +{ + struct s3c_gpio_pm *pm = ourchip->pm; + + if (pm == NULL || pm->resume == NULL) + S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); + else + pm->resume(ourchip); +} + +void s3c_pm_restore_gpios(void) +{ + struct s3c_gpio_chip *ourchip; + unsigned int gpio_nr; + + for (gpio_nr = 0; gpio_nr < S3C_GPIO_END; gpio_nr++) { + ourchip = s3c_gpiolib_getchip(gpio_nr); + if (!ourchip) + continue; + + s3c_pm_resume_gpio(ourchip); + + gpio_nr += ourchip->chip.ngpio; + gpio_nr += CONFIG_S3C_GPIO_SPACE; + } +} -- cgit v1.2.3 From 4faf6867638cc21aa43b4ca4ed0bdf14a2d29762 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 25 Mar 2009 11:01:24 +0000 Subject: [ARM] S3C64XX: Add S3C6400 SDHCI setup support Add support for S3C6400 SDHCI channels 0 and 1, making the GPIO code common to both S3C6400 and S3C6410. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/sdhci.h | 50 ++++++++++++++++++++++++++++++---- 1 file changed, 45 insertions(+), 5 deletions(-) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/sdhci.h b/arch/arm/plat-s3c/include/plat/sdhci.h index c4ca3920ca4..f615308ccdf 100644 --- a/arch/arm/plat-s3c/include/plat/sdhci.h +++ b/arch/arm/plat-s3c/include/plat/sdhci.h @@ -67,12 +67,52 @@ extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; /* Helper function availablity */ +extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); +extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); + +/* S3C6400 SDHCI setup */ + +#ifdef CONFIG_S3C6400_SETUP_SDHCI +extern char *s3c6400_hsmmc_clksrcs[4]; + +#ifdef CONFIG_S3C_DEV_HSMMC +extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card); + +static inline void s3c6400_default_sdhci0(void) +{ + s3c_hsmmc0_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; + s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; +} + +#else +static inline void s3c6400_default_sdhci0(void) { } +#endif /* CONFIG_S3C_DEV_HSMMC */ + +#ifdef CONFIG_S3C_DEV_HSMMC1 +static inline void s3c6400_default_sdhci1(void) +{ + s3c_hsmmc1_def_platdata.clocks = s3c6400_hsmmc_clksrcs; + s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; + s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; +} +#else +static inline void s3c6400_default_sdhci1(void) { } +#endif /* CONFIG_S3C_DEV_HSMMC1 */ + +#else +static inline void s3c6400_default_sdhci0(void) { } +static inline void s3c6400_default_sdhci1(void) { } +#endif /* CONFIG_S3C6400_SETUP_SDHCI */ + +/* S3C6410 SDHCI setup */ + #ifdef CONFIG_S3C6410_SETUP_SDHCI extern char *s3c6410_hsmmc_clksrcs[4]; -extern void s3c6410_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s3c6410_setup_sdhci1_cfg_gpio(struct platform_device *, int w); - extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, void __iomem *r, struct mmc_ios *ios, @@ -82,7 +122,7 @@ extern void s3c6410_setup_sdhci0_cfg_card(struct platform_device *dev, static inline void s3c6410_default_sdhci0(void) { s3c_hsmmc0_def_platdata.clocks = s3c6410_hsmmc_clksrcs; - s3c_hsmmc0_def_platdata.cfg_gpio = s3c6410_setup_sdhci0_cfg_gpio; + s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; } #else @@ -93,7 +133,7 @@ static inline void s3c6410_default_sdhci0(void) { } static inline void s3c6410_default_sdhci1(void) { s3c_hsmmc1_def_platdata.clocks = s3c6410_hsmmc_clksrcs; - s3c_hsmmc1_def_platdata.cfg_gpio = s3c6410_setup_sdhci1_cfg_gpio; + s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci0_cfg_card; } #else -- cgit v1.2.3 From a03f7daf6df31b4d849031c51a3c10b8ba78ce67 Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Thu, 5 Mar 2009 11:43:13 +0800 Subject: [ARM] S3C64XX: Add HCLKx2 Add doubled HCLK to S3C64xx. Signed-off-by: Werner Almesberger Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/clock.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/clock.h b/arch/arm/plat-s3c/include/plat/clock.h index a10622eed43..d86af84b5b8 100644 --- a/arch/arm/plat-s3c/include/plat/clock.h +++ b/arch/arm/plat-s3c/include/plat/clock.h @@ -50,6 +50,7 @@ extern struct clk clk_xtal; extern struct clk clk_ext; /* S3C64XX specific clocks */ +extern struct clk clk_h2; extern struct clk clk_27m; extern struct clk clk_48m; -- cgit v1.2.3 From f0e1fa760099eef43f4450471d795807a1cc43c8 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sat, 16 May 2009 22:05:27 +0100 Subject: [ARM] S3C: Add USB high-speed/OtG device definitions Add platform device definitions for the high-speed and OtG capable device block on the newer Samsung parts. Signed-off-by: Ben Dooks Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/Kconfig | 5 ++++ arch/arm/plat-s3c/Makefile | 1 + arch/arm/plat-s3c/dev-usb-hsotg.c | 41 +++++++++++++++++++++++++++++++++ arch/arm/plat-s3c/include/plat/devs.h | 1 + arch/arm/plat-s3c/include/plat/udc-hs.h | 29 +++++++++++++++++++++++ 5 files changed, 77 insertions(+) create mode 100644 arch/arm/plat-s3c/dev-usb-hsotg.c create mode 100644 arch/arm/plat-s3c/include/plat/udc-hs.h (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig index a4c5027421d..140391587c3 100644 --- a/arch/arm/plat-s3c/Kconfig +++ b/arch/arm/plat-s3c/Kconfig @@ -186,4 +186,9 @@ config S3C_DEV_USB_HOST help Compile in platform device definition for USB host. +config S3C_DEV_USB_HSOTG + bool + help + Compile in platform device definition for USB high-speed OtG + endif diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile index bfc8f537db1..061e20458e8 100644 --- a/arch/arm/plat-s3c/Makefile +++ b/arch/arm/plat-s3c/Makefile @@ -32,3 +32,4 @@ obj-y += dev-i2c0.o obj-$(CONFIG_S3C_DEV_I2C1) += dev-i2c1.o obj-$(CONFIG_S3C_DEV_FB) += dev-fb.o obj-$(CONFIG_S3C_DEV_USB_HOST) += dev-usb.o +obj-$(CONFIG_S3C_DEV_USB_HSOTG) += dev-usb-hsotg.o diff --git a/arch/arm/plat-s3c/dev-usb-hsotg.c b/arch/arm/plat-s3c/dev-usb-hsotg.c new file mode 100644 index 00000000000..e2f604b51c8 --- /dev/null +++ b/arch/arm/plat-s3c/dev-usb-hsotg.c @@ -0,0 +1,41 @@ +/* linux/arch/arm/plat-s3c/dev-usb-hsotg.c + * + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C series device definition for USB high-speed UDC/OtG block + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include + +#include +#include + +#include + +static struct resource s3c_usb_hsotg_resources[] = { + [0] = { + .start = S3C_PA_USB_HSOTG, + .end = S3C_PA_USB_HSOTG + 0x10000 - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = IRQ_OTG, + .end = IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +struct platform_device s3c_device_usb_hsotg = { + .name = "s3c-hsotg", + .id = -1, + .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), + .resource = s3c_usb_hsotg_resources, +}; diff --git a/arch/arm/plat-s3c/include/plat/devs.h b/arch/arm/plat-s3c/include/plat/devs.h index 26f0cec3ac0..a0b6768fddc 100644 --- a/arch/arm/plat-s3c/include/plat/devs.h +++ b/arch/arm/plat-s3c/include/plat/devs.h @@ -45,6 +45,7 @@ extern struct platform_device s3c_device_spi1; extern struct platform_device s3c_device_nand; extern struct platform_device s3c_device_usbgadget; +extern struct platform_device s3c_device_usb_hsotg; /* s3c2440 specific devices */ diff --git a/arch/arm/plat-s3c/include/plat/udc-hs.h b/arch/arm/plat-s3c/include/plat/udc-hs.h new file mode 100644 index 00000000000..dd04db04310 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/udc-hs.h @@ -0,0 +1,29 @@ +/* arch/arm/plat-s3c/include/plat/udc-hs.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * S3C USB2.0 High-speed / OtG platform information + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +enum s3c_hostg_dmamode { + S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */ + S3C_HSOTG_DMA_ONLY, /* always use DMA */ + S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ +}; + +/** + * struct s3c_hsotg_plat - platform data for high-speed otg/udc + * @dma: Whether to use DMA or not. + * @is_osc: The clock source is an oscillator, not a crystal + */ +struct s3c_hsotg_plat { + enum s3c_hostg_dmamode dma; + unsigned int is_osc : 1; +}; -- cgit v1.2.3 From b57f0fe10712026d15a9d5a20e31f240ee72ec15 Mon Sep 17 00:00:00 2001 From: Nelson Castillo Date: Fri, 8 May 2009 08:10:04 -0500 Subject: [ARM] S3C: ADC: Fix lines with more than 80 chars in adc.h Small cleanup. Signed-off-by: Nelson Castillo [ben-linux@fluff.org: rewrote subject] Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/adc.h | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h index 43df2a404b0..ef92e50ac0a 100644 --- a/arch/arm/plat-s3c/include/plat/adc.h +++ b/arch/arm/plat-s3c/include/plat/adc.h @@ -19,10 +19,11 @@ struct s3c_adc_client; extern int s3c_adc_start(struct s3c_adc_client *client, unsigned int channel, unsigned int nr_samples); -extern struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, - void (*select)(unsigned selected), - void (*conv)(unsigned d0, unsigned d1), - unsigned int is_ts); +extern struct s3c_adc_client * + s3c_adc_register(struct platform_device *pdev, + void (*select)(unsigned selected), + void (*conv)(unsigned d0, unsigned d1), + unsigned int is_ts); extern void s3c_adc_release(struct s3c_adc_client *client); -- cgit v1.2.3 From 3f7ea467be1bad860c0f71ba7373dd3cf76b485a Mon Sep 17 00:00:00 2001 From: Nelson Castillo Date: Fri, 8 May 2009 08:10:12 -0500 Subject: [ARM] S3C: ADC: Expose number of remaining conversions to convert callback This patch allow us to efficiently modify the number of remaining conversions from the client side. This us useful when we do not know in advance how many conversions we will need or when we need to cancel pending conversions. This change is simple enough to be compatible with existing code that can just define the new pointer in the callback and ignore it. Sample usage: http://tinyurl.com/s3c2410-ts-c (function stylus_adc_action). Signed-off-by: Nelson Castillo Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/adc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/adc.h b/arch/arm/plat-s3c/include/plat/adc.h index ef92e50ac0a..d847bd476b6 100644 --- a/arch/arm/plat-s3c/include/plat/adc.h +++ b/arch/arm/plat-s3c/include/plat/adc.h @@ -22,7 +22,8 @@ extern int s3c_adc_start(struct s3c_adc_client *client, extern struct s3c_adc_client * s3c_adc_register(struct platform_device *pdev, void (*select)(unsigned selected), - void (*conv)(unsigned d0, unsigned d1), + void (*conv)(unsigned d0, unsigned d1, + unsigned *samples_left), unsigned int is_ts); extern void s3c_adc_release(struct s3c_adc_client *client); -- cgit v1.2.3 From 3cba5ef862bc2c2a0cf2841d993bfb99b9a6c476 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 May 2009 23:30:45 +0100 Subject: [ARM] S3C: Move watchdog system reset to own file. Move the watchdog reset code from to a new file as this code is needed by both s3c2410, s3c64xx and soon-to-be added s3c24a0. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/watchdog-reset.h | 48 +++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 arch/arm/plat-s3c/include/plat/watchdog-reset.h (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-s3c/include/plat/watchdog-reset.h new file mode 100644 index 00000000000..277506aa0d5 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/watchdog-reset.h @@ -0,0 +1,48 @@ +/* arch/arm/plat-s3c/include/plat/watchdog-reset.h + * + * Copyright (c) 2008 Simtec Electronics + * Ben Dooks + * + * S3C2410 - System define for arch_reset() function + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include + +#include +#include +#include + +static inline void arch_wdt_reset(void) +{ + struct clk *wdtclk; + + printk("arch_reset: attempting watchdog reset\n"); + + __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ + + wdtclk = clk_get(NULL, "watchdog"); + if (!IS_ERR(wdtclk)) { + clk_enable(wdtclk); + } else + printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); + + /* put initial values into count and data */ + __raw_writel(0x80, S3C2410_WTCNT); + __raw_writel(0x80, S3C2410_WTDAT); + + /* set the watchdog to go and reset... */ + __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN | + S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON); + + /* wait for reset to assert... */ + mdelay(500); + + printk(KERN_ERR "Watchdog reset failed to assert reset\n"); + + /* delay to allow the serial port to show the message */ + mdelay(50); +} -- cgit v1.2.3 From 543899f610799426babb5313682fd9c249e34677 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 17 May 2009 23:40:30 +0100 Subject: [ARM] S3C64XX: Use common watchdog reset for system reset. Use the newly moved to perform the arch_reset() call which has been unimplemented for a while. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c/include/plat/watchdog-reset.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/plat-s3c') diff --git a/arch/arm/plat-s3c/include/plat/watchdog-reset.h b/arch/arm/plat-s3c/include/plat/watchdog-reset.h index 277506aa0d5..54b762acb5a 100644 --- a/arch/arm/plat-s3c/include/plat/watchdog-reset.h +++ b/arch/arm/plat-s3c/include/plat/watchdog-reset.h @@ -11,6 +11,7 @@ */ #include +#include #include #include -- cgit v1.2.3