From 606576ce816603d9fe1fb453a88bc6eea16ca709 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Mon, 6 Oct 2008 19:06:12 -0400 Subject: ftrace: rename FTRACE to FUNCTION_TRACER Due to confusion between the ftrace infrastructure and the gcc profiling tracer "ftrace", this patch renames the config options from FTRACE to FUNCTION_TRACER. The other two names that are offspring from FTRACE DYNAMIC_FTRACE and FTRACE_MCOUNT_RECORD will stay the same. This patch was generated mostly by script, and partially by hand. Signed-off-by: Steven Rostedt Signed-off-by: Ingo Molnar --- arch/arm/Kconfig | 4 ++-- arch/arm/boot/compressed/Makefile | 2 +- arch/arm/include/asm/ftrace.h | 2 +- arch/arm/kernel/armksyms.c | 2 +- arch/arm/kernel/entry-common.S | 4 ++-- 5 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4853f9df37b..c2f18ea4050 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -16,8 +16,8 @@ config ARM select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) select HAVE_KRETPROBES if (HAVE_KPROBES) - select HAVE_FTRACE if (!XIP_KERNEL) - select HAVE_DYNAMIC_FTRACE if (HAVE_FTRACE) + select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) + select HAVE_DYNAMIC_FTRACE if (HAVE_FUNCTION_TRACER) select HAVE_GENERIC_DMA_COHERENT help The ARM series is a line of low-power-consumption RISC chip designs diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 7a03f200788..c47f2a3f8f8 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile @@ -70,7 +70,7 @@ SEDFLAGS = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/ targets := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \ head.o misc.o $(OBJS) -ifeq ($(CONFIG_FTRACE),y) +ifeq ($(CONFIG_FUNCTION_TRACER),y) ORIG_CFLAGS := $(KBUILD_CFLAGS) KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS)) endif diff --git a/arch/arm/include/asm/ftrace.h b/arch/arm/include/asm/ftrace.h index 584ef9a8e5a..39c8bc1a006 100644 --- a/arch/arm/include/asm/ftrace.h +++ b/arch/arm/include/asm/ftrace.h @@ -1,7 +1,7 @@ #ifndef _ASM_ARM_FTRACE #define _ASM_ARM_FTRACE -#ifdef CONFIG_FTRACE +#ifdef CONFIG_FUNCTION_TRACER #define MCOUNT_ADDR ((long)(mcount)) #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 2357b1cf1cf..c74f766ffc1 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -183,6 +183,6 @@ EXPORT_SYMBOL(_find_next_bit_be); EXPORT_SYMBOL(copy_page); -#ifdef CONFIG_FTRACE +#ifdef CONFIG_FUNCTION_TRACER EXPORT_SYMBOL(mcount); #endif diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 3aa14dcc5ba..06269ea375c 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S @@ -101,7 +101,7 @@ ENDPROC(ret_from_fork) #undef CALL #define CALL(x) .long x -#ifdef CONFIG_FTRACE +#ifdef CONFIG_FUNCTION_TRACER #ifdef CONFIG_DYNAMIC_FTRACE ENTRY(mcount) stmdb sp!, {r0-r3, lr} @@ -149,7 +149,7 @@ trace: ftrace_stub: mov pc, lr -#endif /* CONFIG_FTRACE */ +#endif /* CONFIG_FUNCTION_TRACER */ /*============================================================================= * SWI handler -- cgit v1.2.3 From 07c4cc1cdaa08fcb6c0275dd7be49eae37260169 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Thu, 23 Oct 2008 09:33:04 -0400 Subject: ftrace: disable dynamic ftrace for all archs that use daemon The ftrace daemon is complex and can cause nasty races if something goes wrong. Since it affects all of the kernel, this patch disables dynamic ftrace from any arch that depends on the daemon. Until the archs are ported over to the new MCOUNT_RECORD method, I am disabling dynamic ftrace from them. Note: I am leaving in the arch//kernel/ftrace.c code alone since that can be used when the arch is ported to MCOUNT_RECORD. To port the arch to MCOUNT_RECORD, the scripts/recordmcount.pl needs to be updated. I will make that easier to do for 2.6.29. For 28, we will keep the archs disabled. Signed-off-by: Steven Rostedt Signed-off-by: Ingo Molnar --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 600733426ae..c5b431e231d 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -17,7 +17,6 @@ config ARM select HAVE_KPROBES if (!XIP_KERNEL) select HAVE_KRETPROBES if (HAVE_KPROBES) select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) - select HAVE_DYNAMIC_FTRACE if (HAVE_FUNCTION_TRACER) select HAVE_GENERIC_DMA_COHERENT help The ARM series is a line of low-power-consumption RISC chip designs -- cgit v1.2.3 From 4d296c24326783bff1282ac72f310d8bac8df413 Mon Sep 17 00:00:00 2001 From: Steven Rostedt Date: Thu, 23 Oct 2008 09:33:06 -0400 Subject: ftrace: remove mcount set The arch dependent function ftrace_mcount_set was only used by the daemon start up code. This patch removes it. Signed-off-by: Steven Rostedt Signed-off-by: Ingo Molnar --- arch/arm/kernel/ftrace.c | 13 ------------- 1 file changed, 13 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c index 76d50e6091b..6c90479e897 100644 --- a/arch/arm/kernel/ftrace.c +++ b/arch/arm/kernel/ftrace.c @@ -95,19 +95,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func) return ret; } -int ftrace_mcount_set(unsigned long *data) -{ - unsigned long pc, old; - unsigned long *addr = data; - unsigned char *new; - - pc = (unsigned long)&mcount_call; - memcpy(&old, &mcount_call, MCOUNT_INSN_SIZE); - new = ftrace_call_replace(pc, *addr); - *addr = ftrace_modify_code(pc, (unsigned char *)&old, new); - return 0; -} - /* run from kstop_machine */ int __init ftrace_dyn_arch_init(void *data) { -- cgit v1.2.3 From 6bee00dbbcb1e9feb0510e9a7104b4af00adc574 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Fri, 24 Oct 2008 10:21:45 -0700 Subject: [ARM] xsc3: revert writethrough memory-type encoding change Commit 40df2d1d "[ARM] Update Xscale and Xscale3 PTE mappings" was fingered by git-bisect for a boot failure on iop13xx. The change made L_PTE_MT_WRITETHROUGH mappings L2-uncacheable. Russell points out that this mapping is used for the vector page. Given the regression, and the fact this page is used often, restore the old behaviour. Signed-off-by: Dan Williams --- arch/arm/mm/proc-xsc3.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 04dc8b65401..8f6cf56c11c 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -349,7 +349,7 @@ ENTRY(cpu_xsc3_switch_mm) cpu_xsc3_mt_table: .long 0x00 @ L_PTE_MT_UNCACHED .long PTE_EXT_TEX(1) @ L_PTE_MT_BUFFERABLE - .long PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH + .long PTE_EXT_TEX(5) | PTE_CACHEABLE @ L_PTE_MT_WRITETHROUGH .long PTE_CACHEABLE | PTE_BUFFERABLE @ L_PTE_MT_WRITEBACK .long PTE_EXT_TEX(1) | PTE_BUFFERABLE @ L_PTE_MT_DEV_SHARED .long 0x00 @ unused -- cgit v1.2.3 From b6e642e498097e3d66e25ee9499f7719976263cf Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov <[dbaryshkov@gmail.com]> Date: Wed, 29 Oct 2008 11:40:46 +0800 Subject: [ARM] pxa/spitz: fix spi cs on spitz On spitz configure SPI CS GPIOs as outputs to unbreak spi chip selection. Signed-off-by: Dmitry Baryshkov Signed-off-by: Eric Miao --- arch/arm/mach-pxa/spitz.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 524f656dc56..f0a5bbae0b4 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -385,6 +385,16 @@ static void __init spitz_init_spi(void) if (err) goto err_free_2; + err = gpio_direction_output(SPITZ_GPIO_ADS7846_CS, 1); + if (err) + goto err_free_3; + err = gpio_direction_output(SPITZ_GPIO_LCDCON_CS, 1); + if (err) + goto err_free_3; + err = gpio_direction_output(SPITZ_GPIO_MAX1111_CS, 1); + if (err) + goto err_free_3; + if (machine_is_akita()) { spitz_lcdcon_info.gpio_backlight_cont = AKITA_GPIO_BACKLIGHT_CONT; spitz_lcdcon_info.gpio_backlight_on = AKITA_GPIO_BACKLIGHT_ON; @@ -394,6 +404,8 @@ static void __init spitz_init_spi(void) spi_register_board_info(ARRAY_AND_SIZE(spitz_spi_devices)); return; +err_free_3: + gpio_free(SPITZ_GPIO_MAX1111_CS); err_free_2: gpio_free(SPITZ_GPIO_LCDCON_CS); err_free_1: -- cgit v1.2.3 From 5cbff9603a77d01315859690a8f125f817bed73b Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 28 Oct 2008 20:26:40 +0300 Subject: [ARM] corgi_lcd: fix simultaneous compilation with corgi_bl corgi_lcd has symbol conflict with corgi_bl driver. Fix it by renaming common symbol in new corgi_lcd driver. Signed-off-by: Dmitry Baryshkov Signed-off-by: Eric Miao --- arch/arm/mach-pxa/corgi_pm.c | 4 +++- arch/arm/mach-pxa/include/mach/sharpsl.h | 1 + arch/arm/mach-pxa/spitz_pm.c | 4 +++- 3 files changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c index eb7d6c94aa4..e3525903281 100644 --- a/arch/arm/mach-pxa/corgi_pm.c +++ b/arch/arm/mach-pxa/corgi_pm.c @@ -204,7 +204,9 @@ static struct sharpsl_charger_machinfo corgi_pm_machinfo = { .read_devdata = corgipm_read_devdata, .charger_wakeup = corgi_charger_wakeup, .should_wakeup = corgi_should_wakeup, -#ifdef CONFIG_BACKLIGHT_CORGI +#if defined(CONFIG_LCD_CORGI) + .backlight_limit = corgi_lcd_limit_intensity, +#elif defined(CONFIG_BACKLIGHT_CORGI) .backlight_limit = corgibl_limit_intensity, #endif .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, diff --git a/arch/arm/mach-pxa/include/mach/sharpsl.h b/arch/arm/mach-pxa/include/mach/sharpsl.h index 3b1d4a72d4d..8242e14a44f 100644 --- a/arch/arm/mach-pxa/include/mach/sharpsl.h +++ b/arch/arm/mach-pxa/include/mach/sharpsl.h @@ -26,6 +26,7 @@ struct corgits_machinfo { * SharpSL Backlight */ extern void corgibl_limit_intensity(int limit); +extern void corgi_lcd_limit_intensity(int limit); /* diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c index 53018db106a..072e77cfe5a 100644 --- a/arch/arm/mach-pxa/spitz_pm.c +++ b/arch/arm/mach-pxa/spitz_pm.c @@ -198,7 +198,9 @@ struct sharpsl_charger_machinfo spitz_pm_machinfo = { .read_devdata = spitzpm_read_devdata, .charger_wakeup = spitz_charger_wakeup, .should_wakeup = spitz_should_wakeup, -#ifdef CONFIG_BACKLIGHT_CORGI +#if defined(CONFIG_LCD_CORGI) + .backlight_limit = corgi_lcd_limit_intensity, +#elif defined(CONFIG_BACKLIGHT_CORGI) .backlight_limit = corgibl_limit_intensity, #endif .charge_on_volt = SHARPSL_CHARGE_ON_VOLT, -- cgit v1.2.3 From 6c1249e588cbf0484fc3e6b0f0fc4a5892749b4d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 18 Sep 2008 15:48:23 +0200 Subject: [ARM] pcm037: map AIPS1 and AIPS2 as nonshared area The internal devices of the MX3 Processor have to be mapped MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur. Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/pcm037.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c index 11fda95c86a..843f68c8ead 100644 --- a/arch/arm/mach-mx3/pcm037.c +++ b/arch/arm/mach-mx3/pcm037.c @@ -91,12 +91,12 @@ static struct map_desc pcm037_io_desc[] __initdata = { .virtual = AIPS1_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), .length = AIPS1_SIZE, - .type = MT_DEVICE + .type = MT_DEVICE_NONSHARED }, { .virtual = AIPS2_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), .length = AIPS2_SIZE, - .type = MT_DEVICE + .type = MT_DEVICE_NONSHARED }, }; -- cgit v1.2.3 From 56e7d85cf982dda4b453c157f3f64aea1478bc4d Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Fri, 17 Oct 2008 02:34:41 +0400 Subject: [ARM] sharpsl_pm: fix compilation w/o CONFIG_PM Fix compilation of sharpsl_pm when CONFIG_PM in unselected. Signed-off-by: Dmitry Baryshkov Acked-by: Russell King Signed-off-by: Eric Miao --- arch/arm/common/sharpsl_pm.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/common/sharpsl_pm.c b/arch/arm/common/sharpsl_pm.c index db830916140..780bbf7cb26 100644 --- a/arch/arm/common/sharpsl_pm.c +++ b/arch/arm/common/sharpsl_pm.c @@ -54,11 +54,13 @@ /* * Prototypes */ +#ifdef CONFIG_PM static int sharpsl_off_charge_battery(void); -static int sharpsl_check_battery_temp(void); static int sharpsl_check_battery_voltage(void); -static int sharpsl_ac_check(void); static int sharpsl_fatal_check(void); +#endif +static int sharpsl_check_battery_temp(void); +static int sharpsl_ac_check(void); static int sharpsl_average_value(int ad); static void sharpsl_average_clear(void); static void sharpsl_charge_toggle(struct work_struct *private_); @@ -424,6 +426,7 @@ static int sharpsl_check_battery_temp(void) return 0; } +#ifdef CONFIG_PM static int sharpsl_check_battery_voltage(void) { int val, i, buff[5]; @@ -455,6 +458,7 @@ static int sharpsl_check_battery_voltage(void) return 0; } +#endif static int sharpsl_ac_check(void) { @@ -586,8 +590,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state) return 0; } -#endif - /* * Check for fatal battery errors @@ -738,7 +740,10 @@ static int sharpsl_off_charge_battery(void) } } } - +#else +#define sharpsl_pm_suspend NULL +#define sharpsl_pm_resume NULL +#endif static ssize_t battery_percentage_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -768,10 +773,12 @@ static void sharpsl_apm_get_power_status(struct apm_power_info *info) info->battery_life = sharpsl_pm.battstat.mainbat_percent; } +#ifdef CONFIG_PM static struct platform_suspend_ops sharpsl_pm_ops = { .enter = corgi_pxa_pm_enter, .valid = suspend_valid_only_mem, }; +#endif static int __init sharpsl_pm_probe(struct platform_device *pdev) { @@ -802,7 +809,9 @@ static int __init sharpsl_pm_probe(struct platform_device *pdev) apm_get_power_status = sharpsl_apm_get_power_status; +#ifdef CONFIG_PM suspend_set_ops(&sharpsl_pm_ops); +#endif mod_timer(&sharpsl_pm.ac_timer, jiffies + msecs_to_jiffies(250)); -- cgit v1.2.3 From 63890a0ee1af994122094bd01f87ea6251631a3f Mon Sep 17 00:00:00 2001 From: Matthias Kaehlcke Date: Wed, 29 Oct 2008 14:14:52 -0700 Subject: [ARM] ep93xx: fix OHCI DMA mask Signed-off-by: Matthias Kaehlcke Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-ep93xx/core.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index de53f0be71b..48345fb3461 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include @@ -449,12 +450,13 @@ static struct resource ep93xx_ohci_resources[] = { }, }; + static struct platform_device ep93xx_ohci_device = { .name = "ep93xx-ohci", .id = -1, .dev = { - .dma_mask = (void *)0xffffffff, - .coherent_dma_mask = 0xffffffff, + .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask, + .coherent_dma_mask = DMA_BIT_MASK(32), }, .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), .resource = ep93xx_ohci_resources, -- cgit v1.2.3 From 9c6568501cbf731a910db2fcb7d094977dcb154c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Date: Wed, 29 Oct 2008 14:14:54 -0700 Subject: [ARM] gpio_free might sleep, arm architecture MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to the documentation gpio_free should only be called from task context only. To make this more explicit add a might sleep to all implementations. This patch changes the gpio_free implementations for the arm architecture. DaVinci is skipped on purpose to simplify the merge process for patches switching it over to use gpiolib as per request by David Brownell. Signed-off-by: Uwe Kleine-König Cc: David Brownell Cc: Andrew Victor Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-at91/include/mach/gpio.h | 2 ++ arch/arm/mach-imx/include/mach/gpio.h | 3 +++ arch/arm/mach-ixp4xx/include/mach/gpio.h | 3 +++ arch/arm/mach-ks8695/include/mach/gpio.h | 3 +++ arch/arm/mach-ns9xxx/gpio.c | 2 ++ arch/arm/mach-orion5x/gpio.c | 2 ++ 6 files changed, 15 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/include/mach/gpio.h b/arch/arm/mach-at91/include/mach/gpio.h index 76d76e2fa69..bffa6741a75 100644 --- a/arch/arm/mach-at91/include/mach/gpio.h +++ b/arch/arm/mach-at91/include/mach/gpio.h @@ -13,6 +13,7 @@ #ifndef __ASM_ARCH_AT91RM9200_GPIO_H #define __ASM_ARCH_AT91RM9200_GPIO_H +#include #include #define PIN_BASE NR_AIC_IRQS @@ -220,6 +221,7 @@ static inline int gpio_request(unsigned gpio, const char *label) static inline void gpio_free(unsigned gpio) { + might_sleep(); } extern int gpio_direction_input(unsigned gpio); diff --git a/arch/arm/mach-imx/include/mach/gpio.h b/arch/arm/mach-imx/include/mach/gpio.h index 6e3d795f226..502d5aa2c09 100644 --- a/arch/arm/mach-imx/include/mach/gpio.h +++ b/arch/arm/mach-imx/include/mach/gpio.h @@ -1,5 +1,6 @@ #ifndef _IMX_GPIO_H +#include #include #define IMX_GPIO_ALLOC_MODE_NORMAL 0 @@ -63,6 +64,8 @@ static inline int gpio_request(unsigned gpio, const char *label) static inline void gpio_free(unsigned gpio) { + might_sleep(); + imx_gpio_free(gpio); } diff --git a/arch/arm/mach-ixp4xx/include/mach/gpio.h b/arch/arm/mach-ixp4xx/include/mach/gpio.h index 9fbde177920..cd5aec26c07 100644 --- a/arch/arm/mach-ixp4xx/include/mach/gpio.h +++ b/arch/arm/mach-ixp4xx/include/mach/gpio.h @@ -25,6 +25,7 @@ #ifndef __ASM_ARCH_IXP4XX_GPIO_H #define __ASM_ARCH_IXP4XX_GPIO_H +#include #include static inline int gpio_request(unsigned gpio, const char *label) @@ -34,6 +35,8 @@ static inline int gpio_request(unsigned gpio, const char *label) static inline void gpio_free(unsigned gpio) { + might_sleep(); + return; } diff --git a/arch/arm/mach-ks8695/include/mach/gpio.h b/arch/arm/mach-ks8695/include/mach/gpio.h index 73c84168761..d4af5c335f1 100644 --- a/arch/arm/mach-ks8695/include/mach/gpio.h +++ b/arch/arm/mach-ks8695/include/mach/gpio.h @@ -11,6 +11,8 @@ #ifndef __ASM_ARCH_GPIO_H_ #define __ASM_ARCH_GPIO_H_ +#include + #define KS8695_GPIO_0 0 #define KS8695_GPIO_1 1 #define KS8695_GPIO_2 2 @@ -74,6 +76,7 @@ static inline int gpio_request(unsigned int pin, const char *label) static inline void gpio_free(unsigned int pin) { + might_sleep(); } #endif diff --git a/arch/arm/mach-ns9xxx/gpio.c b/arch/arm/mach-ns9xxx/gpio.c index 5241e6a286c..5503ca09c4a 100644 --- a/arch/arm/mach-ns9xxx/gpio.c +++ b/arch/arm/mach-ns9xxx/gpio.c @@ -8,6 +8,7 @@ * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. */ +#include #include #include #include @@ -63,6 +64,7 @@ EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned gpio) { + might_sleep(); clear_bit(gpio, gpiores); return; } diff --git a/arch/arm/mach-orion5x/gpio.c b/arch/arm/mach-orion5x/gpio.c index fc419868e39..f99d08811e5 100644 --- a/arch/arm/mach-orion5x/gpio.c +++ b/arch/arm/mach-orion5x/gpio.c @@ -165,6 +165,8 @@ EXPORT_SYMBOL(gpio_request); void gpio_free(unsigned pin) { + might_sleep(); + if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { pr_debug("%s: invalid GPIO %d\n", __func__, pin); return; -- cgit v1.2.3 From eadefeff9c5572d82c2f5d907a0bfb3ba55ce901 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 15 Oct 2008 09:50:23 +0200 Subject: [ARM] MX3: Use ioremap wrapper to map SoC devices nonshared The internal devices of the MX3 Processor have to be mapped MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/include/mach/io.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/plat-mxc/include/mach/io.h b/arch/arm/plat-mxc/include/mach/io.h index 65b6810124c..5d4cb119644 100644 --- a/arch/arm/plat-mxc/include/mach/io.h +++ b/arch/arm/plat-mxc/include/mach/io.h @@ -14,6 +14,26 @@ /* Allow IO space to be anywhere in the memory */ #define IO_SPACE_LIMIT 0xffffffff +#ifdef CONFIG_ARCH_MX3 +#define __arch_ioremap __mx3_ioremap +#define __arch_iounmap __iounmap + +static inline void __iomem * +__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) +{ + if (mtype == MT_DEVICE) { + /* Access all peripherals below 0x80000000 as nonshared device + * but leave l2cc alone. + */ + if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) || + (phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE))) + mtype = MT_DEVICE_NONSHARED; + } + + return __arm_ioremap(phys_addr, size, mtype); +} +#endif + /* io address mapping macro */ #define __io(a) ((void __iomem *)(a)) -- cgit v1.2.3 From 5cac9d6558009d0fcdb7a0f38247ca578c8c685b Mon Sep 17 00:00:00 2001 From: Darius Augulis Date: Wed, 15 Oct 2008 10:38:30 +0200 Subject: [ARM] MXC: Fix mxc_gpio_get(), which must read PSR register instead DR. The Data register holds the value we have written to a gpio. To get the input value we must read the Pad Status Register MX3 (or Sample Status register in MX1/2 terms) Signed-off-by: Darius Augulis Signed-off-by: Sascha Hauer --- arch/arm/plat-mxc/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-mxc/gpio.c b/arch/arm/plat-mxc/gpio.c index 733e0acac91..de5c4747453 100644 --- a/arch/arm/plat-mxc/gpio.c +++ b/arch/arm/plat-mxc/gpio.c @@ -188,7 +188,7 @@ static int mxc_gpio_get(struct gpio_chip *chip, unsigned offset) struct mxc_gpio_port *port = container_of(chip, struct mxc_gpio_port, chip); - return (__raw_readl(port->base + GPIO_DR) >> offset) & 1; + return (__raw_readl(port->base + GPIO_PSR) >> offset) & 1; } static int mxc_gpio_direction_input(struct gpio_chip *chip, unsigned offset) -- cgit v1.2.3 From 2eca047b289307594d0d6ce62c8237fa9c5b9b5e Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 17 Oct 2008 16:10:38 +0200 Subject: [ARM] mx31ads: Add missing include mx31ads_defconfig compilation failed with arch/arm/mach-mx3/mx31ads.c: In function 'mxc_init_imx_uart': arch/arm/mach-mx3/mx31ads.c:102: error: 'mxc_uart_device0' undeclared (first use in this function) arch/arm/mach-mx3/mx31ads.c:102: error: (Each undeclared identifier is reported only once arch/arm/mach-mx3/mx31ads.c:102: error: for each function it appears in.) make[1]: *** [arch/arm/mach-mx3/mx31ads.o] Error 1 Add missing include Signed-off-by: Sascha Hauer --- arch/arm/mach-mx3/mx31ads.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c index 1be4a390c63..f902a7c37c3 100644 --- a/arch/arm/mach-mx3/mx31ads.c +++ b/arch/arm/mach-mx3/mx31ads.c @@ -35,6 +35,8 @@ #include #include +#include "devices.h" + /*! * @file mx31ads.c * -- cgit v1.2.3 From b73b925a6b9d69478c6ae4e74ef20607fd24aeaa Mon Sep 17 00:00:00 2001 From: Sergey Lapin Date: Mon, 27 Oct 2008 07:43:45 +0100 Subject: [ARM] 5326/1: AFEB9260: Fix for i2c_board_info structure i2c_board_info array was filled incorrectly. Due to circumstances, the way it is filled works. This patch fills array properly. Signed-off-by: Sergey Lapin Signed-off-by: Russell King --- arch/arm/mach-at91/board-afeb-9260v1.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-at91/board-afeb-9260v1.c b/arch/arm/mach-at91/board-afeb-9260v1.c index 9c040c78889..e263fda3e2d 100644 --- a/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/arch/arm/mach-at91/board-afeb-9260v1.c @@ -165,6 +165,7 @@ static struct at91_mmc_data __initdata afeb9260_mmc_data = { static struct i2c_board_info __initdata afeb9260_i2c_devices[] = { { I2C_BOARD_INFO("fm3130", 0x68), + }, { I2C_BOARD_INFO("24c64", 0x50), }, }; -- cgit v1.2.3 From d2ed5cb80a241518dd71f467c884bfabbe15f68c Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 2 Nov 2008 09:16:50 +0000 Subject: [ARM] fix VFP+softfloat binaries 2.6.28-rc tightened up the ELF architecture checks on ARM. For non-EABI it only allows VFP if the hardware supports it. However, the kernel fails to also inspect the soft-float flag, so it incorrectly rejects binaries using soft-VFP. The fix is simple: also check that EF_ARM_SOFT_FLOAT isn't set before rejecting VFP binaries on non-VFP hardware. Acked-by: Mikael Pettersson Signed-off-by: Russell King --- arch/arm/kernel/elf.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/elf.c b/arch/arm/kernel/elf.c index 513f332f040..84849098c8e 100644 --- a/arch/arm/kernel/elf.c +++ b/arch/arm/kernel/elf.c @@ -21,12 +21,16 @@ int elf_check_arch(const struct elf32_hdr *x) eflags = x->e_flags; if ((eflags & EF_ARM_EABI_MASK) == EF_ARM_EABI_UNKNOWN) { + unsigned int flt_fmt; + /* APCS26 is only allowed if the CPU supports it */ if ((eflags & EF_ARM_APCS_26) && !(elf_hwcap & HWCAP_26BIT)) return 0; + flt_fmt = eflags & (EF_ARM_VFP_FLOAT | EF_ARM_SOFT_FLOAT); + /* VFP requires the supporting code */ - if ((eflags & EF_ARM_VFP_FLOAT) && !(elf_hwcap & HWCAP_VFP)) + if (flt_fmt == EF_ARM_VFP_FLOAT && !(elf_hwcap & HWCAP_VFP)) return 0; } return 1; -- cgit v1.2.3 From 85d7a070264272ceffec0c7ce0e9af1e37c62b6e Mon Sep 17 00:00:00 2001 From: Sanjeev Premi Date: Tue, 4 Nov 2008 13:35:06 -0800 Subject: ARM: OMAP: Fix compiler warnings in gpmc.c Fix these compiler warnings: gpmc.c: In function 'gpmc_init': gpmc.c:432: warning: 'return' with a value, in function returning void gpmc.c:439: warning: 'return' with a value, in function returning void Signed-off-by: Sanjeev Premi Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 763bdbeaf68..2249049c1d5 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -429,18 +429,16 @@ void __init gpmc_init(void) gpmc_l3_clk = clk_get(NULL, ck); if (IS_ERR(gpmc_l3_clk)) { printk(KERN_ERR "Could not get GPMC clock %s\n", ck); - return -ENODEV; + BUG(); } gpmc_base = ioremap(l, SZ_4K); if (!gpmc_base) { clk_put(gpmc_l3_clk); printk(KERN_ERR "Could not get GPMC register memory\n"); - return -ENOMEM; + BUG(); } - BUG_ON(IS_ERR(gpmc_l3_clk)); - l = gpmc_read_reg(GPMC_REVISION); printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); /* Set smart idle mode and automatic L3 clock gating */ -- cgit v1.2.3 From e621f266d4cd18a07a833877c3995d2ccb35b951 Mon Sep 17 00:00:00 2001 From: Zhaolei Date: Tue, 4 Nov 2008 13:35:07 -0800 Subject: ARM: OMAP: Fix debugfs_create_*'s error checking method for arm/plat-omap debugfs_create_*() returns NULL if an error occurs, returns -ENODEV when debugfs is not enabled in the kernel. Comparing to PATCH v1, because clk_debugfs_init is included in "#if defined CONFIG_DEBUG_FS", we only need to check NULL return. Thanks Li Zefan debugfs_create_u8() and other function's return value's checking method are also fixed in this patch. Signed-off-by: Zhao Lei Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/clock.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c index bf6a10c5fc4..be6aab9c683 100644 --- a/arch/arm/plat-omap/clock.c +++ b/arch/arm/plat-omap/clock.c @@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c) if (c->id != 0) sprintf(p, ":%d", c->id); d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; c->dent = d; d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); - if (IS_ERR(d)) { - err = PTR_ERR(d); + if (!d) { + err = -ENOMEM; goto err_out; } d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); - if (IS_ERR(d)) { - err = PTR_ERR(d); + if (!d) { + err = -ENOMEM; goto err_out; } d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); - if (IS_ERR(d)) { - err = PTR_ERR(d); + if (!d) { + err = -ENOMEM; goto err_out; } return 0; @@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void) int err; d = debugfs_create_dir("clock", NULL); - if (IS_ERR(d)) - return PTR_ERR(d); + if (!d) + return -ENOMEM; clk_debugfs_root = d; list_for_each_entry(c, &clocks, node) { -- cgit v1.2.3 From 52414739ca3df12f6d1e78d4dc670e97af0e845f Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Nov 2008 13:35:07 -0800 Subject: ARM: OMAP: Fix get_irqnr_and_base to clear spurious interrupt bits On omap24xx, INTCPS_SIR_IRQ_OFFSET bits [6:0] contains the current active interrupt number. However, on 34xx INTCPS_SIR_IRQ_OFFSET bits [31:7] also contains the SPURIOUSIRQFLAG, which gets set if the interrupt sorting information is invalid. If the SPURIOUSIRQFLAG bits are not ignored, the interrupt code will occasionally produce a bunch of confusing errors: irq -33, desc: c02ddcc8, depth: 0, count: 0, unhandled: 0 ->handle_irq(): c006f23c, handle_bad_irq+0x0/0x22c ->chip(): 00000000, 0x0 ->action(): 00000000 Fix this by masking out only the ACTIVEIRQ bits. Also fix a confusing comment. Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/mach/entry-macro.S | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 030118ee204..2276f89671d 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -65,7 +65,8 @@ #include #endif -#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */ +#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */ +#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */ .macro disable_fiq .endm @@ -88,6 +89,7 @@ cmp \irqnr, #0x0 2222: ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] + and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ .endm -- cgit v1.2.3 From 5c32f62b97d62bec097c09e54e6602d0fce2af07 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Tue, 4 Nov 2008 13:35:08 -0800 Subject: ARM: OMAP: Fix define for twl4030 irqs Otherwise twl4030 gpios won't work. Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/mach/irqs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index a2929ac8c68..bed5274c910 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h @@ -372,7 +372,7 @@ /* External TWL4030 gpio interrupts are optional */ #define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END -#ifdef CONFIG_TWL4030_GPIO +#ifdef CONFIG_GPIO_TWL4030 #define TWL4030_GPIO_NR_IRQS 18 #else #define TWL4030_GPIO_NR_IRQS 0 -- cgit v1.2.3 From ab4f2ee130d5ffcf35616e1f5c6ab75af5b463b6 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 6 Nov 2008 17:11:07 +0000 Subject: [ARM] fix naming of MODULE_START / MODULE_END As of 73bdf0a60e607f4b8ecc5aec597105976565a84f, the kernel needs to know where modules are located in the virtual address space. On ARM, we located this region between MODULE_START and MODULE_END. Unfortunately, everyone else calls it MODULES_VADDR and MODULES_END. Update ARM to use the same naming, so is_vmalloc_or_module_addr() can work properly. Also update the comment on mm/vmalloc.c to reflect that ARM also places modules in a separate region from the vmalloc space. Signed-off-by: Russell King --- arch/arm/include/asm/memory.h | 12 ++++++------ arch/arm/kernel/module.c | 8 ++++---- arch/arm/mm/mmu.c | 4 ++-- 3 files changed, 12 insertions(+), 12 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 809ff9ab853..77764301844 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h @@ -44,10 +44,10 @@ * The module space lives between the addresses given by TASK_SIZE * and PAGE_OFFSET - it must be within 32MB of the kernel text. */ -#define MODULE_END (PAGE_OFFSET) -#define MODULE_START (MODULE_END - 16*1048576) +#define MODULES_END (PAGE_OFFSET) +#define MODULES_VADDR (MODULES_END - 16*1048576) -#if TASK_SIZE > MODULE_START +#if TASK_SIZE > MODULES_VADDR #error Top of user space clashes with start of module space #endif @@ -56,7 +56,7 @@ * Since we use sections to map it, this macro replaces the physical address * with its virtual address while keeping offset from the base section. */ -#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) +#define XIP_VIRT_ADDR(physaddr) (MODULES_VADDR + ((physaddr) & 0x000fffff)) /* * Allow 16MB-aligned ioremap pages @@ -94,8 +94,8 @@ /* * The module can be at any place in ram in nommu mode. */ -#define MODULE_END (END_MEM) -#define MODULE_START (PHYS_OFFSET) +#define MODULES_END (END_MEM) +#define MODULES_VADDR (PHYS_OFFSET) #endif /* !CONFIG_MMU */ diff --git a/arch/arm/kernel/module.c b/arch/arm/kernel/module.c index 9203ba7d58e..b8d965dcd6f 100644 --- a/arch/arm/kernel/module.c +++ b/arch/arm/kernel/module.c @@ -26,12 +26,12 @@ /* * The XIP kernel text is mapped in the module area for modules and * some other stuff to work without any indirect relocations. - * MODULE_START is redefined here and not in asm/memory.h to avoid + * MODULES_VADDR is redefined here and not in asm/memory.h to avoid * recompiling the whole kernel when CONFIG_XIP_KERNEL is turned on/off. */ extern void _etext; -#undef MODULE_START -#define MODULE_START (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) +#undef MODULES_VADDR +#define MODULES_VADDR (((unsigned long)&_etext + ~PGDIR_MASK) & PGDIR_MASK) #endif #ifdef CONFIG_MMU @@ -43,7 +43,7 @@ void *module_alloc(unsigned long size) if (!size) return NULL; - area = __get_vm_area(size, VM_ALLOC, MODULE_START, MODULE_END); + area = __get_vm_area(size, VM_ALLOC, MODULES_VADDR, MODULES_END); if (!area) return NULL; diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 8ba75406455..34e53596ff1 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -654,7 +654,7 @@ static inline void prepare_page_table(struct meminfo *mi) /* * Clear out all the mappings below the kernel image. */ - for (addr = 0; addr < MODULE_START; addr += PGDIR_SIZE) + for (addr = 0; addr < MODULES_VADDR; addr += PGDIR_SIZE) pmd_clear(pmd_off_k(addr)); #ifdef CONFIG_XIP_KERNEL @@ -766,7 +766,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc) */ #ifdef CONFIG_XIP_KERNEL map.pfn = __phys_to_pfn(CONFIG_XIP_PHYS_ADDR & SECTION_MASK); - map.virtual = MODULE_START; + map.virtual = MODULES_VADDR; map.length = ((unsigned long)&_etext - map.virtual + ~SECTION_MASK) & SECTION_MASK; map.type = MT_ROM; create_mapping(&map); -- cgit v1.2.3 From b1cce6b1b2785fd61454b47ceacb461815407662 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 4 Nov 2008 10:52:28 +0000 Subject: [ARM] mm: fix page table initialization MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As a result of the ptebits changes, we ended up marking device mappings as normal memory on ARMv7 CPUs, resulting in undesirable behaviour with serial ports and the like. While reviewing the section mapping table entries, other errors in the memory type settings for devices were detected and confirmed to prevent Xscale3 platforms booting. Tested on: OMAP34xx (ARMv7), OMAP24xx (ARMv6), OMAP16xx (ARM926T, ARMv5), PXA311 (Xscale3), PXA272 (Xscale), PXA255 (Xscale), IXP42x (Xscale), S3C2410 (ARM920T, ARMv4T), ARM720T (ARMv4T) StrongARM-110 (ARMv4) Acked-by: Tony Lindgren Tested-by: Robert Jarzmik Tested-by: Mike Rapoport Tested-by: Ben Dooks Tested-by: Anders Grafström Signed-off-by: Russell King --- arch/arm/include/asm/system.h | 4 ++ arch/arm/mm/mmu.c | 107 ++++++++++++++++++++++++++++++------------ arch/arm/mm/proc-v7.S | 12 ++--- 3 files changed, 87 insertions(+), 36 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 7aad78420f1..568020b34e3 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -42,6 +42,10 @@ #define CR_U (1 << 22) /* Unaligned access operation */ #define CR_XP (1 << 23) /* Extended page tables */ #define CR_VE (1 << 24) /* Vectored interrupts */ +#define CR_EE (1 << 25) /* Exception (Big) Endian */ +#define CR_TRE (1 << 28) /* TEX remap enable */ +#define CR_AFE (1 << 29) /* Access flag enable */ +#define CR_TE (1 << 30) /* Thumb exception enable */ /* * This is used to ensure the compiler did actually allocate the register we diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 34e53596ff1..e63db11f16a 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -180,20 +180,20 @@ void adjust_cr(unsigned long mask, unsigned long set) #endif #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE -#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE +#define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE static struct mem_type mem_types[] = { [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_SHARED | L_PTE_SHARED, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_S, .domain = DOMAIN_IO, }, [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_NONSHARED, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), + .prot_sect = PROT_SECT_DEVICE, .domain = DOMAIN_IO, }, [MT_DEVICE_CACHED] = { /* ioremap_cached */ @@ -205,7 +205,7 @@ static struct mem_type mem_types[] = { [MT_DEVICE_WC] = { /* ioremap_wc */ .prot_pte = PROT_PTE_DEVICE | L_PTE_MT_DEV_WC, .prot_l1 = PMD_TYPE_TABLE, - .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE, + .prot_sect = PROT_SECT_DEVICE, .domain = DOMAIN_IO, }, [MT_CACHECLEAN] = { @@ -273,22 +273,23 @@ static void __init build_mem_type_table(void) #endif /* - * On non-Xscale3 ARMv5-and-older systems, use CB=01 - * (Uncached/Buffered) for ioremap_wc() mappings. On XScale3 - * and ARMv6+, use TEXCB=00100 mappings (Inner/Outer Uncacheable - * in xsc3 parlance, Uncached Normal in ARMv6 parlance). + * Strip out features not present on earlier architectures. + * Pre-ARMv5 CPUs don't have TEX bits. Pre-ARMv6 CPUs or those + * without extended page tables don't have the 'Shared' bit. */ - if (cpu_is_xsc3() || cpu_arch >= CPU_ARCH_ARMv6) { - mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); - mem_types[MT_DEVICE_WC].prot_sect &= ~PMD_SECT_BUFFERABLE; - } + if (cpu_arch < CPU_ARCH_ARMv5) + for (i = 0; i < ARRAY_SIZE(mem_types); i++) + mem_types[i].prot_sect &= ~PMD_SECT_TEX(7); + if ((cpu_arch < CPU_ARCH_ARMv6 || !(cr & CR_XP)) && !cpu_is_xsc3()) + for (i = 0; i < ARRAY_SIZE(mem_types); i++) + mem_types[i].prot_sect &= ~PMD_SECT_S; /* - * ARMv5 and lower, bit 4 must be set for page tables. - * (was: cache "update-able on write" bit on ARM610) - * However, Xscale cores require this bit to be cleared. + * ARMv5 and lower, bit 4 must be set for page tables (was: cache + * "update-able on write" bit on ARM610). However, Xscale and + * Xscale3 require this bit to be cleared. */ - if (cpu_is_xscale()) { + if (cpu_is_xscale() || cpu_is_xsc3()) { for (i = 0; i < ARRAY_SIZE(mem_types); i++) { mem_types[i].prot_sect &= ~PMD_BIT4; mem_types[i].prot_l1 &= ~PMD_BIT4; @@ -302,6 +303,64 @@ static void __init build_mem_type_table(void) } } + /* + * Mark the device areas according to the CPU/architecture. + */ + if (cpu_is_xsc3() || (cpu_arch >= CPU_ARCH_ARMv6 && (cr & CR_XP))) { + if (!cpu_is_xsc3()) { + /* + * Mark device regions on ARMv6+ as execute-never + * to prevent speculative instruction fetches. + */ + mem_types[MT_DEVICE].prot_sect |= PMD_SECT_XN; + mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_XN; + mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_XN; + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_XN; + } + if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) { + /* + * For ARMv7 with TEX remapping, + * - shared device is SXCB=1100 + * - nonshared device is SXCB=0100 + * - write combine device mem is SXCB=0001 + * (Uncached Normal memory) + */ + mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1); + mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(1); + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; + } else if (cpu_is_xsc3()) { + /* + * For Xscale3, + * - shared device is TEXCB=00101 + * - nonshared device is TEXCB=01000 + * - write combine device mem is TEXCB=00100 + * (Inner/Outer Uncacheable in xsc3 parlance) + */ + mem_types[MT_DEVICE].prot_sect |= PMD_SECT_TEX(1) | PMD_SECT_BUFFERED; + mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2); + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); + } else { + /* + * For ARMv6 and ARMv7 without TEX remapping, + * - shared device is TEXCB=00001 + * - nonshared device is TEXCB=01000 + * - write combine device mem is TEXCB=00100 + * (Uncached Normal in ARMv6 parlance). + */ + mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; + mem_types[MT_DEVICE_NONSHARED].prot_sect |= PMD_SECT_TEX(2); + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_TEX(1); + } + } else { + /* + * On others, write combining is "Uncached/Buffered" + */ + mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_BUFFERABLE; + } + + /* + * Now deal with the memory-type mappings + */ cp = &cache_policies[cachepolicy]; vecs_pgprot = kern_pgprot = user_pgprot = cp->pte; @@ -317,12 +376,8 @@ static void __init build_mem_type_table(void) * Enable CPU-specific coherency if supported. * (Only available on XSC3 at the moment.) */ - if (arch_is_coherent()) { - if (cpu_is_xsc3()) { - mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; - mem_types[MT_MEMORY].prot_pte |= L_PTE_SHARED; - } - } + if (arch_is_coherent() && cpu_is_xsc3()) + mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S; /* * ARMv6 and above have extended page tables. @@ -336,11 +391,6 @@ static void __init build_mem_type_table(void) mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE; - /* - * Mark the device area as "shared device" - */ - mem_types[MT_DEVICE].prot_sect |= PMD_SECT_BUFFERED; - #ifdef CONFIG_SMP /* * Mark memory with the "shared" attribute for SMP systems @@ -360,9 +410,6 @@ static void __init build_mem_type_table(void) mem_types[MT_LOW_VECTORS].prot_pte |= vecs_pgprot; mem_types[MT_HIGH_VECTORS].prot_pte |= vecs_pgprot; - if (cpu_arch < CPU_ARCH_ARMv5) - mem_types[MT_MINICLEAN].prot_sect &= ~PMD_SECT_TEX(1); - pgprot_user = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | user_pgprot); pgprot_kernel = __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | L_PTE_WRITE | diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 07f82db7094..4d3c0a73e7f 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -115,7 +115,7 @@ ENTRY(cpu_v7_set_pte_ext) orr r3, r3, r2 orr r3, r3, #PTE_EXT_AP0 | 2 - tst r2, #1 << 4 + tst r1, #1 << 4 orrne r3, r3, #PTE_EXT_TEX(1) tst r1, #L_PTE_WRITE @@ -192,11 +192,11 @@ __v7_setup: mov pc, lr @ return to head.S:__ret ENDPROC(__v7_setup) - /* - * V X F I D LR - * .... ...E PUI. .T.T 4RVI ZFRS BLDP WCAM - * rrrr rrrx xxx0 0101 xxxx xxxx x111 xxxx < forced - * 0 110 0011 1.00 .111 1101 < we want + /* AT + * TFR EV X F I D LR + * .EEE ..EE PUI. .T.T 4RVI ZFRS BLDP WCAM + * rxxx rrxx xxx0 0101 xxxx xxxx x111 xxxx < forced + * 1 0 110 0011 1.00 .111 1101 < we want */ .type v7_crval, #object v7_crval: -- cgit v1.2.3 From c7cf72dcadbe39c2077b32460f86c9f8167be3be Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Thu, 6 Nov 2008 17:43:55 -0700 Subject: [ARM] xsc3: fix xsc3_l2_inv_range MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When 'start' and 'end' are less than a cacheline apart and 'start' is unaligned we are done after cleaning and invalidating the first cacheline. So check for (start < end) which will not walk off into invalid address ranges when (start > end). This issue was caught by drivers/dma/dmatest. 2.6.27 is susceptible. Cc: Cc: Haavard Skinnemoen Cc: Lothar WaÃ<9f>mann Cc: Lennert Buytenhek Cc: Eric Miao Signed-off-by: Dan Williams --- arch/arm/mm/cache-xsc3l2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-xsc3l2.c b/arch/arm/mm/cache-xsc3l2.c index 10b1bae1a25..464de893a98 100644 --- a/arch/arm/mm/cache-xsc3l2.c +++ b/arch/arm/mm/cache-xsc3l2.c @@ -98,7 +98,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) /* * Clean and invalidate partial last cache line. */ - if (end & (CACHE_LINE_SIZE - 1)) { + if (start < end && (end & (CACHE_LINE_SIZE - 1))) { xsc3_l2_clean_pa(end & ~(CACHE_LINE_SIZE - 1)); xsc3_l2_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); end &= ~(CACHE_LINE_SIZE - 1); @@ -107,7 +107,7 @@ static void xsc3_l2_inv_range(unsigned long start, unsigned long end) /* * Invalidate all full cache lines between 'start' and 'end'. */ - while (start != end) { + while (start < end) { xsc3_l2_inv_pa(start); start += CACHE_LINE_SIZE; } -- cgit v1.2.3 From 72bc2b1ad62f4d2f0a51b35829093d41f55accce Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 8 Nov 2008 21:15:53 +0100 Subject: [ARM] 5329/1: Feroceon: fix feroceon_l2_inv_range Same fix as commit c7cf72dcadb: when 'start' and 'end' are less than a cacheline apart and 'start' is unaligned we are done after cleaning and invalidating the first cacheline. Cc: Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/mm/cache-feroceon-l2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 13cdae8b0d4..80cd207cbae 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -150,7 +150,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end) /* * Clean and invalidate partial last cache line. */ - if (end & (CACHE_LINE_SIZE - 1)) { + if (start < end && end & (CACHE_LINE_SIZE - 1)) { l2_clean_inv_pa(end & ~(CACHE_LINE_SIZE - 1)); end &= ~(CACHE_LINE_SIZE - 1); } @@ -158,7 +158,7 @@ static void feroceon_l2_inv_range(unsigned long start, unsigned long end) /* * Invalidate all full cache lines between 'start' and 'end'. */ - while (start != end) { + while (start < end) { unsigned long range_end = calc_range_end(start, end); l2_inv_pa_range(start, range_end - CACHE_LINE_SIZE); start = range_end; -- cgit v1.2.3 From 0fded351a7d03fc69484d5a9e655fbd15a8e7dab Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Nov 2008 19:14:56 +0000 Subject: [ARM] realview: correct MMC clock rate The MMC clock source is actually 24MHz, not 33MHz. Signed-off-by: Russell King --- arch/arm/mach-realview/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-realview/clock.c b/arch/arm/mach-realview/clock.c index 3e706c57833..3347c4236a6 100644 --- a/arch/arm/mach-realview/clock.c +++ b/arch/arm/mach-realview/clock.c @@ -104,7 +104,7 @@ static struct clk uart_clk = { static struct clk mmci_clk = { .name = "MCLK", - .rate = 33000000, + .rate = 24000000, }; int clk_register(struct clk *clk) -- cgit v1.2.3 From 7bfc0b2e266dd4cd3d3f27a3ad31bf79974190b1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 8 Nov 2008 20:12:36 +0000 Subject: [ARM] versatile: correct MMC clock rate The MMC clock source is actually 24MHz, not 33MHz. Signed-off-by: Russell King --- arch/arm/mach-versatile/clock.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c index 9336508ec0b..58937f1fb38 100644 --- a/arch/arm/mach-versatile/clock.c +++ b/arch/arm/mach-versatile/clock.c @@ -105,7 +105,7 @@ static struct clk uart_clk = { static struct clk mmci_clk = { .name = "MCLK", - .rate = 33000000, + .rate = 24000000, }; int clk_register(struct clk *clk) -- cgit v1.2.3 From ebb4c65869db7213280ad9c510637683939b5ff8 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 9 Nov 2008 11:18:36 +0000 Subject: [ARM] iop: iop3xx needs registers mapped uncached+unbuffered Mikael Pettersson reported: The 2.6.28-rc kernels fail to detect PCI device 0000:00:01.0 (the first ethernet port) on my Thecus n2100 XScale box. There is however still a strange "ghost" device that gets partially detected in 2.6.28-rc2 vanilla. The IOP321 manual says: The user designates the memory region containing the OCCDR as non-cacheable and non-bufferable from the IntelR XScaleTM core. This guarantees that all load/stores to the OCCDR are only of DWORD quantities. Ensure that the OCCDR is so mapped. Signed-off-by: Russell King --- arch/arm/include/asm/mach/map.h | 13 +++++++------ arch/arm/mm/mmu.c | 6 ++++++ arch/arm/plat-iop/setup.c | 5 +++-- 3 files changed, 16 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h index cb1139ac194..39d949b63e8 100644 --- a/arch/arm/include/asm/mach/map.h +++ b/arch/arm/include/asm/mach/map.h @@ -19,12 +19,13 @@ struct map_desc { }; /* types 0-3 are defined in asm/io.h */ -#define MT_CACHECLEAN 4 -#define MT_MINICLEAN 5 -#define MT_LOW_VECTORS 6 -#define MT_HIGH_VECTORS 7 -#define MT_MEMORY 8 -#define MT_ROM 9 +#define MT_UNCACHED 4 +#define MT_CACHECLEAN 5 +#define MT_MINICLEAN 6 +#define MT_LOW_VECTORS 7 +#define MT_HIGH_VECTORS 8 +#define MT_MEMORY 9 +#define MT_ROM 10 #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index e63db11f16a..7f36c825718 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -208,6 +208,12 @@ static struct mem_type mem_types[] = { .prot_sect = PROT_SECT_DEVICE, .domain = DOMAIN_IO, }, + [MT_UNCACHED] = { + .prot_pte = PROT_PTE_DEVICE, + .prot_l1 = PMD_TYPE_TABLE, + .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, + .domain = DOMAIN_IO, + }, [MT_CACHECLEAN] = { .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, .domain = DOMAIN_KERNEL, diff --git a/arch/arm/plat-iop/setup.c b/arch/arm/plat-iop/setup.c index 4689db638e9..9e573e78176 100644 --- a/arch/arm/plat-iop/setup.c +++ b/arch/arm/plat-iop/setup.c @@ -16,14 +16,15 @@ #include /* - * Standard IO mapping for all IOP3xx based systems + * Standard IO mapping for all IOP3xx based systems. Note that + * the IOP3xx OCCDR must be mapped uncached and unbuffered. */ static struct map_desc iop3xx_std_desc[] __initdata = { { /* mem mapped registers */ .virtual = IOP3XX_PERIPHERAL_VIRT_BASE, .pfn = __phys_to_pfn(IOP3XX_PERIPHERAL_PHYS_BASE), .length = IOP3XX_PERIPHERAL_SIZE, - .type = MT_DEVICE, + .type = MT_UNCACHED, }, { /* PCI IO space */ .virtual = IOP3XX_PCI_LOWER_IO_VA, .pfn = __phys_to_pfn(IOP3XX_PCI_LOWER_IO_PA), -- cgit v1.2.3 From 1ec26db1f8cae0aca64708e0fe1f687eab7c82e5 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 11 Nov 2008 21:45:57 +0800 Subject: pxafb: introduce LCD_TYPE_MASK and use it. Signed-off-by: Daniel Mack Signed-off-by: Eric Miao --- arch/arm/mach-pxa/include/mach/pxafb.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/include/mach/pxafb.h b/arch/arm/mach-pxa/include/mach/pxafb.h index 8e591118371..cbda4d35c42 100644 --- a/arch/arm/mach-pxa/include/mach/pxafb.h +++ b/arch/arm/mach-pxa/include/mach/pxafb.h @@ -33,6 +33,7 @@ #define LCD_CONN_TYPE(_x) ((_x) & 0x0f) #define LCD_CONN_WIDTH(_x) (((_x) >> 4) & 0x1f) +#define LCD_TYPE_MASK 0xf #define LCD_TYPE_UNKNOWN 0 #define LCD_TYPE_MONO_STN 1 #define LCD_TYPE_MONO_DSTN 2 -- cgit v1.2.3 From 65e503814dec83c7b2ac955e75919d009109c919 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Tue, 11 Nov 2008 13:12:33 -0700 Subject: iop-adma: use iop_paranoia() for debug BUG_ONs Now that the critical read back to flush the next descriptor address is fixed we can downgrade some BUG_ONs that need only be enabled when testing changes to the driver. Signed-off-by: Dan Williams --- arch/arm/include/asm/hardware/iop3xx-adma.h | 5 +++-- arch/arm/include/asm/hardware/iop_adma.h | 6 ++++++ arch/arm/mach-iop13xx/include/mach/adma.h | 3 ++- 3 files changed, 11 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/hardware/iop3xx-adma.h b/arch/arm/include/asm/hardware/iop3xx-adma.h index 87bff09633a..83e6ba338e2 100644 --- a/arch/arm/include/asm/hardware/iop3xx-adma.h +++ b/arch/arm/include/asm/hardware/iop3xx-adma.h @@ -730,7 +730,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, { /* hw_desc->next_desc is the same location for all channels */ union iop3xx_desc hw_desc = { .ptr = desc->hw_desc, }; - BUG_ON(hw_desc.dma->next_desc); + + iop_paranoia(hw_desc.dma->next_desc); hw_desc.dma->next_desc = next_desc_addr; } @@ -760,7 +761,7 @@ static inline int iop_desc_get_zero_result(struct iop_adma_desc_slot *desc) struct iop3xx_desc_aau *hw_desc = desc->hw_desc; struct iop3xx_aau_desc_ctrl desc_ctrl = hw_desc->desc_ctrl_field; - BUG_ON(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en)); + iop_paranoia(!(desc_ctrl.tx_complete && desc_ctrl.zero_result_en)); return desc_ctrl.zero_result_err; } diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h index cb7e3611bcb..385c6e8cbbd 100644 --- a/arch/arm/include/asm/hardware/iop_adma.h +++ b/arch/arm/include/asm/hardware/iop_adma.h @@ -23,6 +23,12 @@ #define IOP_ADMA_SLOT_SIZE 32 #define IOP_ADMA_THRESHOLD 4 +#ifdef DEBUG +#define IOP_PARANOIA 1 +#else +#define IOP_PARANOIA 0 +#endif +#define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x)) /** * struct iop_adma_device - internal representation of an ADMA device diff --git a/arch/arm/mach-iop13xx/include/mach/adma.h b/arch/arm/mach-iop13xx/include/mach/adma.h index 60019c8e646..5722e86f217 100644 --- a/arch/arm/mach-iop13xx/include/mach/adma.h +++ b/arch/arm/mach-iop13xx/include/mach/adma.h @@ -404,7 +404,8 @@ static inline void iop_desc_set_next_desc(struct iop_adma_desc_slot *desc, u32 next_desc_addr) { struct iop13xx_adma_desc_hw *hw_desc = desc->hw_desc; - BUG_ON(hw_desc->next_desc); + + iop_paranoia(hw_desc->next_desc); hw_desc->next_desc = next_desc_addr; } -- cgit v1.2.3 From 9fa767928fe738aba8e99dae511e91f02fe20b28 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 13 Nov 2008 14:33:51 +0000 Subject: [ARM] dma-mapping: fix compiler warning arch/arm/mm/dma-mapping.c: In function `dma_sync_sg_for_cpu': arch/arm/mm/dma-mapping.c:588: warning: statement with no effect Signed-off-by: Russell King --- arch/arm/include/asm/dma-mapping.h | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/dma-mapping.h b/arch/arm/include/asm/dma-mapping.h index 1cb8602dd9d..4ed149cbb32 100644 --- a/arch/arm/include/asm/dma-mapping.h +++ b/arch/arm/include/asm/dma-mapping.h @@ -256,8 +256,17 @@ int dmabounce_sync_for_cpu(struct device *, dma_addr_t, unsigned long, int dmabounce_sync_for_device(struct device *, dma_addr_t, unsigned long, size_t, enum dma_data_direction); #else -#define dmabounce_sync_for_cpu(dev,dma,off,sz,dir) (1) -#define dmabounce_sync_for_device(dev,dma,off,sz,dir) (1) +static inline int dmabounce_sync_for_cpu(struct device *d, dma_addr_t addr, + unsigned long offset, size_t size, enum dma_data_direction dir) +{ + return 1; +} + +static inline int dmabounce_sync_for_device(struct device *d, dma_addr_t addr, + unsigned long offset, size_t size, enum dma_data_direction dir) +{ + return 1; +} /** -- cgit v1.2.3 From 1e8b0416ca387d754410a4e5d6b92ad6e2fb00eb Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 13 Nov 2008 14:43:03 +0000 Subject: [ARM] integrator,realview,versatile: remove FLASH_* and EPROM_* constants FLASH_* and EPROM_* constants are unused, and clash with drivers: drivers/atm/ambassador.h:257:1: warning: "FLASH_BASE" redefined drivers/atm/ambassador.h:258:1: warning: "FLASH_SIZE" redefined drivers/atm/iphase.h:332:1: warning: "EPROM_SIZE" redefined so remove them. Signed-off-by: Russell King --- arch/arm/mach-integrator/include/mach/platform.h | 19 +------------------ arch/arm/mach-realview/include/mach/platform.h | 19 +------------------ arch/arm/mach-versatile/include/mach/platform.h | 18 +----------------- 3 files changed, 3 insertions(+), 53 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-integrator/include/mach/platform.h b/arch/arm/mach-integrator/include/mach/platform.h index 028b87839c0..e00a2624f26 100644 --- a/arch/arm/mach-integrator/include/mach/platform.h +++ b/arch/arm/mach-integrator/include/mach/platform.h @@ -407,28 +407,11 @@ */ #define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE -/* - * Application Flash - * - */ -#define FLASH_BASE INTEGRATOR_FLASH_BASE -#define FLASH_SIZE INTEGRATOR_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE INTEGRATOR_BOOT_ROM_HI -#define EPROM_SIZE INTEGRATOR_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) - /* * Clean base - dummy * */ -#define CLEAN_BASE EPROM_BASE +#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI /* * Timer definitions diff --git a/arch/arm/mach-realview/include/mach/platform.h b/arch/arm/mach-realview/include/mach/platform.h index 4034b54950c..793a3a33271 100644 --- a/arch/arm/mach-realview/include/mach/platform.h +++ b/arch/arm/mach-realview/include/mach/platform.h @@ -238,28 +238,11 @@ #define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */ #define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */ -/* - * Application Flash - * - */ -#define FLASH_BASE REALVIEW_FLASH_BASE -#define FLASH_SIZE REALVIEW_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE REALVIEW_BOOT_ROM_HI -#define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) - /* * Clean base - dummy * */ -#define CLEAN_BASE EPROM_BASE +#define CLEAN_BASE REALVIEW_BOOT_ROM_HI /* * System controller bit assignment diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h index 27cbe6a3f22..f91ba930ca8 100644 --- a/arch/arm/mach-versatile/include/mach/platform.h +++ b/arch/arm/mach-versatile/include/mach/platform.h @@ -436,28 +436,12 @@ #define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1) #define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2) #define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3) -/* - * Application Flash - * - */ -#define FLASH_BASE VERSATILE_FLASH_BASE -#define FLASH_SIZE VERSATILE_FLASH_SIZE -#define FLASH_END (FLASH_BASE + FLASH_SIZE - 1) -#define FLASH_BLOCK_SIZE SZ_128K - -/* - * Boot Flash - * - */ -#define EPROM_BASE VERSATILE_BOOT_ROM_HI -#define EPROM_SIZE VERSATILE_BOOT_ROM_SIZE -#define EPROM_END (EPROM_BASE + EPROM_SIZE - 1) /* * Clean base - dummy * */ -#define CLEAN_BASE EPROM_BASE +#define CLEAN_BASE VERSATILE_BOOT_ROM_HI /* * System controller bit assignment -- cgit v1.2.3 From d9a682a592ff5905d328c648fd30ee7fa12ce8ab Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 13 Nov 2008 14:53:08 +0000 Subject: [ARM] cdb89712,clps7500,h720x: avoid namespace clash for FLASH_* constants Signed-off-by: Russell King --- arch/arm/mach-clps711x/include/mach/hardware.h | 4 ---- arch/arm/mach-clps7500/core.c | 6 +++--- arch/arm/mach-clps7500/include/mach/hardware.h | 6 +++--- arch/arm/mach-h720x/include/mach/boards.h | 6 +++--- 4 files changed, 9 insertions(+), 13 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index 4c3e101b96c..7cc675c93e2 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -95,10 +95,6 @@ #include /* dynamic ioremap() areas */ -#define FLASH_START 0x00000000 -#define FLASH_SIZE 0x800000 -#define FLASH_WIDTH 4 - #define SRAM_START 0x60000000 #define SRAM_SIZE 0xc000 #define SRAM_WIDTH 4 diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index c3a33b8a5aa..7e247c04d41 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c @@ -275,9 +275,9 @@ static struct map_desc cl7500_io_desc[] __initdata = { .length = ISA_SIZE, .type = MT_DEVICE }, { /* Flash */ - .virtual = FLASH_BASE, - .pfn = __phys_to_pfn(FLASH_START), - .length = FLASH_SIZE, + .virtual = CLPS7500_FLASH_BASE, + .pfn = __phys_to_pfn(CLPS7500_FLASH_START), + .length = CLPS7500_FLASH_SIZE, .type = MT_DEVICE }, { /* LED */ .virtual = LED_BASE, diff --git a/arch/arm/mach-clps7500/include/mach/hardware.h b/arch/arm/mach-clps7500/include/mach/hardware.h index d66578a3371..a6ad1d44bad 100644 --- a/arch/arm/mach-clps7500/include/mach/hardware.h +++ b/arch/arm/mach-clps7500/include/mach/hardware.h @@ -39,9 +39,9 @@ #define ISA_SIZE 0x00010000 #define ISA_BASE 0xe1000000 -#define FLASH_START 0x01000000 /* XXX */ -#define FLASH_SIZE 0x01000000 -#define FLASH_BASE 0xe2000000 +#define CLPS7500_FLASH_START 0x01000000 /* XXX */ +#define CLPS7500_FLASH_SIZE 0x01000000 +#define CLPS7500_FLASH_BASE 0xe2000000 #define LED_START 0x0302B000 #define LED_SIZE 0x00001000 diff --git a/arch/arm/mach-h720x/include/mach/boards.h b/arch/arm/mach-h720x/include/mach/boards.h index 079b279e124..38b8e0d61fb 100644 --- a/arch/arm/mach-h720x/include/mach/boards.h +++ b/arch/arm/mach-h720x/include/mach/boards.h @@ -19,9 +19,9 @@ #ifdef CONFIG_ARCH_H7202 /* FLASH */ -#define FLASH_VIRT 0xd0000000 -#define FLASH_PHYS 0x00000000 -#define FLASH_SIZE 0x02000000 +#define H720X_FLASH_VIRT 0xd0000000 +#define H720X_FLASH_PHYS 0x00000000 +#define H720X_FLASH_SIZE 0x02000000 /* onboard LAN controller */ # define ETH0_PHYS 0x08000000 -- cgit v1.2.3 From 8959dabdf2f8f9ce982a2c4cfe6d1652a2fb6320 Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 13 Nov 2008 15:02:41 +0000 Subject: [ARM] cdb89712: avoid namespace clashes with SRAM_ and BOOTROM_ constants Signed-off-by: Russell King --- arch/arm/mach-clps711x/include/mach/hardware.h | 18 ------------------ 1 file changed, 18 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-clps711x/include/mach/hardware.h b/arch/arm/mach-clps711x/include/mach/hardware.h index 7cc675c93e2..b3ebe9e4871 100644 --- a/arch/arm/mach-clps711x/include/mach/hardware.h +++ b/arch/arm/mach-clps711x/include/mach/hardware.h @@ -94,16 +94,6 @@ #include #include -/* dynamic ioremap() areas */ -#define SRAM_START 0x60000000 -#define SRAM_SIZE 0xc000 -#define SRAM_WIDTH 4 - -#define BOOTROM_START 0x70000000 -#define BOOTROM_SIZE 0x80 -#define BOOTROM_WIDTH 4 - - /* static cdb89712_map_io() areas */ #define REGISTER_START 0x80000000 #define REGISTER_SIZE 0x4000 @@ -194,14 +184,6 @@ #define CEIVA_FLASH_SIZE 0x100000 #define CEIVA_FLASH_WIDTH 2 -#define SRAM_START 0x60000000 -#define SRAM_SIZE 0xc000 -#define SRAM_WIDTH 4 - -#define BOOTROM_START 0x70000000 -#define BOOTROM_SIZE 0x80 -#define BOOTROM_WIDTH 4 - /* * SED1355 LCD controller */ -- cgit v1.2.3 From 38cd809e675e29ea1c3bce8ed743b0fe8aa10eea Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Sat, 15 Nov 2008 23:41:56 +0800 Subject: [ARM] pxa: fix I2C controller device being registered twice on Akita Signed-off-by: Eric Miao Cc: Richard Purdie --- arch/arm/mach-pxa/spitz.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index f0a5bbae0b4..51db9527f17 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -686,7 +686,6 @@ static void __init akita_init(void) spitz_pcmcia_config.num_devs = 1; platform_scoop_config = &spitz_pcmcia_config; - pxa_set_i2c_info(NULL); i2c_register_board_info(0, ARRAY_AND_SIZE(akita_i2c_board_info)); common_init(); -- cgit v1.2.3 From faf2f0ab13d259f2386d156d24c405ec8cee30ff Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Sun, 16 Nov 2008 15:56:58 +0800 Subject: [ARM] pxa: fix incorrect PCMCIA PSKTSEL pin configuration for spitz The original incorrect configuration caused GPIO79_nCS_3 being overriden, thus resulted in the NAND flash not being detected. The real PSKTSEL pin is on GPIO104 instead of GPIO79. Signed-off-by: Eric Miao Cc: Richard Purdie --- arch/arm/mach-pxa/spitz.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 51db9527f17..3be76ee2bdb 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c @@ -67,6 +67,7 @@ static unsigned long spitz_pin_config[] __initdata = { /* Chip Selects */ GPIO78_nCS_2, /* SCOOP #2 */ + GPIO79_nCS_3, /* NAND */ GPIO80_nCS_4, /* SCOOP #1 */ /* LCD - 16bpp Active TFT */ @@ -97,10 +98,10 @@ static unsigned long spitz_pin_config[] __initdata = { GPIO51_nPIOW, GPIO85_nPCE_1, GPIO54_nPCE_2, - GPIO79_PSKTSEL, GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, + GPIO104_PSKTSEL, /* MMC */ GPIO32_MMC_CLK, -- cgit v1.2.3 From 28105fda1ecadfa7c827b22d323c169f19dc04b0 Mon Sep 17 00:00:00 2001 From: Jaya Kumar Date: Tue, 11 Nov 2008 12:17:05 +0100 Subject: [ARM] 5330/1: mach-pxa: Fixup reset for systems using reboot=cold or other strings This patch makes do_hw_reset the default reboot behavior when nothing else matches. This restores reboot functionality on gumstix basix devices where reboot=cold is the default boot argument. Signed-off-by: Jaya Kumar Acked-by: Eric Miao Signed-off-by: Russell King --- arch/arm/mach-pxa/reset.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/reset.c b/arch/arm/mach-pxa/reset.c index 1b2af575c40..00b2dc2a107 100644 --- a/arch/arm/mach-pxa/reset.c +++ b/arch/arm/mach-pxa/reset.c @@ -90,12 +90,13 @@ void arch_reset(char mode) /* Jump into ROM at address 0 */ cpu_reset(0); break; - case 'h': - do_hw_reset(); - break; case 'g': do_gpio_reset(); break; + case 'h': + default: + do_hw_reset(); + break; } } -- cgit v1.2.3 From 999f6338780fa0577b6581941c697c868d1ec2d3 Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 17 Nov 2008 20:29:03 +0100 Subject: [ARM] pxa/MioA701: fix memory corruption. In the resume bootstrap, the early disable address is wrong. Fix it to RAM address 0xa020b000 instead of 0xa0200000, and make it consistent with RESUME_ENABLE_ADDR in mioa701.c. Signed-off-by: Robert Jarzmik Acked-by: Russell King Signed-off-by: Eric Miao --- arch/arm/mach-pxa/mioa701_bootresume.S | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/mioa701_bootresume.S b/arch/arm/mach-pxa/mioa701_bootresume.S index a647693d985..324d25a48c8 100644 --- a/arch/arm/mach-pxa/mioa701_bootresume.S +++ b/arch/arm/mach-pxa/mioa701_bootresume.S @@ -24,6 +24,7 @@ ENTRY(mioa701_jumpaddr) 1: mov r0, #0xa0000000 @ Don't suppose memory access works orr r0, r0, #0x00200000 @ even if it's supposed to + orr r0, r0, #0x0000b000 mov r1, #0 str r1, [r0] @ Early disable resume for next boot ldr r0, mioa701_jumpaddr @ (Murphy's Law) -- cgit v1.2.3 From 844c6f6a36984c5fe1bcc2d68a88f2ed212d1eef Mon Sep 17 00:00:00 2001 From: Robert Jarzmik Date: Mon, 17 Nov 2008 20:29:04 +0100 Subject: [ARM] pxa/MioA701: bluetooth resume fix The G3IPL expects the value at RAM address 0xa020b020 to be exactly 1 to setup the bluetooth GPIOs properly. The actual code got a value from gpio_get_value() which was not 1, but a "not equal to 0" integer. Signed-off-by: Robert Jarzmik Acked-by: Russell King Signed-off-by: Eric Miao --- arch/arm/mach-pxa/mioa701.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c index 0842c531ee4..782903fe9c6 100644 --- a/arch/arm/mach-pxa/mioa701.c +++ b/arch/arm/mach-pxa/mioa701.c @@ -565,7 +565,7 @@ static int mioa701_sys_suspend(struct sys_device *sysdev, pm_message_t state) u32 *mem_resume_unknown = phys_to_virt(RESUME_UNKNOWN_ADDR); /* Devices prepare suspend */ - is_bt_on = gpio_get_value(GPIO83_BT_ON); + is_bt_on = !!gpio_get_value(GPIO83_BT_ON); pxa2xx_mfp_set_lpm(GPIO83_BT_ON, is_bt_on ? MFP_LPM_DRIVE_HIGH : MFP_LPM_DRIVE_LOW); -- cgit v1.2.3 From 147dcf5489fb86c4bfe400520186f9f11b304783 Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Tue, 25 Nov 2008 15:11:12 -0800 Subject: ARM: OMAP: Typo fix for clock_allow_idle The second clk_deny_idle instance should be clk_allow_idle instead. Signed-off-by: Amit Kucheria Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/mach/pm.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/include/mach/pm.h b/arch/arm/plat-omap/include/mach/pm.h index 768eb6e7abc..2a9c27ad4c3 100644 --- a/arch/arm/plat-omap/include/mach/pm.h +++ b/arch/arm/plat-omap/include/mach/pm.h @@ -128,7 +128,7 @@ void clk_deny_idle(struct clk *clk); * clk_allow_idle - Counters previous clk_deny_idle * @clk: clock signal handle */ -void clk_deny_idle(struct clk *clk); +void clk_allow_idle(struct clk *clk); extern void omap_pm_idle(void); extern void omap_pm_suspend(void); -- cgit v1.2.3 From 72e9622c2a2eb73d82c716504cc93d22cd3cfd8e Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Tue, 25 Nov 2008 18:57:08 +0100 Subject: [ARM] pxa/pcm990: use negative number for an invalid GPIO in camera data 0 is a valid GPIO number, use a negative number to specify, that this camera doesn't have a GPIO for bus-width switching. Signed-off-by: Guennadi Liakhovetski Signed-off-by: Eric Miao --- arch/arm/mach-pxa/pcm990-baseboard.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c index f601425f1b1..b36cec5c9ee 100644 --- a/arch/arm/mach-pxa/pcm990-baseboard.c +++ b/arch/arm/mach-pxa/pcm990-baseboard.c @@ -385,6 +385,7 @@ static struct soc_camera_link iclink[] = { .gpio = NR_BUILTIN_GPIO + 1, }, { .bus_id = 0, /* Must match with the camera ID above */ + .gpio = -ENXIO, } }; -- cgit v1.2.3 From 2fd36a5d6e830269a37f0f6ccfd34ee0517ebc7d Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 26 Nov 2008 12:51:42 +0800 Subject: [ARM] pxa/corgi: update default config to exclude tosa from being built Signed-off-by: Eric Miao --- arch/arm/configs/corgi_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/configs/corgi_defconfig b/arch/arm/configs/corgi_defconfig index f3af0b593eb..98765438048 100644 --- a/arch/arm/configs/corgi_defconfig +++ b/arch/arm/configs/corgi_defconfig @@ -179,7 +179,7 @@ CONFIG_MACH_HUSKY=y # CONFIG_MACH_AKITA is not set # CONFIG_MACH_SPITZ is not set # CONFIG_MACH_BORZOI is not set -CONFIG_MACH_TOSA=y +# CONFIG_MACH_TOSA is not set # CONFIG_ARCH_VIPER is not set # CONFIG_ARCH_PXA_ESERIES is not set # CONFIG_TRIZEPS_PXA is not set -- cgit v1.2.3 From 723fdb781abfe78d8ba7d911abbb581722348aa7 Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Wed, 26 Nov 2008 14:35:16 -0800 Subject: ARM: OMAP: Fixes for suspend / resume GPIO wake-up handling Use the correct wake-up enable register, and make it work with 34xx also. Signed-off-by: Tero Kristo Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/gpio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index 8679fbca6bb..424049d83fb 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c @@ -101,6 +101,7 @@ #define OMAP24XX_GPIO_IRQSTATUS2 0x0028 #define OMAP24XX_GPIO_IRQENABLE2 0x002c #define OMAP24XX_GPIO_IRQENABLE1 0x001c +#define OMAP24XX_GPIO_WAKE_EN 0x0020 #define OMAP24XX_GPIO_CTRL 0x0030 #define OMAP24XX_GPIO_OE 0x0034 #define OMAP24XX_GPIO_DATAIN 0x0038 @@ -1551,7 +1552,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) #endif #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) case METHOD_GPIO_24XX: - wake_status = bank->base + OMAP24XX_GPIO_SETWKUENA; + wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; break; @@ -1574,7 +1575,7 @@ static int omap_gpio_resume(struct sys_device *dev) { int i; - if (!cpu_is_omap24xx() && !cpu_is_omap16xx()) + if (!cpu_class_is_omap2() && !cpu_is_omap16xx()) return 0; for (i = 0; i < gpio_bank_count; i++) { -- cgit v1.2.3 From a730b327ca70f0e4d933202e3979e96613c3585f Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 20 Nov 2008 17:34:57 +0100 Subject: [ARM] pxa/palmtx: misc fixes to use generic GPIO API Signed-off-by: Marek Vasut Signed-off-by: Eric Miao --- arch/arm/mach-pxa/palmtx.c | 150 +++++++++++++++++++++++++++++++++++---------- 1 file changed, 118 insertions(+), 32 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/palmtx.c b/arch/arm/mach-pxa/palmtx.c index 4447711c9fc..a9d94f5dbec 100644 --- a/arch/arm/mach-pxa/palmtx.c +++ b/arch/arm/mach-pxa/palmtx.c @@ -56,6 +56,9 @@ static unsigned long palmtx_pin_config[] __initdata = { GPIO110_MMC_DAT_2, GPIO111_MMC_DAT_3, GPIO112_MMC_CMD, + GPIO14_GPIO, /* SD detect */ + GPIO114_GPIO, /* SD power */ + GPIO115_GPIO, /* SD r/o switch */ /* AC97 */ GPIO28_AC97_BITCLK, @@ -64,6 +67,7 @@ static unsigned long palmtx_pin_config[] __initdata = { GPIO31_AC97_SYNC, /* IrDA */ + GPIO40_GPIO, /* ir disable */ GPIO46_FICP_RXD, GPIO47_FICP_TXD, @@ -71,7 +75,8 @@ static unsigned long palmtx_pin_config[] __initdata = { GPIO16_PWM0_OUT, /* USB */ - GPIO13_GPIO, + GPIO13_GPIO, /* usb detect */ + GPIO95_GPIO, /* usb power */ /* PCMCIA */ GPIO48_nPOE, @@ -84,6 +89,45 @@ static unsigned long palmtx_pin_config[] __initdata = { GPIO55_nPREG, GPIO56_nPWAIT, GPIO57_nIOIS16, + GPIO94_GPIO, /* wifi power 1 */ + GPIO108_GPIO, /* wifi power 2 */ + GPIO116_GPIO, /* wifi ready */ + + /* MATRIX KEYPAD */ + GPIO100_KP_MKIN_0, + GPIO101_KP_MKIN_1, + GPIO102_KP_MKIN_2, + GPIO97_KP_MKIN_3, + GPIO103_KP_MKOUT_0, + GPIO104_KP_MKOUT_1, + GPIO105_KP_MKOUT_2, + + /* LCD */ + GPIO58_LCD_LDD_0, + GPIO59_LCD_LDD_1, + GPIO60_LCD_LDD_2, + GPIO61_LCD_LDD_3, + GPIO62_LCD_LDD_4, + GPIO63_LCD_LDD_5, + GPIO64_LCD_LDD_6, + GPIO65_LCD_LDD_7, + GPIO66_LCD_LDD_8, + GPIO67_LCD_LDD_9, + GPIO68_LCD_LDD_10, + GPIO69_LCD_LDD_11, + GPIO70_LCD_LDD_12, + GPIO71_LCD_LDD_13, + GPIO72_LCD_LDD_14, + GPIO73_LCD_LDD_15, + GPIO74_LCD_FCLK, + GPIO75_LCD_LCLK, + GPIO76_LCD_PCLK, + GPIO77_LCD_BIAS, + + /* MISC. */ + GPIO10_GPIO, /* hotsync button */ + GPIO12_GPIO, /* power detect */ + GPIO107_GPIO, /* earphone detect */ }; /****************************************************************************** @@ -95,32 +139,49 @@ static int palmtx_mci_init(struct device *dev, irq_handler_t palmtx_detect_int, int err = 0; /* Setup an interrupt for detecting card insert/remove events */ - err = request_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, palmtx_detect_int, - IRQF_DISABLED | IRQF_SAMPLE_RANDOM | + err = gpio_request(GPIO_NR_PALMTX_SD_DETECT_N, "SD IRQ"); + if (err) + goto err; + err = gpio_direction_input(GPIO_NR_PALMTX_SD_DETECT_N); + if (err) + goto err2; + err = request_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), + palmtx_detect_int, IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "SD/MMC card detect", data); if (err) { printk(KERN_ERR "%s: cannot request SD/MMC card detect IRQ\n", __func__); - return err; + goto err2; } err = gpio_request(GPIO_NR_PALMTX_SD_POWER, "SD_POWER"); if (err) - goto pwr_err; + goto err3; + err = gpio_direction_output(GPIO_NR_PALMTX_SD_POWER, 0); + if (err) + goto err4; err = gpio_request(GPIO_NR_PALMTX_SD_READONLY, "SD_READONLY"); if (err) - goto ro_err; + goto err4; + err = gpio_direction_input(GPIO_NR_PALMTX_SD_READONLY); + if (err) + goto err5; printk(KERN_DEBUG "%s: irq registered\n", __func__); return 0; -ro_err: +err5: + gpio_free(GPIO_NR_PALMTX_SD_READONLY); +err4: gpio_free(GPIO_NR_PALMTX_SD_POWER); -pwr_err: - free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data); +err3: + free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data); +err2: + gpio_free(GPIO_NR_PALMTX_SD_DETECT_N); +err: return err; } @@ -128,7 +189,8 @@ static void palmtx_mci_exit(struct device *dev, void *data) { gpio_free(GPIO_NR_PALMTX_SD_READONLY); gpio_free(GPIO_NR_PALMTX_SD_POWER); - free_irq(IRQ_GPIO_PALMTX_SD_DETECT_N, data); + free_irq(gpio_to_irq(GPIO_NR_PALMTX_SD_DETECT_N), data); + gpio_free(GPIO_NR_PALMTX_SD_DETECT_N); } static void palmtx_mci_power(struct device *dev, unsigned int vdd) @@ -167,7 +229,6 @@ static unsigned int palmtx_matrix_keys[] = { KEY(3, 0, KEY_RIGHT), KEY(3, 2, KEY_LEFT), - }; static struct pxa27x_keypad_platform_data palmtx_keypad_platform_data = { @@ -209,11 +270,19 @@ static int palmtx_backlight_init(struct device *dev) ret = gpio_request(GPIO_NR_PALMTX_BL_POWER, "BL POWER"); if (ret) goto err; + ret = gpio_direction_output(GPIO_NR_PALMTX_BL_POWER, 0); + if (ret) + goto err2; ret = gpio_request(GPIO_NR_PALMTX_LCD_POWER, "LCD POWER"); if (ret) goto err2; + ret = gpio_direction_output(GPIO_NR_PALMTX_LCD_POWER, 0); + if (ret) + goto err3; return 0; +err3: + gpio_free(GPIO_NR_PALMTX_LCD_POWER); err2: gpio_free(GPIO_NR_PALMTX_BL_POWER); err: @@ -254,6 +323,24 @@ static struct platform_device palmtx_backlight = { /****************************************************************************** * IrDA ******************************************************************************/ +static int palmtx_irda_startup(struct device *dev) +{ + int err; + err = gpio_request(GPIO_NR_PALMTX_IR_DISABLE, "IR DISABLE"); + if (err) + goto err; + err = gpio_direction_output(GPIO_NR_PALMTX_IR_DISABLE, 1); + if (err) + gpio_free(GPIO_NR_PALMTX_IR_DISABLE); +err: + return err; +} + +static void palmtx_irda_shutdown(struct device *dev) +{ + gpio_free(GPIO_NR_PALMTX_IR_DISABLE); +} + static void palmtx_irda_transceiver_mode(struct device *dev, int mode) { gpio_set_value(GPIO_NR_PALMTX_IR_DISABLE, mode & IR_OFF); @@ -261,6 +348,8 @@ static void palmtx_irda_transceiver_mode(struct device *dev, int mode) } static struct pxaficp_platform_data palmtx_ficp_platform_data = { + .startup = palmtx_irda_startup, + .shutdown = palmtx_irda_shutdown, .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, .transceiver_mode = palmtx_irda_transceiver_mode, }; @@ -268,17 +357,11 @@ static struct pxaficp_platform_data palmtx_ficp_platform_data = { /****************************************************************************** * UDC ******************************************************************************/ -static void palmtx_udc_command(int cmd) -{ - gpio_set_value(GPIO_NR_PALMTX_USB_POWER, !cmd); - udelay(50); - gpio_set_value(GPIO_NR_PALMTX_USB_PULLUP, !cmd); -} - static struct pxa2xx_udc_mach_info palmtx_udc_info __initdata = { .gpio_vbus = GPIO_NR_PALMTX_USB_DETECT_N, .gpio_vbus_inverted = 1, - .udc_command = palmtx_udc_command, + .gpio_pullup = GPIO_NR_PALMTX_USB_POWER, + .gpio_pullup_inverted = 0, }; /****************************************************************************** @@ -290,17 +373,16 @@ static int power_supply_init(struct device *dev) ret = gpio_request(GPIO_NR_PALMTX_POWER_DETECT, "CABLE_STATE_AC"); if (ret) - goto err_cs_ac; - - ret = gpio_request(GPIO_NR_PALMTX_USB_DETECT_N, "CABLE_STATE_USB"); + goto err1; + ret = gpio_direction_input(GPIO_NR_PALMTX_POWER_DETECT); if (ret) - goto err_cs_usb; + goto err2; return 0; -err_cs_usb: +err2: gpio_free(GPIO_NR_PALMTX_POWER_DETECT); -err_cs_ac: +err1: return ret; } @@ -309,14 +391,8 @@ static int palmtx_is_ac_online(void) return gpio_get_value(GPIO_NR_PALMTX_POWER_DETECT); } -static int palmtx_is_usb_online(void) -{ - return !gpio_get_value(GPIO_NR_PALMTX_USB_DETECT_N); -} - static void power_supply_exit(struct device *dev) { - gpio_free(GPIO_NR_PALMTX_USB_DETECT_N); gpio_free(GPIO_NR_PALMTX_POWER_DETECT); } @@ -327,7 +403,6 @@ static char *palmtx_supplicants[] = { static struct pda_power_pdata power_supply_info = { .init = power_supply_init, .is_ac_online = palmtx_is_ac_online, - .is_usb_online = palmtx_is_usb_online, .exit = power_supply_exit, .supplied_to = palmtx_supplicants, .num_supplicants = ARRAY_SIZE(palmtx_supplicants), @@ -410,12 +485,23 @@ static void __init palmtx_map_io(void) iotable_init(palmtx_io_desc, ARRAY_SIZE(palmtx_io_desc)); } +/* setup udc GPIOs initial state */ +static void __init palmtx_udc_init(void) +{ + if (!gpio_request(GPIO_NR_PALMTX_USB_POWER, "UDC Vbus")) { + gpio_direction_output(GPIO_NR_PALMTX_USB_POWER, 1); + gpio_free(GPIO_NR_PALMTX_USB_POWER); + } +} + + static void __init palmtx_init(void) { pxa2xx_mfp_config(ARRAY_AND_SIZE(palmtx_pin_config)); set_pxa_fb_info(&palmtx_lcd_screen); pxa_set_mci_info(&palmtx_mci_platform_data); + palmtx_udc_init(); pxa_set_udc_info(&palmtx_udc_info); pxa_set_ac97_info(NULL); pxa_set_ficp_info(&palmtx_ficp_platform_data); -- cgit v1.2.3 From 020f97063dd68a8e3b9aac928ac49a438b7416ce Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 1 Dec 2008 17:40:54 +0000 Subject: [ARM] omap: fix a pile of issues This patch fixes a number of sillies, from missing 'const' to using 'return' in void functions, to functions with no arguments not even 'void' and a cast which isn't required. Acked-by: Tony Lindgren Signed-off-by: Russell King --- arch/arm/mach-omap1/io.c | 2 +- arch/arm/plat-omap/include/mach/omapfb.h | 4 ++-- arch/arm/plat-omap/sram.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c index b3bd8ca8511..4c3e582f3d3 100644 --- a/arch/arm/mach-omap1/io.c +++ b/arch/arm/mach-omap1/io.c @@ -128,7 +128,7 @@ void __init omap1_map_common_io(void) * Common low-level hardware init for omap1. This should only get called from * board specific init. */ -void __init omap1_init_common_hw() +void __init omap1_init_common_hw(void) { /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort * on a Posted Write in the TIPB Bridge". diff --git a/arch/arm/plat-omap/include/mach/omapfb.h b/arch/arm/plat-omap/include/mach/omapfb.h index ec67fb42860..7b74d1255e0 100644 --- a/arch/arm/plat-omap/include/mach/omapfb.h +++ b/arch/arm/plat-omap/include/mach/omapfb.h @@ -353,8 +353,8 @@ struct omapfb_device { u32 pseudo_palette[17]; struct lcd_panel *panel; /* LCD panel */ - struct lcd_ctrl *ctrl; /* LCD controller */ - struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ + const struct lcd_ctrl *ctrl; /* LCD controller */ + const struct lcd_ctrl *int_ctrl; /* internal LCD ctrl */ struct lcd_ctrl_extif *ext_if; /* LCD ctrl external interface */ struct device *dev; diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 9f9a921829c..dcd9d16da2e 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c @@ -255,7 +255,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl) if (!_omap_sram_reprogram_clock) omap_sram_error(); - return _omap_sram_reprogram_clock(dpllctl, ckctl); + _omap_sram_reprogram_clock(dpllctl, ckctl); } int __init omap1_sram_init(void) @@ -282,8 +282,8 @@ void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, if (!_omap2_sram_ddr_init) omap_sram_error(); - return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, - base_cs, force_unlock); + _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, + base_cs, force_unlock); } static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, @@ -294,7 +294,7 @@ void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type) if (!_omap2_sram_reprogram_sdrc) omap_sram_error(); - return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); + _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); } static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); -- cgit v1.2.3 From b93c35ff39d19f20c47c06c206986afefecc777a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Mon, 1 Dec 2008 13:13:57 -0800 Subject: spi: fix spi_s3c24xx_gpio num_chipselect The spi master driver must have num_chipselect set to allow the bus to initialise. Pass this through the platform data. Signed-off-by: Ben Dooks Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/arm/mach-s3c2410/include/mach/spi-gpio.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h index 3fe8be9ca11..980a099e209 100644 --- a/arch/arm/mach-s3c2410/include/mach/spi-gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/spi-gpio.h @@ -18,6 +18,7 @@ struct s3c2410_spigpio_info { unsigned long pin_mosi; unsigned long pin_miso; + int num_chipselect; int bus_num; void (*chip_select)(struct s3c2410_spigpio_info *spi, int cs); -- cgit v1.2.3 From 82676d76252680fc035247fd4cfdb07ffce5db52 Mon Sep 17 00:00:00 2001 From: Saeed Bishara Date: Thu, 27 Nov 2008 06:21:03 -1100 Subject: [ARM] Orion: fix bug in pcie configuration cycle function field mask The function field is 3 bits. Signed-off-by: Saeed Bishara Signed-off-by: Nicolas Pitre --- arch/arm/plat-orion/pcie.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 883902fead8..d41d41d78ad 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -35,7 +35,7 @@ #define PCIE_CONF_REG(r) ((((r) & 0xf00) << 16) | ((r) & 0xfc)) #define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) #define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) -#define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) +#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 8) #define PCIE_CONF_DATA_OFF 0x18fc #define PCIE_MASK_OFF 0x1910 #define PCIE_CTRL_OFF 0x1a00 -- cgit v1.2.3 From 94fc7336646b392234c0fafea5d696d020c3677c Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 4 Dec 2008 03:59:41 +0100 Subject: [ARM] 5339/1: fix __fls() on ARM Commit 0c65f459ce6c intended to fix truncation issues with fls() on ARMv5+ by renaming it to __fls() and wrapping it into a C function. However that didn't take into account the fact that __fls() already already had different semantics in the kernel. Let's move the __fls() code into fls() function directly, and redefine __fls() with the appropriate semantics. While at it, bring a generic __fls() definition for pre ARMv5 too. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/include/asm/bitops.h | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/bitops.h b/arch/arm/include/asm/bitops.h index 9a1db20e032..63a481fbbed 100644 --- a/arch/arm/include/asm/bitops.h +++ b/arch/arm/include/asm/bitops.h @@ -237,6 +237,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset); #if __LINUX_ARM_ARCH__ < 5 #include +#include #include #include #include @@ -277,16 +278,19 @@ static inline int constant_fls(int x) * the clz instruction for much better code efficiency. */ -#define __fls(x) \ - ( __builtin_constant_p(x) ? constant_fls(x) : \ - ({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) ) - -/* Implement fls() in C so that 64-bit args are suitably truncated */ static inline int fls(int x) { - return __fls(x); + int ret; + + if (__builtin_constant_p(x)) + return constant_fls(x); + + asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc"); + ret = 32 - ret; + return ret; } +#define __fls(x) (fls(x) - 1) #define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); }) #define __ffs(x) (ffs(x) - 1) #define ffz(x) __ffs( ~(x) ) -- cgit v1.2.3 From 794baba637999b81aa40e60fae1fa91978e08808 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 5 Dec 2008 03:25:47 +0100 Subject: [ARM] 5340/1: fix stack placement after noexecstack changes Commit 8ec53663d2698076468b3e1edc4e1b418bd54de3 ("[ARM] Improve non-executable support") added support for detecting non-executable stack binaries. One of the things it does is to make READ_IMPLIES_EXEC be set in ->personality if we are running on a CPU that doesn't support the XN ("Execute Never") page table bit or if we are running a binary that needs an executable stack. This exposed a latent bug in ARM's asm/processor.h due to which we'll end up placing the stack at a very low address, where it will bump into the heap on any application that uses significant amount of stack or heap or both, causing many interesting crashes. Fix this by testing the ADDR_LIMIT_32BIT bit in ->personality instead of testing for equality against PER_LINUX_32BIT. Reviewed-by: Nicolas Pitre Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/include/asm/processor.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h index 517a4d6ffc7..6ff33790f47 100644 --- a/arch/arm/include/asm/processor.h +++ b/arch/arm/include/asm/processor.h @@ -23,7 +23,7 @@ #include #ifdef __KERNEL__ -#define STACK_TOP ((current->personality == PER_LINUX_32BIT) ? \ +#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \ TASK_SIZE : TASK_SIZE_26) #define STACK_TOP_MAX TASK_SIZE #endif -- cgit v1.2.3 From baa745a3378046ca1c5477495df6ccbec7690428 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 7 Dec 2008 09:44:55 +0000 Subject: [ARM] Fix alignment fault handling for ARMv6 and later CPUs On ARMv6 and later CPUs, it is possible for userspace processes to get stuck on a misaligned load or store due to the "ignore fault" setting; unlike previous CPUs, retrying the instruction without the 'A' bit set does not always cause the load to succeed. We have no real option but to default to fixing up alignment faults on these CPUs, and having the CPU fix up those misaligned accesses which it can. Reported-by: Wolfgang Grandegger Signed-off-by: Russell King --- arch/arm/mm/alignment.c | 26 +++++++++++++++++++++++--- 1 file changed, 23 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index 133e65d166b..2d5884ce043 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -70,6 +70,10 @@ static unsigned long ai_dword; static unsigned long ai_multi; static int ai_usermode; +#define UM_WARN (1 << 0) +#define UM_FIXUP (1 << 1) +#define UM_SIGNAL (1 << 2) + #ifdef CONFIG_PROC_FS static const char *usermode_action[] = { "ignored", @@ -754,7 +758,7 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) user: ai_user += 1; - if (ai_usermode & 1) + if (ai_usermode & UM_WARN) printk("Alignment trap: %s (%d) PC=0x%08lx Instr=0x%0*lx " "Address=0x%08lx FSR 0x%03x\n", current->comm, task_pid_nr(current), instrptr, @@ -762,10 +766,10 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs) thumb_mode(regs) ? tinstr : instr, addr, fsr); - if (ai_usermode & 2) + if (ai_usermode & UM_FIXUP) goto fixup; - if (ai_usermode & 4) + if (ai_usermode & UM_SIGNAL) force_sig(SIGBUS, current); else set_cr(cr_no_alignment); @@ -796,6 +800,22 @@ static int __init alignment_init(void) res->write_proc = proc_alignment_write; #endif + /* + * ARMv6 and later CPUs can perform unaligned accesses for + * most single load and store instructions up to word size. + * LDM, STM, LDRD and STRD still need to be handled. + * + * Ignoring the alignment fault is not an option on these + * CPUs since we spin re-faulting the instruction without + * making any progress. + */ + if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) { + cr_alignment &= ~CR_A; + cr_no_alignment &= ~CR_A; + set_cr(cr_alignment); + ai_usermode = UM_FIXUP; + } + hook_fault_code(1, do_alignment, SIGILL, "alignment exception"); hook_fault_code(3, do_alignment, SIGILL, "alignment exception"); -- cgit v1.2.3 From 674a0a6939a954ab92fdd9833943e2277550bb0a Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Tue, 9 Dec 2008 03:13:39 +0100 Subject: [ARM] 5341/2: there is no copy_page on nommu ARM ... as it is defined with memcpy, therefore no copy_page symbol to export. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index c74f766ffc1..23af3c972c9 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -115,6 +115,8 @@ EXPORT_SYMBOL(__strnlen_user); EXPORT_SYMBOL(__strncpy_from_user); #ifdef CONFIG_MMU +EXPORT_SYMBOL(copy_page); + EXPORT_SYMBOL(__copy_from_user); EXPORT_SYMBOL(__copy_to_user); EXPORT_SYMBOL(__clear_user); @@ -181,8 +183,6 @@ EXPORT_SYMBOL(_find_first_bit_be); EXPORT_SYMBOL(_find_next_bit_be); #endif -EXPORT_SYMBOL(copy_page); - #ifdef CONFIG_FUNCTION_TRACER EXPORT_SYMBOL(mcount); #endif -- cgit v1.2.3 From 442a902262e1dfc3f1298ceea5f3120fe2043904 Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Sat, 13 Dec 2008 16:37:59 +0100 Subject: [ARM] arch/arm/common/sa1111.c: Correct error handling code If it is reasonable to apply PTR_ERR to the result of calling clk_get, then that result should first be tested with IS_ERR, not with !. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/) // @@ expression E,E1; @@ if ( - E == NULL + IS_ERR(E) ) { <+... when != E = E1 PTR_ERR(E) ...+> } // Signed-off-by: Julia Lawall Signed-off-by: Russell King --- arch/arm/common/sa1111.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/common/sa1111.c b/arch/arm/common/sa1111.c index 47ccec95f3e..ef12794c3c6 100644 --- a/arch/arm/common/sa1111.c +++ b/arch/arm/common/sa1111.c @@ -630,7 +630,7 @@ __sa1111_probe(struct device *me, struct resource *mem, int irq) return -ENOMEM; sachip->clk = clk_get(me, "SA1111_CLK"); - if (!sachip->clk) { + if (IS_ERR(sachip->clk)) { ret = PTR_ERR(sachip->clk); goto err_free; } -- cgit v1.2.3 From 3909845e26439148a484d1ac30bb65e5e0ff63ec Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Mon, 1 Dec 2008 14:15:37 -0800 Subject: [ARM] fix kernel-doc syntax Fix kernel-doc notation to use correct syntax. Even though this should be moved to where the function is actually implemented... Signed-off-by: Randy Dunlap Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-pxa/include/mach/reset.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-pxa/include/mach/reset.h b/arch/arm/mach-pxa/include/mach/reset.h index 7b8842cfa5f..31e6a7b6ad8 100644 --- a/arch/arm/mach-pxa/include/mach/reset.h +++ b/arch/arm/mach-pxa/include/mach/reset.h @@ -12,9 +12,8 @@ extern void clear_reset_status(unsigned int mask); /** * init_gpio_reset() - register GPIO as reset generator - * - * @gpio - gpio nr - * @output - set gpio as out/low instead of input during normal work + * @gpio: gpio nr + * @output: set gpio as out/low instead of input during normal work */ extern int init_gpio_reset(int gpio, int output); -- cgit v1.2.3 From 67306da610a3e4824192e92888634d3d8700bfc1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 14 Dec 2008 18:01:44 +0000 Subject: [ARM] Ensure linux/hardirqs.h is included where required ... for the removal of it from asm-generic/local.h Signed-off-by: Russell King --- arch/arm/kernel/traps.c | 1 + arch/arm/mm/fault.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 57e6874d0b8..79abc4ddc0c 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index 2df8d9facf5..22c9530e91e 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3