From 9d631b835f518848b7f3ce803bfd00dc1bb8a5b1 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 18 Dec 2008 11:08:55 +0100 Subject: [ARM] MXC: remove dependency to other include files from irqs.h This patch removes the inclusion of mach/hardware.h from mach/irqs.h and switches to more meaningful names for the irq related macros. Signed-off-by: Sascha Hauer --- arch/arm/mach-mx1/devices.c | 8 ++++---- arch/arm/mach-mx2/devices.c | 12 ++++++------ arch/arm/mach-mx3/devices.c | 6 +++--- arch/arm/plat-mxc/include/mach/board-mx27ads.h | 2 +- arch/arm/plat-mxc/include/mach/board-mx31ads.h | 2 +- arch/arm/plat-mxc/include/mach/gpio.h | 4 ++-- arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h | 4 ++-- arch/arm/plat-mxc/include/mach/iomux-mx3.h | 2 +- arch/arm/plat-mxc/include/mach/irqs.h | 27 +++++++++++++++++++++++++- arch/arm/plat-mxc/include/mach/mx1.h | 4 ---- arch/arm/plat-mxc/include/mach/mx27.h | 6 ------ arch/arm/plat-mxc/include/mach/mx31.h | 17 ---------------- arch/arm/plat-mxc/irq.c | 8 ++++---- 13 files changed, 50 insertions(+), 52 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mx1/devices.c b/arch/arm/mach-mx1/devices.c index ad4679b9087..686d8d2dbb2 100644 --- a/arch/arm/mach-mx1/devices.c +++ b/arch/arm/mach-mx1/devices.c @@ -232,25 +232,25 @@ static struct mxc_gpio_port imx_gpio_ports[] = { .chip.label = "gpio-0", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR), .irq = GPIO_INT_PORTA, - .virtual_irq_start = MXC_MAX_INT_LINES + .virtual_irq_start = MXC_GPIO_IRQ_START }, [1] = { .chip.label = "gpio-1", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100), .irq = GPIO_INT_PORTB, - .virtual_irq_start = MXC_MAX_INT_LINES + 32 + .virtual_irq_start = MXC_GPIO_IRQ_START + 32 }, [2] = { .chip.label = "gpio-2", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200), .irq = GPIO_INT_PORTC, - .virtual_irq_start = MXC_MAX_INT_LINES + 64 + .virtual_irq_start = MXC_GPIO_IRQ_START + 64 }, [3] = { .chip.label = "gpio-3", .base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300), .irq = GPIO_INT_PORTD, - .virtual_irq_start = MXC_MAX_INT_LINES + 96 + .virtual_irq_start = MXC_GPIO_IRQ_START + 96 } }; diff --git a/arch/arm/mach-mx2/devices.c b/arch/arm/mach-mx2/devices.c index 0bad8652774..af121f5ab71 100644 --- a/arch/arm/mach-mx2/devices.c +++ b/arch/arm/mach-mx2/devices.c @@ -230,32 +230,32 @@ static struct mxc_gpio_port imx_gpio_ports[] = { .chip.label = "gpio-0", .irq = MXC_INT_GPIO, .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), - .virtual_irq_start = MXC_MAX_INT_LINES, + .virtual_irq_start = MXC_GPIO_IRQ_START, }, [1] = { .chip.label = "gpio-1", .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), - .virtual_irq_start = MXC_MAX_INT_LINES + 32, + .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, [2] = { .chip.label = "gpio-2", .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), - .virtual_irq_start = MXC_MAX_INT_LINES + 64, + .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, [3] = { .chip.label = "gpio-3", .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), - .virtual_irq_start = MXC_MAX_INT_LINES + 96, + .virtual_irq_start = MXC_GPIO_IRQ_START + 96, }, [4] = { .chip.label = "gpio-4", .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), - .virtual_irq_start = MXC_MAX_INT_LINES + 128, + .virtual_irq_start = MXC_GPIO_IRQ_START + 128, }, [5] = { .chip.label = "gpio-5", .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), - .virtual_irq_start = MXC_MAX_INT_LINES + 160, + .virtual_irq_start = MXC_GPIO_IRQ_START + 160, } }; diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c index 3e61ff4646f..1d46cb4adf9 100644 --- a/arch/arm/mach-mx3/devices.c +++ b/arch/arm/mach-mx3/devices.c @@ -125,19 +125,19 @@ static struct mxc_gpio_port imx_gpio_ports[] = { .chip.label = "gpio-0", .base = IO_ADDRESS(GPIO1_BASE_ADDR), .irq = MXC_INT_GPIO1, - .virtual_irq_start = MXC_GPIO_INT_BASE + .virtual_irq_start = MXC_GPIO_IRQ_START, }, [1] = { .chip.label = "gpio-1", .base = IO_ADDRESS(GPIO2_BASE_ADDR), .irq = MXC_INT_GPIO2, - .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN + .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, [2] = { .chip.label = "gpio-2", .base = IO_ADDRESS(GPIO3_BASE_ADDR), .irq = MXC_INT_GPIO3, - .virtual_irq_start = MXC_GPIO_INT_BASE + GPIO_NUM_PIN * 2 + .virtual_irq_start = MXC_GPIO_IRQ_START + 64, } }; diff --git a/arch/arm/plat-mxc/include/mach/board-mx27ads.h b/arch/arm/plat-mxc/include/mach/board-mx27ads.h index 0c748a8e157..8f34a05afc8 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx27ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx27ads.h @@ -15,7 +15,7 @@ #define __ASM_ARCH_MXC_BOARD_MX27ADS_H__ /* external interrupt multiplexer */ -#define MXC_EXP_IO_BASE (MXC_GPIO_BASE + MXC_MAX_GPIO_LINES) +#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) #define MXC_VIRTUAL_INTS_BASE (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES) #define MXC_SDIO1_CARD_IRQ MXC_VIRTUAL_INTS_BASE diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h index 745b48864f9..451d510d08c 100644 --- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h +++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h @@ -90,7 +90,7 @@ #define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS) #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4) -#define MXC_EXP_IO_BASE (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES) +#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) #define EXPIO_INT_LOW_BAT (MXC_EXP_IO_BASE + 0) diff --git a/arch/arm/plat-mxc/include/mach/gpio.h b/arch/arm/plat-mxc/include/mach/gpio.h index 65eedc0d196..ea509f1090f 100644 --- a/arch/arm/plat-mxc/include/mach/gpio.h +++ b/arch/arm/plat-mxc/include/mach/gpio.h @@ -27,8 +27,8 @@ #define gpio_set_value __gpio_set_value #define gpio_cansleep __gpio_cansleep -#define gpio_to_irq(gpio) (MXC_MAX_INT_LINES + (gpio)) -#define irq_to_gpio(irq) ((irq) - MXC_MAX_INT_LINES) +#define gpio_to_irq(gpio) (MXC_GPIO_IRQ_START + (gpio)) +#define irq_to_gpio(irq) ((irq) - MXC_GPIO_IRQ_START) struct mxc_gpio_port { void __iomem *base; diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h index 60b3c9b6ef7..95a383be628 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx1-mx2.h @@ -405,9 +405,9 @@ extern void mxc_gpio_release_multiple_pins(const int *pin_list, int count); #endif /* decode irq number to use with IMR(x), ISR(x) and friends */ -#define IRQ_TO_REG(irq) ((irq - MXC_MAX_INT_LINES) >> 5) +#define IRQ_TO_REG(irq) ((irq - MXC_INTERNAL_IRQS) >> 5) -#define IRQ_GPIOA(x) (MXC_MAX_INT_LINES + x) +#define IRQ_GPIOA(x) (MXC_GPIO_IRQ_START + x) #define IRQ_GPIOB(x) (IRQ_GPIOA(32) + x) #define IRQ_GPIOC(x) (IRQ_GPIOB(32) + x) #define IRQ_GPIOD(x) (IRQ_GPIOC(32) + x) diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 20e5c4c6331..c9198c0aea1 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h @@ -141,7 +141,7 @@ void mxc_iomux_set_gpr(enum iomux_gp_func, bool); ((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) #define IOMUX_TO_IRQ(iomux_pin) \ (((iomux_pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT) + \ - MXC_GPIO_INT_BASE) + MXC_GPIO_IRQ_START) /* * This enumeration is constructed based on the Section diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index b8ac91608a4..e06d3cb0ee1 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -11,7 +11,32 @@ #ifndef __ASM_ARCH_MXC_IRQS_H__ #define __ASM_ARCH_MXC_IRQS_H__ -#include +/* + * So far all i.MX SoCs have 64 internal interrupts + */ +#define MXC_INTERNAL_IRQS 64 + +#define MXC_GPIO_IRQ_START MXC_INTERNAL_IRQS + +#if defined CONFIG_ARCH_MX1 +#define MXC_GPIO_IRQS (32 * 4) +#elif defined CONFIG_ARCH_MX2 +#define MXC_GPIO_IRQS (32 * 6) +#elif defined CONFIG_ARCH_MX3 +#define MXC_GPIO_IRQS (32 * 3) +#endif + +/* + * The next 16 interrupts are for board specific purposes. Since + * the kernel can only run on one machine at a time, we can re-use + * these. If you need more, increase MXC_BOARD_IRQS, but keep it + * within sensible limits. + */ +#define MXC_BOARD_IRQ_START (MXC_INTERNAL_IRQS + MXC_GPIO_IRQS) +#define MXC_BOARD_IRQS 16 + +#define NR_IRQS (MXC_BOARD_IRQ_START + MXC_BOARD_IRQS) + extern void imx_irq_set_priority(unsigned char irq, unsigned char prio); /* all normal IRQs can be FIQs */ diff --git a/arch/arm/plat-mxc/include/mach/mx1.h b/arch/arm/plat-mxc/include/mach/mx1.h index e7f6d00009a..c45bf5f5b90 100644 --- a/arch/arm/plat-mxc/include/mach/mx1.h +++ b/arch/arm/plat-mxc/include/mach/mx1.h @@ -145,10 +145,6 @@ #define GPIO_INT_PORTD 62 #define WDT_INT 63 -#define MXC_MAX_INT_LINES 64 - -#define NR_IRQS 256 - /* gpio and gpio based interrupt handling */ #define GPIO_DR 0x1C #define GPIO_GDIR 0x00 diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h index aade46d90e7..55bcbd5e073 100644 --- a/arch/arm/plat-mxc/include/mach/mx27.h +++ b/arch/arm/plat-mxc/include/mach/mx27.h @@ -295,10 +295,4 @@ extern int mx27_revision(void); /* Start of RAM */ #define PHYS_OFFSET SDRAM_BASE_ADDR -/* max interrupt lines count */ -#define NR_IRQS 256 - -/* count of internal interrupt sources */ -#define MXC_MAX_INT_LINES 64 - #endif /* __ASM_ARCH_MXC_MX27_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index 0536f8917bc..65c3109b519 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -315,23 +315,6 @@ #define MXC_INT_EXT_WDOG 62 #define MXC_INT_EXT_TV 63 -#define MXC_MAX_INT_LINES 64 - -#define MXC_GPIO_INT_BASE MXC_MAX_INT_LINES -#define MXC_MAX_GPIO_LINES (GPIO_NUM_PIN * GPIO_PORT_NUM) -#define MXC_MAX_VIRTUAL_INTS 16 - -#define NR_IRQS (MXC_MAX_INT_LINES + MXC_MAX_GPIO_LINES + MXC_MAX_VIRTUAL_INTS) - -/*! - * Number of GPIO port as defined in the IC Spec - */ -#define GPIO_PORT_NUM 3 -/*! - * Number of GPIO pins per port - */ -#define GPIO_NUM_PIN 32 - #define PROD_SIGNATURE 0x1 /* For MX31 */ /* silicon revisions specific to i.MX31 */ diff --git a/arch/arm/plat-mxc/irq.c b/arch/arm/plat-mxc/irq.c index e937c8759a9..06862654a89 100644 --- a/arch/arm/plat-mxc/irq.c +++ b/arch/arm/plat-mxc/irq.c @@ -72,14 +72,14 @@ int mxc_set_irq_fiq(unsigned int irq, unsigned int type) { unsigned int irqt; - if (irq >= MXC_MAX_INT_LINES) + if (irq >= MXC_INTERNAL_IRQS) return -EINVAL; - if (irq < MXC_MAX_INT_LINES / 2) { + if (irq < MXC_INTERNAL_IRQS / 2) { irqt = __raw_readl(AVIC_INTTYPEL) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEL); } else { - irq -= MXC_MAX_INT_LINES / 2; + irq -= MXC_INTERNAL_IRQS / 2; irqt = __raw_readl(AVIC_INTTYPEH) & ~(1 << irq); __raw_writel(irqt | (!!type << irq), AVIC_INTTYPEH); } @@ -129,7 +129,7 @@ void __init mxc_init_irq(void) /* all IRQ no FIQ */ __raw_writel(0, AVIC_INTTYPEH); __raw_writel(0, AVIC_INTTYPEL); - for (i = 0; i < MXC_MAX_INT_LINES; i++) { + for (i = 0; i < MXC_INTERNAL_IRQS; i++) { set_irq_chip(i, &mxc_avic_chip); set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); -- cgit v1.2.3