From c8342f872d7a3967fd09db54fece3f6c38d834df Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Tue, 31 Mar 2009 00:18:35 +0000 Subject: Blackfin: add some help text to the EBIU_AMBCTL settings Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/Kconfig | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 3640cdc38aa..6b97aa811e2 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -1011,21 +1011,34 @@ endmenu menu "EBIU_AMBCTL Control" config BANK_0 - hex "Bank 0" + hex "Bank 0 (AMBCTL0.L)" default 0x7BB0 + help + These are the low 16 bits of the EBIU_AMBCTL0 MMR which are + used to control the Asynchronous Memory Bank 0 settings. config BANK_1 - hex "Bank 1" + hex "Bank 1 (AMBCTL0.H)" default 0x7BB0 default 0x5558 if BF54x + help + These are the high 16 bits of the EBIU_AMBCTL0 MMR which are + used to control the Asynchronous Memory Bank 1 settings. config BANK_2 - hex "Bank 2" + hex "Bank 2 (AMBCTL1.L)" default 0x7BB0 + help + These are the low 16 bits of the EBIU_AMBCTL1 MMR which are + used to control the Asynchronous Memory Bank 2 settings. config BANK_3 - hex "Bank 3" + hex "Bank 3 (AMBCTL1.H)" default 0x99B3 + help + These are the high 16 bits of the EBIU_AMBCTL1 MMR which are + used to control the Asynchronous Memory Bank 3 settings. + endmenu config EBIU_MBSCTLVAL -- cgit v1.2.3 From f82e0a0c67621df83458753aef580a3508d5428e Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Wed, 8 Apr 2009 08:30:22 +0000 Subject: Blackfin: fix link failure due to CONFIG_EXCEPTION_L1_SCRATCH Move exception stack mess from entry.S to init.c to fix link failure when CONFIG_EXCEPTION_L1_SCRATCH is in use. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 6b97aa811e2..672b7b056c8 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -808,7 +808,7 @@ config APP_STACK_L1 config EXCEPTION_L1_SCRATCH bool "Locate exception stack in L1 Scratch Memory" default n - depends on !APP_STACK_L1 && !SYSCALL_TAB_L1 + depends on !APP_STACK_L1 help Whenever an exception occurs, use the L1 Scratch memory for stack storage. You cannot place the stacks of FLAT binaries -- cgit v1.2.3 From f8b556514c4481a500ace4745731f04a77c08d54 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 13 Apr 2009 21:58:34 +0000 Subject: Blackfin: set bf51x/bf52x to 0.0 rev by default and bf54x to 0.2 Update the default revs based on what we actually support (bf54x-0.[01] is too broken to use). Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 672b7b056c8..cea2bfd64a5 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -263,8 +263,8 @@ config BF_REV_MAX choice prompt "Silicon Rev" - default BF_REV_0_1 if (BF51x || BF52x || (BF54x && !BF54xM)) - default BF_REV_0_2 if (BF534 || BF536 || BF537) + default BF_REV_0_0 if (BF51x || BF52x) + default BF_REV_0_2 if (BF534 || BF536 || BF537 || (BF54x && !BF54xM)) default BF_REV_0_3 if (BF531 || BF532 || BF533 || BF54xM || BF561) config BF_REV_0_0 -- cgit v1.2.3 From 1fa9be72b558c39459f98835eb86dbb4ef4da30b Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Fri, 15 May 2009 11:01:59 +0000 Subject: Blackfin: add support for gptimer0 as a tick source For systems where the core cycles are not a usable tick source (like SMP or cycles gets updated), enable gptimer0 as an alternative. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/Kconfig | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index cea2bfd64a5..c04e7a4836f 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -241,12 +241,6 @@ config IRQ_PER_CPU depends on SMP default y -config TICK_SOURCE_SYSTMR0 - bool - select BFIN_GPTIMERS - depends on SMP - default y - config BF_REV_MIN int default 0 if (BF51x || BF52x || (BF54x && !BF54xM)) @@ -607,7 +601,6 @@ source kernel/Kconfig.hz config GENERIC_TIME bool "Generic time" - depends on !SMP default y config GENERIC_CLOCKEVENTS @@ -615,12 +608,26 @@ config GENERIC_CLOCKEVENTS depends on GENERIC_TIME default y +choice + prompt "Kernel Tick Source" + depends on GENERIC_CLOCKEVENTS + default TICKSOURCE_CORETMR + +config TICKSOURCE_GPTMR0 + bool "Gptimer0 (SCLK domain)" + select BFIN_GPTIMERS + depends on !IPIPE + +config TICKSOURCE_CORETMR + bool "Core timer (CCLK domain)" + +endchoice + config CYCLES_CLOCKSOURCE - bool "Use 'CYCLES' as a clocksource (EXPERIMENTAL)" - depends on EXPERIMENTAL + bool "Use 'CYCLES' as a clocksource" depends on GENERIC_CLOCKEVENTS depends on !BFIN_SCRATCH_REG_CYCLES - default n + depends on !SMP help If you say Y here, you will enable support for using the 'cycles' registers as a clock source. Doing so means you will be unable to @@ -628,6 +635,11 @@ config CYCLES_CLOCKSOURCE still be able to read it (such as for performance monitoring), but writing the registers will most likely crash the kernel. +config GPTMR0_CLOCKSOURCE + bool "Use GPTimer0 as a clocksource (higher rating)" + depends on GENERIC_CLOCKEVENTS + depends on !TICKSOURCE_GPTMR0 + source kernel/time/Kconfig comment "Misc" -- cgit v1.2.3 From 5ba766752d14a741aa2d7a3c321917a310b34afb Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Thu, 7 May 2009 04:09:15 +0000 Subject: Blackfin: work around anomaly 05000220 When possible, work around anomaly 05000220 (external memory is write back cached, but L2 is not cached). If not possible, detect the conditions at build time and reject any qualifying configurations. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/Kconfig | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c04e7a4836f..f1a7969b46c 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -913,7 +913,7 @@ config BFIN_ICACHE_LOCK bool "Enable Instruction Cache Locking" choice - prompt "Policy" + prompt "External memory cache policy" depends on BFIN_DCACHE default BFIN_WB if !SMP default BFIN_WT if SMP @@ -954,12 +954,22 @@ config BFIN_WT endchoice -config BFIN_L2_CACHEABLE - bool "Cache L2 SRAM" - depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP)) - default n - help - Select to make L2 SRAM cacheable in L1 data and instruction cache. +choice + prompt "L2 SRAM cache policy" + depends on (BF54x || BF561) + default BFIN_L2_WT +config BFIN_L2_WB + bool "Write back" + depends on !SMP + +config BFIN_L2_WT + bool "Write through" + depends on !SMP + +config BFIN_L2_NOT_CACHED + bool "Not cached" + +endchoice config MPU bool "Enable the memory protection unit (EXPERIMENTAL)" -- cgit v1.2.3 From 9b9bfded623cffb4259b95e5419404015dba361f Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Wed, 27 May 2009 09:58:35 +0000 Subject: Blackfin: convert SMP to only use generic time framework Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/blackfin/Kconfig') diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index f1a7969b46c..c56fd3eb7c1 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -223,6 +223,7 @@ endchoice config SMP depends on BF561 + select GENERIC_TIME bool "Symmetric multi-processing support" ---help--- This enables support for systems with more than one CPU, -- cgit v1.2.3