From 639f6571458948b5112be2cf00c0c2c04db2897d Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Wed, 27 Aug 2008 10:51:02 +0800 Subject: Blackfin arch: move include/asm-blackfin header files to arch/blackfin Signed-off-by: Bryan Wu --- arch/blackfin/include/asm/delay.h | 62 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 arch/blackfin/include/asm/delay.h (limited to 'arch/blackfin/include/asm/delay.h') diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h new file mode 100644 index 00000000000..0889c3abb59 --- /dev/null +++ b/arch/blackfin/include/asm/delay.h @@ -0,0 +1,62 @@ +/* + * delay.h - delay functions + * + * Copyright (c) 2004-2007 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#ifndef __ASM_DELAY_H__ +#define __ASM_DELAY_H__ + +#include + +static inline void __delay(unsigned long loops) +{ + if (ANOMALY_05000312) { + /* Interrupted loads to loop registers -> bad */ + unsigned long tmp; + __asm__ __volatile__( + "[--SP] = LC0;" + "[--SP] = LT0;" + "[--SP] = LB0;" + "LSETUP (1f,1f) LC0 = %1;" + "1: NOP;" + /* We take advantage of the fact that LC0 is 0 at + * the end of the loop. Otherwise we'd need some + * NOPs after the CLI here. + */ + "CLI %0;" + "LB0 = [SP++];" + "LT0 = [SP++];" + "LC0 = [SP++];" + "STI %0;" + : "=d" (tmp) + : "a" (loops) + ); + } else + __asm__ __volatile__ ( + "LSETUP(1f, 1f) LC0 = %0;" + "1: NOP;" + : + : "a" (loops) + : "LT0", "LB0", "LC0" + ); +} + +#include /* needed for HZ */ + +/* + * Use only for very small delays ( < 1 msec). Should probably use a + * lookup table, really, as the multiplications take much too long with + * short delays. This is a "reasonable" implementation, though (and the + * first constant multiplications gets optimized away if the delay is + * a constant) + */ +static inline void udelay(unsigned long usecs) +{ + extern unsigned long loops_per_jiffy; + __delay(usecs * loops_per_jiffy / (1000000 / HZ)); +} + +#endif -- cgit v1.2.3