From e47cc3d6acacffdc673779a44c21a4a12b20db23 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Wed, 6 May 2009 14:28:25 +1000 Subject: m68knommu: mask off all interrupts in ColdFire intc-simr controller The ColdFire intc-simr interrupt controller should mask off all interrupt sources at init time. Doing it here instead of separately in each platform setup. Signed-off-by: Greg Ungerer --- arch/m68k/include/asm/m532xsim.h | 33 --------------------------------- 1 file changed, 33 deletions(-) (limited to 'arch/m68k') diff --git a/arch/m68k/include/asm/m532xsim.h b/arch/m68k/include/asm/m532xsim.h index 41c57e0f445..021a0e15527 100644 --- a/arch/m68k/include/asm/m532xsim.h +++ b/arch/m68k/include/asm/m532xsim.h @@ -56,8 +56,6 @@ #define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */ -#define MCFSIM_IMR_MASKALL 0xFFFFFFFF /* All SIM intr sources */ - #define MCFINTC0_SIMR 0xFC04801C #define MCFINTC0_CIMR 0xFC04801D #define MCFINTC0_ICR0 0xFC048040 @@ -69,37 +67,6 @@ #define MCFSIM_ICR_TIMER2 (0xFC048040+33) -/* - * Macro to set IMR register. It is 32 bits on the 5307. - */ -#define mcf_getimr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) - -#define mcf_setimr(imr) \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr); - -#define mcf_getipr() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR)) - -#define mcf_getiprl() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRL)) - -#define mcf_getiprh() \ - *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRH)) - - -#define mcf_enable_irq0(irq) \ - *((volatile unsigned char *) (MCFINTC0_CIMR)) = (irq); - -#define mcf_enable_irq1(irq) \ - *((volatile unsigned char *) (MCFINTC1_CIMR)) = (irq); - -#define mcf_disable_irq0(irq) \ - *((volatile unsigned char *) (MCFINTC0_SIMR)) = (irq); - -#define mcf_disable_irq1(irq) \ - *((volatile unsigned char *) (MCFINTC1_SIMR)) = (irq); - /* * Define the Cache register flags. */ -- cgit v1.2.3