From cce335ae47e231398269fb05fa48e0e9cbf289e0 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 3 Nov 2007 02:05:43 +0000 Subject: [MIPS] 64-bit Sibyte kernels need DMA32. Sibyte SOCs only have 32-bit PCI. Due to the sparse use of the address space only the first 1GB of memory is mapped at physical addresses below 1GB. If a system has more than 1GB of memory 32-bit DMA will not be able to reach all of it. For now this patch is good enough to keep Sibyte users happy but it seems eventually something like swiotlb will be needed for Sibyte. Signed-off-by: Ralf Baechle --- arch/mips/kernel/setup.c | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) (limited to 'arch/mips/kernel') diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index a06a27d6cfc..7f6ddcb5d48 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -269,7 +269,7 @@ static void __init bootmem_init(void) static void __init bootmem_init(void) { - unsigned long reserved_end; + unsigned long init_begin, reserved_end; unsigned long mapstart = ~0UL; unsigned long bootmap_size; int i; @@ -342,6 +342,35 @@ static void __init bootmem_init(void) */ bootmap_size = init_bootmem_node(NODE_DATA(0), mapstart, min_low_pfn, max_low_pfn); + + + init_begin = PFN_UP(__pa_symbol(&__init_begin)); + for (i = 0; i < boot_mem_map.nr_map; i++) { + unsigned long start, end; + + start = PFN_UP(boot_mem_map.map[i].addr); + end = PFN_DOWN(boot_mem_map.map[i].addr + + boot_mem_map.map[i].size); + + if (start <= init_begin) + start = init_begin; + if (start >= end) + continue; + +#ifndef CONFIG_HIGHMEM + if (end > max_low_pfn) + end = max_low_pfn; + + /* + * ... finally, is the area going away? + */ + if (end <= start) + continue; +#endif + + add_active_range(0, start, end); + } + /* * Register fully available low RAM pages with the bootmem allocator. */ -- cgit v1.2.3