From 41c594ab65fc89573af296d192aa5235d09717ab Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 5 Apr 2006 09:45:45 +0100 Subject: [MIPS] MT: Improved multithreading support. Signed-off-by: Ralf Baechle --- arch/mips/mips-boards/sim/cmdline.c | 59 --------------------------------- arch/mips/mips-boards/sim/sim_cmdline.c | 6 ++-- arch/mips/mips-boards/sim/sim_smp.c | 14 -------- 3 files changed, 4 insertions(+), 75 deletions(-) delete mode 100644 arch/mips/mips-boards/sim/cmdline.c (limited to 'arch/mips/mips-boards/sim') diff --git a/arch/mips/mips-boards/sim/cmdline.c b/arch/mips/mips-boards/sim/cmdline.c deleted file mode 100644 index fef9fbd8e71..00000000000 --- a/arch/mips/mips-boards/sim/cmdline.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Kernel command line creation using the prom monitor (YAMON) argc/argv. - */ -#include -#include - -#include - -extern int prom_argc; -extern int *_prom_argv; - -/* - * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. - * This macro take care of sign extension. - */ -#define prom_argv(index) ((char *)(((int *)(int)_prom_argv)[(index)])) - -char arcs_cmdline[CL_SIZE]; - -char * __init prom_getcmdline(void) -{ - return &(arcs_cmdline[0]); -} - - -void __init prom_init_cmdline(void) -{ - char *cp; - int actr; - - actr = 1; /* Always ignore argv[0] */ - - cp = &(arcs_cmdline[0]); - while(actr < prom_argc) { - strcpy(cp, prom_argv(actr)); - cp += strlen(prom_argv(actr)); - *cp++ = ' '; - actr++; - } - if (cp != &(arcs_cmdline[0])) /* get rid of trailing space */ - --cp; - *cp = '\0'; -} diff --git a/arch/mips/mips-boards/sim/sim_cmdline.c b/arch/mips/mips-boards/sim/sim_cmdline.c index 9df37c6fca3..c63021a5dc6 100644 --- a/arch/mips/mips-boards/sim/sim_cmdline.c +++ b/arch/mips/mips-boards/sim/sim_cmdline.c @@ -26,8 +26,10 @@ char * __init prom_getcmdline(void) return arcs_cmdline; } - void __init prom_init_cmdline(void) { - /* nothing to do */ + char *cp; + cp = arcs_cmdline; + /* Get boot line from environment? */ + *cp = '\0'; } diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index a9f0c2bfe4a..b7084e7c4bf 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c @@ -44,8 +44,6 @@ void core_send_ipi(int cpu, unsigned int action) { #ifdef CONFIG_MIPS_MT_SMTC - void smtc_send_ipi(int, int, unsigned int); - smtc_send_ipi(cpu, LINUX_SMP_IPI, action); #endif /* CONFIG_MIPS_MT_SMTC */ /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */ @@ -59,15 +57,8 @@ void core_send_ipi(int cpu, unsigned int action) void __init prom_build_cpu_map(void) { #ifdef CONFIG_MIPS_MT_SMTC - extern int mipsmt_build_cpu_map(int startslot); int nextslot; - cpus_clear(phys_cpu_present_map); - - /* Register the boot CPU */ - - smp_prepare_boot_cpu(); - /* * As of November, 2004, MIPSsim only simulates one core * at a time. However, that core may be a MIPS MT core @@ -87,8 +78,6 @@ void __init prom_build_cpu_map(void) void prom_boot_secondary(int cpu, struct task_struct *idle) { #ifdef CONFIG_MIPS_MT_SMTC - extern void smtc_boot_secondary(int cpu, struct task_struct *t); - smtc_boot_secondary(cpu, idle); #endif /* CONFIG_MIPS_MT_SMTC */ } @@ -113,7 +102,6 @@ void prom_init_secondary(void) void prom_prepare_cpus(unsigned int max_cpus) { #ifdef CONFIG_MIPS_MT_SMTC - void mipsmt_prepare_cpus(int c); /* * As noted above, we can assume a single CPU for now * but it may be multithreaded. @@ -132,8 +120,6 @@ void prom_prepare_cpus(unsigned int max_cpus) void prom_smp_finish(void) { #ifdef CONFIG_MIPS_MT_SMTC - void smtc_smp_finish(void); - smtc_smp_finish(); #endif /* CONFIG_MIPS_MT_SMTC */ } -- cgit v1.2.3