From 5379a5fdf3cb2b23d00da2a1298167f9a1fb002a Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Wed, 12 Nov 2008 00:09:30 +0100 Subject: MIPS: RB532: Fix bit swapping in rb532_set_bit() The algorithm works unconditionally. If bitval is one, the first line is a no op and the second line sets the bit at offset position. Vice versa, if bitval is zero, the first line clears the bit at offset position and the second line is a no op. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 0e84c8ab6a3..e35cb75a3ae 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -119,13 +119,11 @@ static inline void rb532_set_bit(unsigned bitval, unsigned long flags; u32 val; - bitval = !!bitval; /* map parameter to {0,1} */ - local_irq_save(flags); val = readl(ioaddr); - val &= ~( ~bitval << offset ); /* unset bit if bitval == 0 */ - val |= ( bitval << offset ); /* set bit if bitval == 1 */ + val &= ~(!bitval << offset); /* unset bit if bitval == 0 */ + val |= (!!bitval << offset); /* set bit if bitval == 1 */ writel(val, ioaddr); local_irq_restore(flags); -- cgit v1.2.3 From 33763d571da995913299cd0509425decfa9e4be0 Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Fri, 28 Nov 2008 20:46:09 +0100 Subject: MIPS: RB532: Auto disable GPIO alternate function When a driver calls gpio_set_direction_{input,output}(), it obviously doesn't want the alternate function for that pin to be active (as the direction would not matter in that case). This patch ensures alternate function is disabled when the direction is being changed. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index e35cb75a3ae..f5b15a17432 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -169,8 +169,8 @@ static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) gpch = container_of(chip, struct rb532_gpio_chip, chip); - if (rb532_get_bit(offset, gpch->regbase + GPIOFUNC)) - return 1; /* alternate function, GPIOCFG is ignored */ + /* disable alternate function in case it's set */ + rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); return 0; @@ -186,8 +186,8 @@ static int rb532_gpio_direction_output(struct gpio_chip *chip, gpch = container_of(chip, struct rb532_gpio_chip, chip); - if (rb532_get_bit(offset, gpch->regbase + GPIOFUNC)) - return 1; /* alternate function, GPIOCFG is ignored */ + /* disable alternate function in case it's set */ + rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); /* set the initial output value */ rb532_set_bit(value, offset, gpch->regbase + GPIOD); -- cgit v1.2.3 From 84c2c562c101bd84ea0f796b9838296da1bf859e Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Fri, 28 Nov 2008 20:46:22 +0100 Subject: MIPS: RB532: remove useless CF GPIO initialisation As the pata-rb532-cf driver calls gpio_direction_input(), the calls to rb532_gpio_set_func() and rb532_gpio_direction_input() are not needed since the alternate function is automatically being disabled when changing the GPIO pin direction. The later two calls to rb532_gpio_set_{ilevel,istat}() are implicitly being done by the IRQ initialisation of pata-rb532-cf. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index f5b15a17432..b195f797c43 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -259,12 +259,6 @@ int __init rb532_gpio_init(void) return -ENXIO; } - /* configure CF_GPIO_NUM as CFRDY IRQ source */ - rb532_gpio_set_func(0, CF_GPIO_NUM); - rb532_gpio_direction_input(&rb532_gpio_chip->chip, CF_GPIO_NUM); - rb532_gpio_set_ilevel(1, CF_GPIO_NUM); - rb532_gpio_set_istat(0, CF_GPIO_NUM); - return 0; } arch_initcall(rb532_gpio_init); -- cgit v1.2.3 From deb1003329b65456c4e6702cd3bcc698d565a11e Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Mon, 19 Jan 2009 23:42:50 +0100 Subject: MIPS: RB532: Fix init of rb532_dev3_ctl_res This register just contains the address of the actual resource, so initialisation has to be the same as cf_slot0_res and nand_slot0_res. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index b195f797c43..2f2cb8dc653 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -55,8 +55,6 @@ static struct resource rb532_gpio_reg0_res[] = { static struct resource rb532_dev3_ctl_res[] = { { .name = "dev3_ctl", - .start = REGBASE + DEV3BASE, - .end = REGBASE + DEV3BASE + sizeof(struct dev_reg) - 1, .flags = IORESOURCE_MEM, } }; @@ -251,6 +249,9 @@ int __init rb532_gpio_init(void) /* Register our GPIO chip */ gpiochip_add(&rb532_gpio_chip->chip); + rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE); + rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000; + r = rb532_dev3_ctl_res; dev3.base = ioremap_nocache(r->start, r->end - r->start); -- cgit v1.2.3 From 7060886fb745b705bcf189131eb49c50485ba233 Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Mon, 19 Jan 2009 23:42:51 +0100 Subject: MIPS: RB532: Fix set_latch_u5() The data to be written is just a byte, so use writeb instead of writel. Also, dev3.base contains the address, not the data so referencing here is wrong. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 2f2cb8dc653..be977a4c2f9 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -93,7 +93,7 @@ void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) spin_lock_irqsave(&dev3.lock, flags); dev3.state = (dev3.state | or_mask) & ~nand_mask; - writel(dev3.state, &dev3.base); + writeb(dev3.state, dev3.base); spin_unlock_irqrestore(&dev3.lock, flags); } -- cgit v1.2.3 From 36f2db4b9c01689b1311d57a6297022d82000185 Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Mon, 19 Jan 2009 23:42:52 +0100 Subject: MIPS: RB532: Move dev3 init code to devices.c This code doesn't belong to gpio.c, as it's completely unrelated to GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more adequate place. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 39 --------------------------------------- 1 file changed, 39 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index be977a4c2f9..6229173946a 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -41,8 +41,6 @@ struct rb532_gpio_chip { void __iomem *regbase; }; -struct mpmc_device dev3; - static struct resource rb532_gpio_reg0_res[] = { { .name = "gpio_reg0", @@ -52,13 +50,6 @@ static struct resource rb532_gpio_reg0_res[] = { } }; -static struct resource rb532_dev3_ctl_res[] = { - { - .name = "dev3_ctl", - .flags = IORESOURCE_MEM, - } -}; - void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val) { unsigned long flags; @@ -86,25 +77,6 @@ unsigned get_434_reg(unsigned reg_offs) } EXPORT_SYMBOL(get_434_reg); -void set_latch_u5(unsigned char or_mask, unsigned char nand_mask) -{ - unsigned long flags; - - spin_lock_irqsave(&dev3.lock, flags); - - dev3.state = (dev3.state | or_mask) & ~nand_mask; - writeb(dev3.state, dev3.base); - - spin_unlock_irqrestore(&dev3.lock, flags); -} -EXPORT_SYMBOL(set_latch_u5); - -unsigned char get_latch_u5(void) -{ - return dev3.state; -} -EXPORT_SYMBOL(get_latch_u5); - /* rb532_set_bit - sanely set a bit * * bitval: new value for the bit @@ -249,17 +221,6 @@ int __init rb532_gpio_init(void) /* Register our GPIO chip */ gpiochip_add(&rb532_gpio_chip->chip); - rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE); - rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000; - - r = rb532_dev3_ctl_res; - dev3.base = ioremap_nocache(r->start, r->end - r->start); - - if (!dev3.base) { - printk(KERN_ERR "rb532: cannot remap device controller 3\n"); - return -ENXIO; - } - return 0; } arch_initcall(rb532_gpio_init); -- cgit v1.2.3 From 4ca3803f81bca9081f17ef67ffca8b11790f608d Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Mon, 19 Jan 2009 23:42:53 +0100 Subject: MIPS: RB532: Remove {get,set}_434_reg() These kernel symbols are unused. Also, since dev3 init has been moved to devices.c, set_434_reg() breaks compiling as it uses dev3. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 27 --------------------------- 1 file changed, 27 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index 6229173946a..f3386815982 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -50,33 +50,6 @@ static struct resource rb532_gpio_reg0_res[] = { } }; -void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val) -{ - unsigned long flags; - unsigned data; - unsigned i = 0; - - spin_lock_irqsave(&dev3.lock, flags); - - data = readl(IDT434_REG_BASE + reg_offs); - for (i = 0; i != len; ++i) { - if (val & (1 << i)) - data |= (1 << (i + bit)); - else - data &= ~(1 << (i + bit)); - } - writel(data, (IDT434_REG_BASE + reg_offs)); - - spin_unlock_irqrestore(&dev3.lock, flags); -} -EXPORT_SYMBOL(set_434_reg); - -unsigned get_434_reg(unsigned reg_offs) -{ - return readl(IDT434_REG_BASE + reg_offs); -} -EXPORT_SYMBOL(get_434_reg); - /* rb532_set_bit - sanely set a bit * * bitval: new value for the bit -- cgit v1.2.3 From 0fc6bc0d6e953f6dd80c286c889d8d581e8f8d7a Mon Sep 17 00:00:00 2001 From: Phil Sutter Date: Thu, 22 Jan 2009 19:32:43 +0100 Subject: MIPS: RB532: Export rb532_gpio_set_func() This kernel symbol provides a way for drivers to switch on alternate function for a certain GPIO pin. Turning it off is done implicitly when changing the GPIO direction, as that would be fixed when using the given pin als alternate function. Signed-off-by: Phil Sutter Signed-off-by: Ralf Baechle --- arch/mips/rb532/gpio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'arch/mips/rb532/gpio.c') diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c index f3386815982..37de05d595e 100644 --- a/arch/mips/rb532/gpio.c +++ b/arch/mips/rb532/gpio.c @@ -174,10 +174,11 @@ EXPORT_SYMBOL(rb532_gpio_set_istat); /* * Configure GPIO alternate function */ -static void rb532_gpio_set_func(int bit, unsigned gpio) +void rb532_gpio_set_func(unsigned gpio) { - rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOFUNC); + rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC); } +EXPORT_SYMBOL(rb532_gpio_set_func); int __init rb532_gpio_init(void) { -- cgit v1.2.3