From 17099b1142f6c0359fca60a3464dea8fb30badea Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 14 Jul 2007 13:24:05 +0100 Subject: [MIPS] Make support for weakly ordered LL/SC a config option. None of weakly ordered processor supported in tree need this but it seems like this could change ... Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/mips') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5c863bcd561..1e3aeccd732 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1190,8 +1190,19 @@ config SYS_HAS_CPU_RM9000 config SYS_HAS_CPU_SB1 bool +# +# CPU may reorder R->R, R->W, W->R, W->W +# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC +# config WEAK_ORDERING bool + +# +# CPU may reorder reads and writes beyond LL/SC +# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC +# +config WEAK_REORDERING_BEYOND_LLSC + bool endmenu # -- cgit v1.2.3