From f435a91e66e7776f0c73fca5af3cb87c61130ed6 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 6 Dec 2007 17:15:57 +0000 Subject: [MIPS] BCM1480: Fix interrupt routing, take 2. Signed-off-by: Ralf Baechle --- arch/mips/pci/pci-bcm1480.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/mips') diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index bc647cb7729..47f316c86ab 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c @@ -76,7 +76,10 @@ static inline void WRITECFG32(u32 addr, u32 data) int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { - return K_BCM1480_INT_PCI_INTA + pin; + if (pin == 0) + return -1; + + return K_BCM1480_INT_PCI_INTA - 1 + pin; } /* Do platform specific device initialization at pci_enable_device() time */ -- cgit v1.2.3 From 4b36673284f86c649b9d9ec5818b1912fde556b3 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 5 Dec 2007 19:08:24 +0300 Subject: [MIPS] Alchemy: replace ffs() with __ffs() Fix havoc wrought by commit 56f621c7f6f735311eed3f36858b402013023c18 -- au_ffs() and ffs() are equivalent, that patch should have just replaced one with another. Now replace ffs() with __ffs() which returns an unbiased bit number. Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/dbdma.c | 2 +- arch/mips/au1000/common/irq.c | 8 ++++---- arch/mips/au1000/pb1200/irqmap.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index 9d6ad43fded..edf91f41a78 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c @@ -859,7 +859,7 @@ dbdma_interrupt(int irq, void *dev_id) intstat = dbdma_gptr->ddma_intstat; au_sync(); - chan_index = ffs(intstat); + chan_index = __ffs(intstat); ctp = chan_tab_ptr[chan_index]; cp = ctp->chan_ptr; diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index ddfb7f0a17a..b7f1bbf6d5a 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -462,7 +462,7 @@ static void intc0_req0_irqdispatch(void) return; } #endif - bit = ffs(intc0_req0); + bit = __ffs(intc0_req0); intc0_req0 &= ~(1 << bit); do_IRQ(MIPS_CPU_IRQ_BASE + bit); } @@ -478,7 +478,7 @@ static void intc0_req1_irqdispatch(void) if (!intc0_req1) return; - bit = ffs(intc0_req1); + bit = __ffs(intc0_req1); intc0_req1 &= ~(1 << bit); do_IRQ(bit); } @@ -498,7 +498,7 @@ static void intc1_req0_irqdispatch(void) if (!intc1_req0) return; - bit = ffs(intc1_req0); + bit = __ffs(intc1_req0); intc1_req0 &= ~(1 << bit); do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); } @@ -514,7 +514,7 @@ static void intc1_req1_irqdispatch(void) if (!intc1_req1) return; - bit = ffs(intc1_req1); + bit = __ffs(intc1_req1); intc1_req1 &= ~(1 << bit); do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); } diff --git a/arch/mips/au1000/pb1200/irqmap.c b/arch/mips/au1000/pb1200/irqmap.c index c096be4ed4e..8fcd0df86f9 100644 --- a/arch/mips/au1000/pb1200/irqmap.c +++ b/arch/mips/au1000/pb1200/irqmap.c @@ -74,7 +74,7 @@ irqreturn_t pb1200_cascade_handler( int irq, void *dev_id) bcsr->int_status = bisr; for( ; bisr; bisr &= (bisr-1) ) { - extirq_nr = PB1200_INT_BEGIN + ffs(bisr); + extirq_nr = PB1200_INT_BEGIN + __ffs(bisr); /* Ack and dispatch IRQ */ do_IRQ(extirq_nr); } -- cgit v1.2.3 From 0e8120e0946152720af3d73691550bba108a3826 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Wed, 5 Dec 2007 19:08:26 +0300 Subject: [MIPS] Alchemy: fix IRQ bases Do what the commits commits f3e8d1da389fe2e514e31f6e93c690c8e1243849 and 9d360ab4a7568a8d177280f651a8a772ae52b9b9 failed to achieve -- actually convert the Alchemy code to irq_cpu. Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/irq.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index b7f1bbf6d5a..3c7714f057a 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -464,7 +464,7 @@ static void intc0_req0_irqdispatch(void) #endif bit = __ffs(intc0_req0); intc0_req0 &= ~(1 << bit); - do_IRQ(MIPS_CPU_IRQ_BASE + bit); + do_IRQ(AU1000_INTC0_INT_BASE + bit); } @@ -480,7 +480,7 @@ static void intc0_req1_irqdispatch(void) bit = __ffs(intc0_req1); intc0_req1 &= ~(1 << bit); - do_IRQ(bit); + do_IRQ(AU1000_INTC0_INT_BASE + bit); } @@ -500,7 +500,7 @@ static void intc1_req0_irqdispatch(void) bit = __ffs(intc1_req0); intc1_req0 &= ~(1 << bit); - do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); + do_IRQ(AU1000_INTC1_INT_BASE + bit); } @@ -516,7 +516,7 @@ static void intc1_req1_irqdispatch(void) bit = __ffs(intc1_req1); intc1_req1 &= ~(1 << bit); - do_IRQ(MIPS_CPU_IRQ_BASE + 32 + bit); + do_IRQ(AU1000_INTC1_INT_BASE + bit); } asmlinkage void plat_irq_dispatch(void) -- cgit v1.2.3 From 5e2862eb5a263a0339a85545d96fb20995d67b1f Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 6 Dec 2007 09:12:28 +0000 Subject: [MIPS] Oprofile: Fix computation of number of counters. VSMP kernels will split the available performance counters between the two processors / cores. But don't do this when we're not on a VSMP system ... Signed-off-by: Ralf Baechle --- arch/mips/oprofile/op_model_mipsxx.c | 44 +++++++++++++++++++++++++++++++----- 1 file changed, 38 insertions(+), 6 deletions(-) (limited to 'arch/mips') diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 423bc2c473d..bdfa07aecd9 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -6,6 +6,7 @@ * Copyright (C) 2004, 05, 06 by Ralf Baechle * Copyright (C) 2005 by MIPS Technologies, Inc. */ +#include #include #include #include @@ -33,11 +34,45 @@ #ifdef CONFIG_MIPS_MT_SMP #define WHAT (M_TC_EN_VPE | M_PERFCTL_VPEID(smp_processor_id())) #define vpe_id() smp_processor_id() + +/* + * The number of bits to shift to convert between counters per core and + * counters per VPE. There is no reasonable interface atm to obtain the + * number of VPEs used by Linux and in the 34K this number is fixed to two + * anyways so we hardcore a few things here for the moment. The way it's + * done here will ensure that oprofile VSMP kernel will run right on a lesser + * core like a 24K also or with maxcpus=1. + */ +static inline unsigned int vpe_shift(void) +{ + if (num_possible_cpus() > 1) + return 1; + + return 0; +} + #else + #define WHAT 0 #define vpe_id() 0 + +static inline unsigned int vpe_shift(void) +{ + return 0; +} + #endif +static inline unsigned int counters_total_to_per_cpu(unsigned int counters) +{ + return counters >> vpe_shift(); +} + +static inline unsigned int counters_per_cpu_to_total(unsigned int counters) +{ + return counters << vpe_shift(); +} + #define __define_perf_accessors(r, n, np) \ \ static inline unsigned int r_c0_ ## r ## n(void) \ @@ -269,9 +304,7 @@ static int __init mipsxx_init(void) reset_counters(counters); -#ifdef CONFIG_MIPS_MT_SMP - counters >>= 1; -#endif + counters = counters_total_to_per_cpu(counters); op_model_mipsxx_ops.num_counters = counters; switch (current_cpu_type()) { @@ -330,9 +363,8 @@ static int __init mipsxx_init(void) static void mipsxx_exit(void) { int counters = op_model_mipsxx_ops.num_counters; -#ifdef CONFIG_MIPS_MT_SMP - counters <<= 1; -#endif + + counters = counters_per_cpu_to_total(counters); reset_counters(counters); perf_irq = null_perf_irq; -- cgit v1.2.3