From b359049f270dcaab8a5bbdbb966594c16caba16c Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Wed, 7 Feb 2007 22:19:12 -0600 Subject: [POWERPC] 83xx: Add base support for the MPC8313E RDB Add support for the MPC8313E Reference Development Board (RDB). The board is a mini-ITX reference board with 128M DDR2, 8M flash, 32M NAND, USB, PCI, gigabit ethernet, and serial. Signed-off-by: Wilson Lo Signed-off-by: Scott Wood Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8313erdb.dts | 219 ++++++++++++++++++++++++++++++++++ 1 file changed, 219 insertions(+) create mode 100644 arch/powerpc/boot/dts/mpc8313erdb.dts (limited to 'arch/powerpc/boot/dts/mpc8313erdb.dts') diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts new file mode 100644 index 00000000000..3d2f5a06df3 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts @@ -0,0 +1,219 @@ +/* + * MPC8313E RDB Device Tree Source + * + * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +/ { + model = "MPC8313ERDB"; + compatible = "MPC83xx"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #cpus = <1>; + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8313@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <20>; // 32 bytes + i-cache-line-size = <20>; // 32 bytes + d-cache-size = <4000>; // L1, 16K + i-cache-size = <4000>; // L1, 16K + timebase-frequency = <0>; // from bootloader + bus-frequency = <0>; // from bootloader + clock-frequency = <0>; // from bootloader + 32-bit; + }; + }; + + memory { + device_type = "memory"; + reg = <00000000 08000000>; // 128MB at 0 + }; + + soc8313@e0000000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + ranges = <0 e0000000 00100000>; + reg = ; + bus-frequency = <0>; + + wdt@200 { + device_type = "watchdog"; + compatible = "mpc83xx_wdt"; + reg = <200 100>; + }; + + i2c@3000 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3000 100>; + interrupts = ; + interrupt-parent = <700>; + dfsrr; + }; + + i2c@3100 { + device_type = "i2c"; + compatible = "fsl-i2c"; + reg = <3100 100>; + interrupts = ; + interrupt-parent = <700>; + dfsrr; + }; + + spi@7000 { + device_type = "spi"; + compatible = "mpc83xx_spi"; + reg = <7000 1000>; + interrupts = <10 8>; + interrupt-parent = <700>; + mode = <0>; + }; + + /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ + usb@23000 { + device_type = "usb"; + compatible = "fsl-usb2-dr"; + reg = <23000 1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupt-parent = <700>; + interrupts = <26 2>; + phy_type = "utmi_wide"; + }; + + mdio@24520 { + device_type = "mdio"; + compatible = "gianfar"; + reg = <24520 20>; + #address-cells = <1>; + #size-cells = <0>; + linux,phandle = <24520>; + ethernet-phy@1 { + linux,phandle = <2452001>; + interrupt-parent = <700>; + interrupts = <13 2>; + reg = <1>; + device_type = "ethernet-phy"; + }; + ethernet-phy@4 { + linux,phandle = <2452004>; + interrupt-parent = <700>; + interrupts = <14 2>; + reg = <4>; + device_type = "ethernet-phy"; + }; + }; + + ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <24000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <25 8 24 8 23 8>; + interrupt-parent = <700>; + phy-handle = <2452001>; + }; + + ethernet@25000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <25000 1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <22 8 21 8 20 8>; + interrupt-parent = <700>; + phy-handle = <2452004>; + }; + + serial@4500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4500 100>; + clock-frequency = <0>; + interrupts = <9 8>; + interrupt-parent = <700>; + }; + + serial@4600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <4600 100>; + clock-frequency = <0>; + interrupts = ; + interrupt-parent = <700>; + }; + + pci@8500 { + interrupt-map-mask = ; + interrupt-map = < + + /* IDSEL 0x0E -mini PCI */ + 7000 0 0 1 700 12 8 + 7000 0 0 2 700 12 8 + 7000 0 0 3 700 12 8 + 7000 0 0 4 700 12 8 + + /* IDSEL 0x0F - PCI slot */ + 7800 0 0 1 700 11 8 + 7800 0 0 2 700 12 8 + 7800 0 0 3 700 11 8 + 7800 0 0 4 700 12 8>; + interrupt-parent = <700>; + interrupts = <42 8>; + bus-range = <0 0>; + ranges = <02000000 0 90000000 90000000 0 10000000 + 42000000 0 80000000 80000000 0 10000000 + 01000000 0 00000000 e2000000 0 00100000>; + clock-frequency = <3f940aa>; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <8500 100>; + compatible = "83xx"; + device_type = "pci"; + }; + + crypto@30000 { + device_type = "crypto"; + model = "SEC2"; + compatible = "talitos"; + reg = <30000 7000>; + interrupts = ; + interrupt-parent = <700>; + /* Rev. 2.2 */ + num-channels = <1>; + channel-fifo-len = <18>; + exec-units-mask = <0000004c>; + descriptor-types-mask = <0122003f>; + }; + + /* IPIC + * interrupts cell = + * sense values match linux IORESOURCE_IRQ_* defines: + * sense == 8: Level, low assertion + * sense == 2: Edge, high-to-low change + */ + pic@700 { + linux,phandle = <700>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <700 100>; + built-in; + device_type = "ipic"; + }; + }; +}; -- cgit v1.2.3