From 50cf67075ba071e0532ccc657ad64cfbb2da3c7a Mon Sep 17 00:00:00 2001 From: Dave Jiang Date: Thu, 10 May 2007 10:03:05 -0700 Subject: [POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices for MPC8540 ADS, MPC8548 CDS, and MPC8560 ADS. Also fixed up the size of the PCI node on MPC8560 ADS. Signed-off-by: Dave Jiang Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8540ads.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8548cds.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8560ads.dts | 18 +++++++++++++++++- 3 files changed, 49 insertions(+), 1 deletion(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index f261d647ac8..d91e81c009f 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,8540-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8540-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index b2b2200d042..ad96381033c 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,8548-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8548-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <80000>; // L2, 512K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 1f2afe9291d..80682152b0c 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts @@ -48,6 +48,22 @@ reg = ; bus-frequency = <13ab6680>; + memory-controller@2000 { + compatible = "fsl,8540-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8540-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + mdio@24520 { device_type = "mdio"; compatible = "gianfar"; @@ -110,7 +126,7 @@ #address-cells = <3>; compatible = "85xx"; device_type = "pci"; - reg = <8000 400>; + reg = <8000 1000>; clock-frequency = <3f940aa>; interrupt-map-mask = ; interrupt-map = < -- cgit v1.2.3 From 4da421d620fc104adf0b8b3841650c78f0e87b0a Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 15 May 2007 13:20:05 -0500 Subject: [POWERPC] 85xx: Add device nodes for error reporting devices used by EDAC Adding memory-controller and l2-cache-controller entries to be used by EDAC as of_devices for MPC8541 CDS, MPC8544 DS, MPC8555 CDS, and MPC8568 MDS. Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8541cds.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8544ds.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8555cds.dts | 16 ++++++++++++++++ arch/powerpc/boot/dts/mpc8568mds.dts | 16 ++++++++++++++++ 4 files changed, 64 insertions(+) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 5fdcb69554f..4f2c3af2e05 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,8541-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8541-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 6b084605bb4..3033599e74e 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; // Filled out by uboot. + memory-controller@2000 { + compatible = "fsl,8544-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8544-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index 68a4795720d..951ed92f115 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts @@ -48,6 +48,22 @@ reg = ; // CCSRBAR 1M bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,8555-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8555-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <40000>; // L2, 256K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index 948a3b61bd4..a123ec9456b 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts @@ -57,6 +57,22 @@ reg = ; bus-frequency = <0>; + memory-controller@2000 { + compatible = "fsl,8568-memory-controller"; + reg = <2000 1000>; + interrupt-parent = <&mpic>; + interrupts = <2 2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8568-l2-cache-controller"; + reg = <20000 1000>; + cache-line-size = <20>; // 32 bytes + cache-size = <80000>; // L2, 512K + interrupt-parent = <&mpic>; + interrupts = <0 2>; + }; + i2c@3000 { device_type = "i2c"; compatible = "fsl-i2c"; -- cgit v1.2.3 From 5c1992f83304cf2d56934dd6c06709b96e1b0c81 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 15 May 2007 16:12:27 -0500 Subject: [POWERPC] Removed hardcoded phandles from dts Remove explicit phandles and move to using references that autogenerate the phandles when needed. Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/kuroboxHD.dts | 44 ++++++++------------ arch/powerpc/boot/dts/kuroboxHG.dts | 45 ++++++++------------ arch/powerpc/boot/dts/lite5200.dts | 69 ++++++++++++++++--------------- arch/powerpc/boot/dts/lite5200b.dts | 77 +++++++++++++++++------------------ arch/powerpc/boot/dts/mpc7448hpc2.dts | 72 +++++++++++++++----------------- 5 files changed, 139 insertions(+), 168 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts index 157dc98d398..a983680c326 100644 --- a/arch/powerpc/boot/dts/kuroboxHD.dts +++ b/arch/powerpc/boot/dts/kuroboxHD.dts @@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" */ / { - linux,phandle = <1000>; model = "KuroboxHD"; compatible = "linkstation"; #address-cells = <1>; #size-cells = <1>; cpus { - linux,phandle = <2000>; #address-cells = <1>; #size-cells = <0>; PowerPC,603e { /* Really 8241 */ - linux,phandle = <2100>; device_type = "cpu"; reg = <0>; clock-frequency = ; /* Fixed by bootwrapper */ @@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" }; memory { - linux,phandle = <3000>; device_type = "memory"; reg = <00000000 04000000>; }; soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - linux,phandle = <4000>; #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; @@ -69,38 +64,34 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" fef00000 fef00000 00100000>; /* pci iack */ i2c@80003000 { - linux,phandle = <4300>; device_type = "i2c"; compatible = "fsl-i2c"; reg = <80003000 1000>; interrupts = <5 2>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; serial@80004500 { - linux,phandle = <4511>; device_type = "serial"; compatible = "ns16550"; reg = <80004500 8>; clock-frequency = <5d08d88>; current-speed = <2580>; interrupts = <9 2>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; serial@80004600 { - linux,phandle = <4512>; device_type = "serial"; compatible = "ns16550"; reg = <80004600 8>; clock-frequency = <5d08d88>; current-speed = ; interrupts = ; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; - pic@80040000 { - linux,phandle = <4400>; + mpic: pic@80040000 { #interrupt-cells = <2>; #address-cells = <0>; device_type = "open-pic"; @@ -111,7 +102,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" }; pci@fec00000 { - linux,phandle = <4500>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; @@ -122,24 +112,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" 02000000 0 80000000 80000000 0 70000000>; bus-range = <0 ff>; clock-frequency = <7f28155>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; interrupt-map-mask = ; interrupt-map = < /* IDSEL 11 - IRQ0 ETH */ - 5800 0 0 1 4400 0 1 - 5800 0 0 2 4400 1 1 - 5800 0 0 3 4400 2 1 - 5800 0 0 4 4400 3 1 + 5800 0 0 1 &mpic 0 1 + 5800 0 0 2 &mpic 1 1 + 5800 0 0 3 &mpic 2 1 + 5800 0 0 4 &mpic 3 1 /* IDSEL 12 - IRQ1 IDE0 */ - 6000 0 0 1 4400 1 1 - 6000 0 0 2 4400 2 1 - 6000 0 0 3 4400 3 1 - 6000 0 0 4 4400 0 1 + 6000 0 0 1 &mpic 1 1 + 6000 0 0 2 &mpic 2 1 + 6000 0 0 3 &mpic 3 1 + 6000 0 0 4 &mpic 0 1 /* IDSEL 14 - IRQ3 USB2.0 */ - 7000 0 0 1 4400 3 1 - 7000 0 0 2 4400 3 1 - 7000 0 0 3 4400 3 1 - 7000 0 0 4 4400 3 1 + 7000 0 0 1 &mpic 3 1 + 7000 0 0 2 &mpic 3 1 + 7000 0 0 3 &mpic 3 1 + 7000 0 0 4 &mpic 3 1 >; }; }; diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts index 919eb29097d..5cf42dc022d 100644 --- a/arch/powerpc/boot/dts/kuroboxHG.dts +++ b/arch/powerpc/boot/dts/kuroboxHG.dts @@ -21,19 +21,16 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" */ / { - linux,phandle = <1000>; model = "KuroboxHG"; compatible = "linkstation"; #address-cells = <1>; #size-cells = <1>; cpus { - linux,phandle = <2000>; #address-cells = <1>; #size-cells = <0>; PowerPC,603e { /* Really 8241 */ - linux,phandle = <2100>; device_type = "cpu"; reg = <0>; clock-frequency = ; /* Fixed by bootwrapper */ @@ -48,13 +45,11 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" }; memory { - linux,phandle = <3000>; device_type = "memory"; reg = <00000000 08000000>; }; soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ - linux,phandle = <4000>; #address-cells = <1>; #size-cells = <1>; #interrupt-cells = <2>; @@ -69,38 +64,35 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" fef00000 fef00000 00100000>; /* pci iack */ i2c@80003000 { - linux,phandle = <4300>; device_type = "i2c"; compatible = "fsl-i2c"; reg = <80003000 1000>; interrupts = <5 2>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; serial@80004500 { - linux,phandle = <4511>; device_type = "serial"; compatible = "ns16550"; reg = <80004500 8>; clock-frequency = <7c044a8>; current-speed = <2580>; interrupts = <9 2>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; serial@80004600 { - linux,phandle = <4512>; device_type = "serial"; compatible = "ns16550"; reg = <80004600 8>; clock-frequency = <7c044a8>; current-speed = ; interrupts = ; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; }; - pic@80040000 { - linux,phandle = <4400>; + mpic: pic@80040000 { + interrupt-parent = <&mpic>; #interrupt-cells = <2>; #address-cells = <0>; device_type = "open-pic"; @@ -111,7 +103,6 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" }; pci@fec00000 { - linux,phandle = <4500>; #address-cells = <3>; #size-cells = <2>; #interrupt-cells = <1>; @@ -122,24 +113,24 @@ build with: "dtc -f -I dts -O dtb -o kuroboxHG.dtb -V 16 kuroboxHG.dts" 02000000 0 80000000 80000000 0 70000000>; bus-range = <0 ff>; clock-frequency = <7f28155>; - interrupt-parent = <4400>; + interrupt-parent = <&mpic>; interrupt-map-mask = ; interrupt-map = < /* IDSEL 11 - IRQ0 ETH */ - 5800 0 0 1 4400 0 1 - 5800 0 0 2 4400 1 1 - 5800 0 0 3 4400 2 1 - 5800 0 0 4 4400 3 1 + 5800 0 0 1 &mpic 0 1 + 5800 0 0 2 &mpic 1 1 + 5800 0 0 3 &mpic 2 1 + 5800 0 0 4 &mpic 3 1 /* IDSEL 12 - IRQ1 IDE0 */ - 6000 0 0 1 4400 1 1 - 6000 0 0 2 4400 2 1 - 6000 0 0 3 4400 3 1 - 6000 0 0 4 4400 0 1 + 6000 0 0 1 &mpic 1 1 + 6000 0 0 2 &mpic 2 1 + 6000 0 0 3 &mpic 3 1 + 6000 0 0 4 &mpic 0 1 /* IDSEL 14 - IRQ3 USB2.0 */ - 7000 0 0 1 4400 3 1 - 7000 0 0 2 4400 3 1 - 7000 0 0 3 4400 3 1 - 7000 0 0 4 4400 3 1 + 7000 0 0 1 &mpic 3 1 + 7000 0 0 2 &mpic 3 1 + 7000 0 0 3 &mpic 3 1 + 7000 0 0 4 &mpic 3 1 >; }; }; diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index e13ac6ef05a..eae68ab1177 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -49,7 +49,7 @@ soc5200@f0000000 { model = "fsl,mpc5200"; compatible = "mpc5200"; - revision = "" // from bootloader + revision = ""; // from bootloader #interrupt-cells = <3>; device_type = "soc"; ranges = <0 f0000000 f0010000>; @@ -62,13 +62,12 @@ reg = <200 38>; }; - pic@500 { + mpc5200_pic: pic@500 { // 5200 interrupts are encoded into two levels; - linux,phandle = <500>; interrupt-controller; #interrupt-cells = <3>; device_type = "interrupt-controller"; - compatible = "mpc5200-pic"; + compatible = "mpc5200_pic"; reg = <500 80>; built-in; }; @@ -79,7 +78,7 @@ cell-index = <0>; reg = <600 10>; interrupts = <1 9 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; has-wdt; }; @@ -89,7 +88,7 @@ cell-index = <1>; reg = <610 10>; interrupts = <1 a 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@620 { // General Purpose Timer @@ -98,7 +97,7 @@ cell-index = <2>; reg = <620 10>; interrupts = <1 b 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@630 { // General Purpose Timer @@ -107,7 +106,7 @@ cell-index = <3>; reg = <630 10>; interrupts = <1 c 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@640 { // General Purpose Timer @@ -116,7 +115,7 @@ cell-index = <4>; reg = <640 10>; interrupts = <1 d 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@650 { // General Purpose Timer @@ -125,7 +124,7 @@ cell-index = <5>; reg = <650 10>; interrupts = <1 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@660 { // General Purpose Timer @@ -134,7 +133,7 @@ cell-index = <6>; reg = <660 10>; interrupts = <1 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@670 { // General Purpose Timer @@ -143,7 +142,7 @@ cell-index = <7>; reg = <670 10>; interrupts = <1 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; rtc@800 { // Real time clock @@ -151,7 +150,7 @@ device_type = "rtc"; reg = <800 100>; interrupts = <1 5 0 1 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; mscan@900 { @@ -159,7 +158,7 @@ compatible = "mpc5200-mscan"; cell-index = <0>; interrupts = <2 11 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <900 80>; }; @@ -168,7 +167,7 @@ compatible = "mpc5200-mscan"; cell-index = <1>; interrupts = <2 12 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <980 80>; }; @@ -176,14 +175,14 @@ compatible = "mpc5200-gpio"; reg = ; interrupts = <1 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpio-wkup@c00 { compatible = "mpc5200-gpio-wkup"; reg = ; interrupts = <1 8 0 0 3 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; pci@0d00 { @@ -194,13 +193,13 @@ compatible = "mpc5200-pci"; reg = ; interrupt-map-mask = ; - interrupt-map = ; + interrupt-map = ; clock-frequency = <0>; // From boot loader interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; bus-range = <0 0>; ranges = <42000000 0 80000000 80000000 0 20000000 02000000 0 a0000000 a0000000 0 10000000 @@ -212,7 +211,7 @@ compatible = "mpc5200-spi"; reg = ; interrupts = <2 d 0 2 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; usb@1000 { @@ -220,7 +219,7 @@ compatible = "mpc5200-ohci\0ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; bestcomm@1200 { @@ -231,7 +230,7 @@ 3 4 0 3 5 0 3 6 0 3 7 0 3 8 0 3 9 0 3 a 0 3 b 0 3 c 0 3 d 0 3 e 0 3 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; xlb@1f00 { @@ -246,7 +245,7 @@ cell-index = <0>; reg = <2000 100>; interrupts = <2 1 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; // PSC2 in ac97 mode example @@ -256,7 +255,7 @@ // cell-index = <1>; // reg = <2200 100>; // interrupts = <2 2 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC3 in CODEC mode example @@ -266,7 +265,7 @@ // cell-index = <2>; // reg = <2400 100>; // interrupts = <2 3 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC4 in uart mode example @@ -276,7 +275,7 @@ // cell-index = <3>; // reg = <2600 100>; // interrupts = <2 b 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC5 in uart mode example @@ -286,7 +285,7 @@ // cell-index = <4>; // reg = <2800 100>; // interrupts = <2 c 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC6 in spi mode example @@ -296,7 +295,7 @@ // cell-index = <5>; // reg = <2c00 100>; // interrupts = <2 4 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; ethernet@3000 { @@ -305,7 +304,7 @@ reg = <3000 800>; mac-address = [ 02 03 04 05 06 07 ]; // Bad! interrupts = <2 5 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; ata@3a00 { @@ -313,7 +312,7 @@ compatible = "mpc5200-ata"; reg = <3a00 100>; interrupts = <2 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; i2c@3d00 { @@ -322,7 +321,7 @@ cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; @@ -332,7 +331,7 @@ cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; sram@8000 { diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 00211b39a34..5185625a941 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -62,13 +62,12 @@ reg = <200 38>; }; - pic@500 { + mpc5200_pic: pic@500 { // 5200 interrupts are encoded into two levels; - linux,phandle = <500>; interrupt-controller; #interrupt-cells = <3>; device_type = "interrupt-controller"; - compatible = "mpc5200b-pic\0mpc5200-pic"; + compatible = "mpc5200b-pic\0mpc5200_pic"; reg = <500 80>; built-in; }; @@ -79,7 +78,7 @@ cell-index = <0>; reg = <600 10>; interrupts = <1 9 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; has-wdt; }; @@ -89,7 +88,7 @@ cell-index = <1>; reg = <610 10>; interrupts = <1 a 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@620 { // General Purpose Timer @@ -98,7 +97,7 @@ cell-index = <2>; reg = <620 10>; interrupts = <1 b 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@630 { // General Purpose Timer @@ -107,7 +106,7 @@ cell-index = <3>; reg = <630 10>; interrupts = <1 c 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@640 { // General Purpose Timer @@ -116,7 +115,7 @@ cell-index = <4>; reg = <640 10>; interrupts = <1 d 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@650 { // General Purpose Timer @@ -125,7 +124,7 @@ cell-index = <5>; reg = <650 10>; interrupts = <1 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@660 { // General Purpose Timer @@ -134,7 +133,7 @@ cell-index = <6>; reg = <660 10>; interrupts = <1 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpt@670 { // General Purpose Timer @@ -143,7 +142,7 @@ cell-index = <7>; reg = <670 10>; interrupts = <1 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; rtc@800 { // Real time clock @@ -151,7 +150,7 @@ device_type = "rtc"; reg = <800 100>; interrupts = <1 5 0 1 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; mscan@900 { @@ -159,7 +158,7 @@ compatible = "mpc5200b-mscan\0mpc5200-mscan"; cell-index = <0>; interrupts = <2 11 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <900 80>; }; @@ -168,7 +167,7 @@ compatible = "mpc5200b-mscan\0mpc5200-mscan"; cell-index = <1>; interrupts = <2 12 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; reg = <980 80>; }; @@ -176,14 +175,14 @@ compatible = "mpc5200b-gpio\0mpc5200-gpio"; reg = ; interrupts = <1 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; gpio-wkup@c00 { compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; reg = ; interrupts = <1 8 0 0 3 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; pci@0d00 { @@ -194,18 +193,18 @@ compatible = "mpc5200b-pci\0mpc5200-pci"; reg = ; interrupt-map-mask = ; - interrupt-map = ; + interrupt-map = ; clock-frequency = <0>; // From boot loader interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; bus-range = <0 0>; ranges = <42000000 0 80000000 80000000 0 20000000 02000000 0 a0000000 a0000000 0 10000000 @@ -217,7 +216,7 @@ compatible = "mpc5200b-spi\0mpc5200-spi"; reg = ; interrupts = <2 d 0 2 e 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; usb@1000 { @@ -225,7 +224,7 @@ compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; reg = <1000 ff>; interrupts = <2 6 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; bestcomm@1200 { @@ -236,7 +235,7 @@ 3 4 0 3 5 0 3 6 0 3 7 0 3 8 0 3 9 0 3 a 0 3 b 0 3 c 0 3 d 0 3 e 0 3 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; xlb@1f00 { @@ -251,7 +250,7 @@ cell-index = <0>; reg = <2000 100>; interrupts = <2 1 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; // PSC2 in ac97 mode example @@ -261,7 +260,7 @@ // cell-index = <1>; // reg = <2200 100>; // interrupts = <2 2 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC3 in CODEC mode example @@ -271,7 +270,7 @@ // cell-index = <2>; // reg = <2400 100>; // interrupts = <2 3 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC4 in uart mode example @@ -281,7 +280,7 @@ // cell-index = <3>; // reg = <2600 100>; // interrupts = <2 b 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC5 in uart mode example @@ -291,7 +290,7 @@ // cell-index = <4>; // reg = <2800 100>; // interrupts = <2 c 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; // PSC6 in spi mode example @@ -301,7 +300,7 @@ // cell-index = <5>; // reg = <2c00 100>; // interrupts = <2 4 0>; - // interrupt-parent = <500>; + // interrupt-parent = <&mpc5200_pic>; //}; ethernet@3000 { @@ -310,7 +309,7 @@ reg = <3000 800>; mac-address = [ 02 03 04 05 06 07 ]; // Bad! interrupts = <2 5 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; ata@3a00 { @@ -318,7 +317,7 @@ compatible = "mpc5200b-ata\0mpc5200-ata"; reg = <3a00 100>; interrupts = <2 7 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; }; i2c@3d00 { @@ -327,7 +326,7 @@ cell-index = <0>; reg = <3d00 40>; interrupts = <2 f 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; @@ -337,7 +336,7 @@ cell-index = <1>; reg = <3d40 40>; interrupts = <2 10 0>; - interrupt-parent = <500>; + interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; }; sram@8000 { diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts index 6fa3754f293..765c306ecf8 100644 --- a/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts @@ -16,12 +16,10 @@ compatible = "mpc74xx"; #address-cells = <1>; #size-cells = <1>; - linux,phandle = <100>; cpus { #address-cells = <1>; #size-cells =<0>; - linux,phandle = <200>; PowerPC,7448@0 { device_type = "cpu"; @@ -34,13 +32,11 @@ clock-frequency = <0>; // From U-Boot bus-frequency = <0>; // From U-Boot 32-bit; - linux,phandle = <201>; }; }; memory { device_type = "memory"; - linux,phandle = <300>; reg = <00000000 20000000 // DDR2 512M at 0 >; }; @@ -55,7 +51,7 @@ bus-frequency = <0>; i2c@7000 { - interrupt-parent = <7400>; + interrupt-parent = <&mpic>; interrupts = ; reg = <7000 400>; device_type = "i2c"; @@ -66,18 +62,16 @@ device_type = "mdio"; compatible = "tsi-ethernet"; - ethernet-phy@6000 { - linux,phandle = <6000>; - interrupt-parent = <7400>; + phy8: ethernet-phy@6000 { + interrupt-parent = <&mpic>; interrupts = <2 1>; reg = <6000 50>; phy-id = <8>; device_type = "ethernet-phy"; }; - ethernet-phy@6400 { - linux,phandle = <6400>; - interrupt-parent = <7400>; + phy9: ethernet-phy@6400 { + interrupt-parent = <&mpic>; interrupts = <2 1>; reg = <6000 50>; phy-id = <9>; @@ -94,8 +88,8 @@ reg = <6000 200>; address = [ 00 06 D2 00 00 01 ]; interrupts = <10 2>; - interrupt-parent = <7400>; - phy-handle = <6000>; + interrupt-parent = <&mpic>; + phy-handle = <&phy8>; }; ethernet@6600 { @@ -107,8 +101,8 @@ reg = <6400 200>; address = [ 00 06 D2 00 00 02 ]; interrupts = <11 2>; - interrupt-parent = <7400>; - phy-handle = <6400>; + interrupt-parent = <&mpic>; + phy-handle = <&phy9>; }; serial@7808 { @@ -117,7 +111,7 @@ reg = <7808 200>; clock-frequency = <3f6b5a00>; interrupts = ; - interrupt-parent = <7400>; + interrupt-parent = <&mpic>; }; serial@7c08 { @@ -126,11 +120,10 @@ reg = <7c08 200>; clock-frequency = <3f6b5a00>; interrupts = ; - interrupt-parent = <7400>; + interrupt-parent = <&mpic>; }; - pic@7400 { - linux,phandle = <7400>; + mpic: pic@7400 { clock-frequency = <0>; interrupt-controller; #address-cells = <0>; @@ -144,7 +137,6 @@ pci@1000 { compatible = "tsi10x"; device_type = "pci"; - linux,phandle = <1000>; #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; @@ -153,37 +145,37 @@ ranges = <02000000 0 e0000000 e0000000 0 1A000000 01000000 0 00000000 fa000000 0 00010000>; clock-frequency = <7f28154>; - interrupt-parent = <7400>; + interrupt-parent = <&mpic>; interrupts = <17 2>; interrupt-map-mask = ; interrupt-map = < /* IDSEL 0x11 */ - 0800 0 0 1 1180 24 0 - 0800 0 0 2 1180 25 0 - 0800 0 0 3 1180 26 0 - 0800 0 0 4 1180 27 0 + 0800 0 0 1 &RT0 24 0 + 0800 0 0 2 &RT0 25 0 + 0800 0 0 3 &RT0 26 0 + 0800 0 0 4 &RT0 27 0 /* IDSEL 0x12 */ - 1000 0 0 1 1180 25 0 - 1000 0 0 2 1180 26 0 - 1000 0 0 3 1180 27 0 - 1000 0 0 4 1180 24 0 + 1000 0 0 1 &RT0 25 0 + 1000 0 0 2 &RT0 26 0 + 1000 0 0 3 &RT0 27 0 + 1000 0 0 4 &RT0 24 0 /* IDSEL 0x13 */ - 1800 0 0 1 1180 26 0 - 1800 0 0 2 1180 27 0 - 1800 0 0 3 1180 24 0 - 1800 0 0 4 1180 25 0 + 1800 0 0 1 &RT0 26 0 + 1800 0 0 2 &RT0 27 0 + 1800 0 0 3 &RT0 24 0 + 1800 0 0 4 &RT0 25 0 /* IDSEL 0x14 */ - 2000 0 0 1 1180 27 0 - 2000 0 0 2 1180 24 0 - 2000 0 0 3 1180 25 0 - 2000 0 0 4 1180 26 0 + 2000 0 0 1 &RT0 27 0 + 2000 0 0 2 &RT0 24 0 + 2000 0 0 3 &RT0 25 0 + 2000 0 0 4 &RT0 26 0 >; - router@1180 { - linux,phandle = <1180>; + + RT0: router@1180 { clock-frequency = <0>; interrupt-controller; device_type = "pic-router"; @@ -192,7 +184,7 @@ built-in; big-endian; interrupts = <17 2>; - interrupt-parent = <7400>; + interrupt-parent = <&mpic>; }; }; }; -- cgit v1.2.3 From c72ea777d4e51435388fbd863c813a19635fa8ef Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 16 May 2007 13:48:50 +1000 Subject: [POWERPC] Small fixes for the Ebony device tree This patch corrects a number of minor errors in the Ebony device tree: - Missing (given as 0) cache sizes are added to the CPU node - device_type properties are removed from nodes which don't have a reasonably well defined device_type binding. This does require a very small code change to locate the busses to be probed for of_platform devices by 'compatible' instead of 'device_type'. - A node is added for the SRAM controller - The unit address of the small-flash node is adjusted to correctly reflect the reg property. - device_type values for the MAL and ZMII are updated to reflected more up-to-date versions of the binding. - An incorrect offset in the partition map for the large-flash node is corrected. - Some redundant values, already commented out are removed entirely. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- arch/powerpc/boot/dts/ebony.dts | 37 +++++++++++++------------------------ 1 file changed, 13 insertions(+), 24 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index b67918651c4..0ec02f4726b 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts @@ -33,8 +33,8 @@ timebase-frequency = <0>; // Filled in by zImage i-cache-line-size = <32>; d-cache-line-size = <32>; - i-cache-size = <0>; - d-cache-size = <0>; + i-cache-size = <8000>; /* 32 kB */ + d-cache-size = <8000>; /* 32 kB */ dcr-controller; dcr-access-method = "native"; }; @@ -46,7 +46,6 @@ }; UIC0: interrupt-controller0 { - device_type = "ibm,uic"; compatible = "ibm,uic-440gp", "ibm,uic"; interrupt-controller; cell-index = <0>; @@ -58,7 +57,6 @@ }; UIC1: interrupt-controller1 { - device_type = "ibm,uic"; compatible = "ibm,uic-440gp", "ibm,uic"; interrupt-controller; cell-index = <1>; @@ -71,36 +69,36 @@ }; CPC0: cpc { - device_type = "ibm,cpc"; compatible = "ibm,cpc-440gp"; dcr-reg = <0b0 003 0e0 010>; // FIXME: anything else? }; plb { - device_type = "ibm,plb"; compatible = "ibm,plb-440gp", "ibm,plb4"; #address-cells = <2>; #size-cells = <1>; ranges; clock-frequency = <0>; // Filled in by zImage - SDRAM0: sdram { - device_type = "memory-controller"; - compatible = "ibm,sdram-440gp", "ibm,sdram"; + SDRAM0: memory-controller { + compatible = "ibm,sdram-440gp"; dcr-reg = <010 2>; // FIXME: anything else? }; + SRAM0: sram { + compatible = "ibm,sram-440gp"; + dcr-reg = <020 8 00a 1>; + }; + DMA0: dma { // FIXME: ??? - device_type = "ibm,dma-4xx"; - compatible = "ibm,dma-440gp", "ibm,dma-4xx"; + compatible = "ibm,dma-440gp"; dcr-reg = <100 027>; }; MAL0: mcmal { - device_type = "mcmal-dma"; compatible = "ibm,mcmal-440gp", "ibm,mcmal"; dcr-reg = <180 62>; num-tx-chans = <4>; @@ -119,7 +117,6 @@ }; POB0: opb { - device_type = "ibm,opb"; compatible = "ibm,opb-440gp", "ibm,opb"; #address-cells = <1>; #size-cells = <1>; @@ -133,8 +130,7 @@ clock-frequency = <0>; // Filled in by zImage EBC0: ebc { - device_type = "ibm,ebc"; - compatible = "ibm,ebc-440gp"; + compatible = "ibm,ebc-440gp", "ibm,ebc"; dcr-reg = <012 2>; #address-cells = <2>; #size-cells = <1>; @@ -147,7 +143,7 @@ interrupts = <5 4>; interrupt-parent = <&UIC1>; - small-flash@0,0 { + small-flash@0,80000 { device_type = "rom"; compatible = "direct-mapped"; probe-type = "JEDEC"; @@ -159,7 +155,6 @@ ds1743@1,0 { /* NVRAM & RTC */ - device_type = "nvram"; compatible = "ds1743"; reg = <1 0 2000>; }; @@ -170,7 +165,7 @@ probe-type = "JEDEC"; bank-width = <1>; partitions = <0 380000 - 280000 80000>; + 380000 80000>; partition-names = "fs", "firmware"; reg = <2 0 400000>; }; @@ -226,13 +221,11 @@ GPIO0: gpio@40000700 { /* FIXME */ - device_type = "gpio"; compatible = "ibm,gpio-440gp"; reg = <40000700 20>; }; ZMII0: emac-zmii@40000780 { - device_type = "emac-zmii"; compatible = "ibm,zmii-440gp", "ibm,zmii"; reg = <40000780 c>; }; @@ -299,9 +292,5 @@ chosen { linux,stdout-path = "/plb/opb/serial@40000200"; -// linux,initrd-start = <0>; /* FIXME */ -// linux,initrd-end = <0>; -// bootargs = ""; }; }; - -- cgit v1.2.3